- 18 Nov, 2016 4 commits
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Olof Johansson authored
Merge tag 'uniphier-dt-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt UniPhier ARM SoC DT updates for v4.10 - Add OPP tables to support generic cpufreq driver - Use more clocks/resets properties - Misc fixes and cleanups * tag 'uniphier-dt-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: make compatible of syscon nodes SoC-specific ARM: dts: uniphier: add clocks/resets to EHCI nodes of sLD3 SoC ARM: dts: uniphier: remove redundant serial fifo-size properties ARM: dts: uniphier: make 32bit SoC DTSI linear ARM: dts: uniphier: add CPU clocks and OPP table for PXs2 SoC ARM: dts: uniphier: add CPU clocks and OPP table for Pro5 SoC ARM: dts: uniphier: increase register region size of sysctrl node Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Linux 4.9-rc3 * tag 'v4.9-rc3': (292 commits) Linux 4.9-rc3 x86/smpboot: Init apic mapping before usage ACPICA: Dispatcher: Fix interpreter locking around acpi_ev_initialize_region() ACPICA: Dispatcher: Fix an unbalanced lock exit path in acpi_ds_auto_serialize_method() ACPICA: Dispatcher: Fix order issue of method termination ARC: module: print pretty section names ARC: module: elide loop to save reference to .eh_frame ARC: mm: retire ARC_DBG_TLB_MISS_COUNT... ARC: build: retire old toggles ARC: boot log: refactor cpu name/release printing ARC: boot log: remove awkward space comma from MMU line ARC: boot log: don't assume SWAPE instruction support ARC: boot log: refactor printing abt features not captured in BCRs ARCv2: boot log: print IOC exists as well as enabled status ubifs: Fix regression in ubifs_readdir() ubi: fastmap: Fix add_vol() return value test in ubi_attach_fastmap() MAINTAINERS: Add entry for genwqe driver VMCI: Doorbell create and destroy fixes GenWQE: Fix bad page access during abort of resource allocation vme: vme_get_size potentially returning incorrect value on failure ...
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Olof Johansson authored
Merge tag 'stm32-dt-for-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt STM32 DT updates for v4.10, round 1. Highlights: ---------- - Add LSI and LSE clocks support for STM32F429 - Add GPIO IRQ support for STM32F429 - Declare push button as GPIO keys on STM32F429 boards - Add DMA supports on USART1 & USART3 on STM32F429 - Add Ethernet fixes * tag 'stm32-dt-for-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32f429: add LSI and LSE clocks ARM: dts: stm32f429: remove Ethernet wake on Lan support ARM: dts: stm32f429: Fix Ethernet node on Eval Board ARM: dts: stm32f429: Align Ethernet node with new bindings properties ARM: DT: stm32: move dma translation to board files ARM: DT: STM32: add dma for usart3 on F429 ARM: DT: STM32: add dma for usart1 on F429 ARM: dts: Declare push button as GPIO key on stm32f429 boards ARM: dts: Add GPIO irq support to STM32F429 Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Renesas ARM Based SoC DT Updates for v4.10 Clean-Ups and Corrections: * Removed Z clock from r8a7794 SoC; it is not present in hardware * Use generic pinctrl properties in SDHI nodes in gose board * Correct W=1 dtc warnings on r8a7794 SoC * Correct DU reg property on r8a7779 SoC * Correct SCIFB reg properties to cover all registers Enhancements: * Configure pinmuxing for the DU0 input clock on the Marzen board * Enable VIN 0 - 2 on r8a7793 SoC * Enable HDMI input on Koelsch and Lager boards * Enable SDHI1 on rskrza1 board * Add MMCIF nodes to r7s72100 SoC * Add MSIOF clocks to r8a7792 SoC * Enable UHS for SDHI 0 & 1 on koelsch and alt boards * tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits) ARM: dts: r8a7794: remove Z clock ARM: dts: r8a7779: marzen: Configure pinmuxing for the DU0 input clock ARM: dts: sh73a0: Remove skeleton.dtsi inclusion ARM: dts: r8a7740: Remove skeleton.dtsi inclusion ARM: dts: r8a7779: Remove skeleton.dtsi inclusion ARM: dts: r8a7778: Remove skeleton.dtsi inclusion ARM: dts: emev2: Remove skeleton.dtsi inclusion ARM: dts: r8a7779: Fix DU reg property ARM: dts: r8a7793: Enable VIN0-VIN2 ARM: dts: koelsch: add HDMI input ARM: dts: lager: Add entries for VIN HDMI input support ARM: dts: rskrza1: add sdhi1 DT support ARM: dts: r7s72100: add sdhi to device tree ARM: dts: r8a7794: Fix W=1 dtc warnings ARM: dts: gose: use generic pinctrl properties in SDHI nodes ARM: dts: r7s72100: add sdhi clock to device tree ARM: dts: r7s72100: add mmcif to device tree ARM: dts: r8a7792: add MSIOF support ARM: dts: r8a7792: add MSIOF clocks ARM: dts: wheat: add DU support ... Signed-off-by: Olof Johansson <olof@lixom.net>
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- 08 Nov, 2016 1 commit
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Olof Johansson authored
Merge tag 'davinci-for-v4.10/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt DaVinci device-tree source additions for LCD, SPI and cfgchip syscon. * tag 'davinci-for-v4.10/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: dts: da850: Add cfgchip syscon node ARM: dts: da850: Add DMA to SPI0 ARM: dts: da850: add a node for the LCD controller Signed-off-by: Olof Johansson <olof@lixom.net>
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- 05 Nov, 2016 7 commits
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Masahiro Yamada authored
These hardware blocks are SoC-specific, so their compatible strings should be SoC-specific as well. This change has no impact on the actual behavior since it is controlled by the generic "simple-mfd", "syscon" compatible strings. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Now, the clock/reset controller driver is available for this SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
These are the default of the optional property. No need to describe them explicitly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
I notice some mistakes in the SoC DTSI; wrong interrupts properties of timer nodes, mismatch between the node name and the compatible for sdctrl block. Given those problems fixed, the common parts among SoCs are less than I had first expected. The more and more property overrides are making the SoC DTSI unreadable. Stretch out the SoC DTSI files and fix the following: - Fix the 3rd cell of the interrupts property of the timer nodes for Pro4, Pro5, PXs2 - Fix the node name mioctrl to sdctrl for Pro5, PXs2 - Fix the second region of l2 node for PXs2 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Add a CPU clock to every CPU node and a CPU OPP table to use the generic cpufreq driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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Masahiro Yamada authored
Add a CPU clock to every CPU node and a CPU OPP table to use the generic cpufreq driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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Masahiro Yamada authored
The System Control node has 0x10000 byte of registers. The current reg size must be expanded to use the cpufreq driver because the registers controlling CPU frequency are located at offset 0x8000. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 04 Nov, 2016 28 commits
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Gabriel Fernandez authored
This patch adds lsi / lse oscillators. These clocks can be use by RTC clocks. The clock drivers needs to disable the power domain write protection using syscon / regmap to enable these clocks. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Alexandre TORGUE authored
This patch removes WoL (Wake on Lan) support as it is not yet fully supported and tested. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Alexandre TORGUE authored
"phy-handle" entry is mandatory when mdio subnode is used in Ethernet node. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Alexandre TORGUE authored
This patch aligns clocks names and node reference according to new stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle (indeed there is no need to add 0 as Ethernet instance as there is only one IP in SOC). Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Alexandre TORGUE authored
stm32f469-disco and stm32f429-eval boards use SDRAM start address remapping (to @0) to boost performances. A DMA translation through "dma-ranges" property was needed for other masters than the M4 CPU. stm32f429-disco doesn't use remapping so doesn't need this DMA translation. This patches moves this DMA translation definition from stm32f429 soc file to board files. Tested-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Alexandre TORGUE authored
Add DMA support for USART3 on STM32F429 MCU. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Gerald Baeza authored
Tested-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Gerald Baeza <gerald.baeza@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Maxime Coquelin authored
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Maxime Coquelin authored
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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Sergei Shtylyov authored
R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock... Fixes: 0dce5454 ("ARM: shmobile: Initial r8a7794 SoC device tree") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Laurent Pinchart authored
DU0 uses an externally provided clock, but the corresponding pin isn't correctly muxed. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
As of commit 9c0da3cc ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
As of commit 9c0da3cc ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
As of commit 9c0da3cc ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
As of commit 9c0da3cc ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
As of commit 9c0da3cc ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Laurent Pinchart authored
The system uses one address cell and one size cell, not two. Fix the DU DT node. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Ulrich Hecht authored
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Hans Verkuil authored
Add support in the dts for the HDMI input. Based on the Lager dts patch from Ulrich Hecht. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> [uli: removed "renesas," prefixes from pfc nodes] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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William Towle authored
Add DT entries for vin0, vin0_pins, and adv7612. Sets the 'default-input' property for ADV7612, enabling image and video capture without the need to have userspace specifying routing. Signed-off-by: William Towle <william.towle@codethink.co.uk> Signed-off-by: Rob Taylor <rob.taylor@codethink.co.uk> [uli: added interrupt, renamed endpoint, merged default-input] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Chris Brandt authored
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Chris Brandt authored
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
Since 16ccaf5b ("pinctrl: sh-pfc: Accept standard function, pins and groups properties") renesas pfc drivers accept generic "function", "pins" and "groups" properties. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Chris Brandt authored
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Chris Brandt authored
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 parts of the MSIOF0/1 device nodes. Based on the original (and large) patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the MSIOF0/1 clocks and their parent, MP clock in the R8A7792 device tree. Based on the original (and large) patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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