- 24 Sep, 2022 24 commits
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Chunfeng Yun authored
Use FIELD_PREP() macro to prepare bits field value, then no need define macros of bits offset. Signed-off-by:
Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-8-chunfeng.yun@mediatek.comSigned-off-by:
Vinod Koul <vkoul@kernel.org>
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Chunfeng Yun authored
Use GENMASK() and BIT() macros to generate mask and bits Signed-off-by:
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Chunfeng Yun authored
The new helper will use FIELD_PREP() macro to prepare bits value according to mask, then we no need do it anymore. Signed-off-by:
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Chunfeng Yun authored
No need define private register access helpers, use common ones defined in phy-mtk-io.h Signed-off-by:
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Chunfeng Yun authored
Prefer to make use of FIELD_PREP() macro to prepare bitfield value, then no need local ones anymore. Signed-off-by:
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Chunfeng Yun authored
Prefer to make use of FIELD_PREP() macro to prepare bitfield value, then no need local ones anymore. Signed-off-by:
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Chunfeng Yun authored
Due to FIELD_PREP() macro can be used to prepare a bitfield value, local ones can be remove; add the new helper to make bitfield update easier. Signed-off-by:
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Johan Hovold authored
Drop the DP_COM control block flag from the configuration data, which is set for all combo PHYs and hence no longer needed since the QMP driver split. Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20220920073826.20811-18-johan+linaro@kernel.orgSigned-off-by:
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Johan Hovold authored
For legacy reasons, there are two configuration parameters that appear to describe the number of lanes a PHY has, even if "nlanes" was actually used for a different purpose. Replace them both with a new field simply named "lanes". Signed-off-by:
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Johan Hovold authored
For legacy reasons, there are two configuration parameters that describe the number of lanes a PHY has. Replace them both with a new field simply named "lanes". Signed-off-by:
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Johan Hovold authored
For legacy reasons, there are two configuration parameters that appear to describe the number of lanes a PHY has, even if "nlanes" was actually used for a different purpose. Replace them both with a new field simply named "lanes". Signed-off-by:
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Johan Hovold authored
The nlanes configuration parameter is really the number of PHYs provided by this QMP block on MSM8996. Rename it accordingly. Signed-off-by:
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Johan Hovold authored
For legacy reasons, there are two configuration parameters that describe the number of lanes a PHY has. Replace them both with a new field simply named "lanes". Signed-off-by:
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Johan Hovold authored
Only the MSM8996 PCIe QMP driver uses the index field so drop it from the other drivers. Signed-off-by:
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Johan Hovold authored
Drop the unused mask_com_pcs_ready field from struct qmp_phy_cfg. Signed-off-by:
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Johan Hovold authored
Drop the unused mode field from struct qmp_phy. Signed-off-by:
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Johan Hovold authored
Drop the removed mode field from the struct qmp_phy kernel doc. Signed-off-by:
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Johan Hovold authored
Only the combo QMP driver needs a forward declaration of struct qmp_phy. Signed-off-by:
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Johan Hovold authored
Drop the unnecessary PHY init and exit callback wrappers. Signed-off-by:
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Johan Hovold authored
Drop the unnecessary PHY init and exit callback wrappers. Signed-off-by:
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Johan Hovold authored
The configuration PHY type is no longer needed since the QMP driver split so drop it from the configuration and suspend callbacks. Signed-off-by:
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Johan Hovold authored
The configuration PHY type is no longer used since the QMP driver split so drop it from the configuration. Signed-off-by:
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Johan Hovold authored
The configuration PHY type is no longer used since the QMP driver split so drop it from the configuration. Signed-off-by:
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Johan Hovold authored
The configuration PHY type is no longer used since the QMP driver split so drop it from the configurations. Signed-off-by:
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- 20 Sep, 2022 16 commits
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Matt Ranostay authored
When multiple serdes instances are initialized the first will succeed but additional will conflict over clocks names and probing fails. Signed-off-by:
Matt Ranostay <mranostay@ti.com> Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20220909200026.3422-1-mranostay@ti.comSigned-off-by:
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Chunfeng Yun authored
The PHY type is not set if the index is non zero, prepare type value according to the index, like as mask value. Fixes: 39099a44 ("phy: phy-mtk-tphy: support type switch by pericfg") Signed-off-by:
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Chunfeng Yun authored
No need repeat to clear utmi 0 register in ->power_on() and ->power_off(), just do it in ->init() Signed-off-by:
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Chunfeng Yun authored
Disable DP/DM's GPIO mode for all usb2 phy, not only for the first usb2 phy which usually supports dual-role mode. Signed-off-by:
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Chunfeng Yun authored
INTR's value is able autoload from hardware efuse by default, when software tries to update its value, should disable hardware efuse firstly. Reviewed-by:
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Chunfeng Yun authored
Add a property to set usb2 phy's pre-emphasis, it's disabled by default on some SoCs. Signed-off-by:
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Chunfeng Yun authored
Add a property to set usb2 phy's pre-emphasis, which used to widen eye opening and boost eye swing. Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Chunfeng Yun authored
Add support ethernet SGMII, forgot to update type supported. Fixes: c01608b3 ("dt-bindings: phy: mediatek: tphy: support type switch by pericfg") Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Yang Yingliang authored
Use devm_platform_get_and_ioremap_resource() to simplify code. Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220914133728.3781160-1-yangyingliang@huawei.comSigned-off-by:
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Liang He authored
As the of_get_parent() will increase the refcount of the node->parent and the reference will be discarded, so we should hold the reference with which we can decrease the refcount when done. Fixes: 8eff8b4e ("phy: amlogic: phy-meson-axg-mipi-pcie-analog: add support for MIPI DSI analog") Signed-off-by:
Liang He <windhl@126.com> Link: https://lore.kernel.org/r/20220915093506.4009456-1-windhl@126.comSigned-off-by:
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Geert Uytterhoeven authored
Convert the Renesas R-Car Gen2 USB PHY Device Tree binding documentation to json-schema. Add missing properties. Rename the device node from "usb-phy" to "usb-phy-controller", as it does not represent a USB PHY itself, and thus does not have a "#phy-cells" property. Rename the child nodes from "usb-channel" to "usb-phy", as these do represent USB PHYs. Drop the second example, as it doesn't add any value. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
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Johan Hovold authored
The PCS_USB register block lives at an offset of 0x300 from the PCS region on SC8280XP so add the missing offset to avoid corrupting unrelated registers on runtime suspend. Note that this region should probably be described separately in the binding. Fixes: a2e927b0 ("phy: qcom-qmp-combo: Add sc8280xp USB/DP combo phys") Signed-off-by:
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Chris Morgan authored
Add support for the Rockchip RK3568 DSI-DPHY. Registers were taken from the BSP kernel driver and wherever possible cross referenced with the TRM. Refactor the code to allow the different compatible strings to set either a max 1GHz timing table (all existing hardware) or a max 2.5GHz timing table (the new RK356x). This works (for me) on both an RK3326 (PX30) and a new RK3566 device. Signed-off-by:
Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20220919164616.12492-3-macroalpha82@gmail.comSigned-off-by:
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Chris Morgan authored
Add a compatible string for the rk3568 dsi-dphy. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220919164616.12492-2-macroalpha82@gmail.comSigned-off-by:
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Iskren Chernev authored
The Sm6115 UFS PHY has 2 clocks and 3 regs. Signed-off-by:
Iskren Chernev <iskren.chernev@gmail.com> Acked-by:
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Johan Hovold authored
Commit 5e17b95d ("phy: qcom-qmp: Utilize fully-specified DT registers") added a workaround for legacy devicetrees which did not specify register regions for the second lane of some dual-lane PHYs. At the time, the only two dual-lane PHYs supported by mainline were "qcom,sdm845-qmp-usb3-phy" and "qcom,sdm845-qmp-ufs-phy" and they had been added to the binding less than six months before the binding was fixed. Presumably no one is using four-year old SDM845 dtbs with mainline anymore so drop the workaround for malformed devicetrees. In the unlikely event that anyone complains, we can consider reverting. Signed-off-by:
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