Merge tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

SoC changes for omaps for v4.10 merge window:

- Add hwmod interconnect target wrapper module data for crypto
  accelerators for am3xxx, am43xx and dra7

- Add support for dra71x family of SoCs

- PM fixes for omap4/5 needed for omap5 cpuidle

* tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: DRA7: hwmod: Do not register RTC on DRA71
  ARM: OMAP2+: board-generic: add support for DRA71x family
  ARM: AMx3xx: hwmod: Add data for RNG
  ARM: AM43xx: hwmod: Add data for DES
  ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only
  ARM: DRA7: hwmod: Add data for RNG IP
  ARM: DRA7: hwmod: Add data for SHA IP
  ARM: DRA7: hwmod: Add data for AES IP
  ARM: DRA7: hwmod: Add data for DES IP
  ARM: OMAP5: Add basic cpuidle MPU CSWR support
  ARM: OMAP4+: Fix bad fallthrough for cpuidle
  ARM: OMAP5: Fix mpuss_early_init
  ARM: OMAP5: Fix build for PM code
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'soc-for-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/soc

STM32 SOC updates for v4.10, round 1.

Highlights:
----------
 - Add new MCU SOC STM32F746

* tag 'soc-for-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: Kconfig: Introduce MACH_STM32F746 flag
  ARM: mach-stm32: Add a new SOC - STM32F746
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'imx-soc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

i.MX SoC changes for 4.10:
 - Drop PL310_ERRATA_769419 for Vybrid, as it turns out that the SoC
   integrates revision r3p2 of the L2C-310, which is not affected by
   errata 769419.
 - Support perf for i.MX6 Multi-Mode DDR Controller (MMDC), so that we
   can profile memory access performance.
 - Support i.MX6ULL SoC using i.MX6UL base, since it's a derivative of
   i.MX6UL and pin-to-pin compatible with i.MX6UL.

* tag 'imx-soc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: mach-imx6ul: add imx6ull support
  ARM: imx: Drop errata 769419 for Vybrid
  ARM: imx: mmdc perf function support i.MX6QP
  ARM: imx: Added perf functionality to mmdc driver
Signed-off-by: Olof Johansson <olof@lixom.net>

- clean up mach-mediatek Makefile as kbuild only descends into the folder if
  ARCH_MEDIATEK is enabled

* tag 'v4.9-next-kconfig' of https://github.com/mbgg/linux-mediatek:
  ARM: mediatek: clean up mach-mediatek/Makefile
Signed-off-by: Olof Johansson <olof@lixom.net>

The EBI lookup is not longer in use: this has been moved to the
NAND chip driver. The syscon node is better accessed indirectly
using the regmap like the NAND chip driver does, so let's use
the syscon to set the modem control signals RTS/CTS through the
dedicated syscon register.

We also migrate the decoder status "SC_DEC" register that
enumerate the logic modules using syscon.

Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

This is the pxa changes for v4.10 cycle.

This cycle is covering :
 - some clock fixes common with sa1100 architecture
 - the consequence of the pxa_camera conversion to v4l2
 - a small irq related fix for pxa25x device-tree only

* tag 'pxa-for-4.10' of https://github.com/rjarzmik/linux:
  ARM: pxa: fix pxa25x interrupt init
  ARM: pxa: remove duplicated include from spitz.c
  ARM: pxa: em-x270: use the new pxa_camera platform_data
  ARM: pxa: ezx: use the new pxa_camera platform_data
  ARM: pxa: mioa701: use the new pxa_camera platform_data
  ARM: pxa: pxa_cplds: honor probe deferral
  ARM: sa11x0/pxa: get rid of get_clock_tick_rate
  watchdog: sa11x0/pxa: get rid of get_clock_tick_rate
  ARM: sa11x0/pxa: acquire timer rate from the clock rate
  clk: pxa25x: OSTIMER0 clocks from the main oscillator
Signed-off-by: Olof Johansson <olof@lixom.net>

NXP LPC32xx ARM SoC cleanup for v4.10

This includes a few cleanup changes:
* remove unused header file mach/irqs.h;
* remove unused header file clock.h.

* tag 'lpc32xx-cleanup-v4.10' of https://github.com/sylemieux/linux-lpc32xx:
  ARM: lpc32xx: remove unused header file clock.h
  ARM: lpc32xx: remove unused header file mach/irqs.h
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-soc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Renesas ARM Based SoC Updates for v4.10

Enhancements:
* Basic support for r8a7743 SoC; only SoC code so far
* Select errata 798181 for SoCs with CA15 cores

Clean-up:
* Consolidate R8A7743 and R8A779[234] machine definitions

Documentation:
* Add Marzen, Gose and Alt board part numbers to DT bindings
* Document SK-RZG1M board

* tag 'renesas-soc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7779/marzen: Add board part number to DT bindings
  ARM: shmobile: select errata 798181 for SoCs with CA15 cores
  ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions
  ARM: shmobile: r8a7793/gose: Add board part number to DT bindings
  ARM: shmobile: r8a7794/alt: Add board part number to DT bindings
  ARM: shmobile: document SK-RZG1M board
  ARM: shmobile: r8a7743: basic SoC support
  ARM: shmobile: only call rcar_gen2_clocks_init() if present
  ARM: shmobile: Sort Kconfig selections
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch introduces the MACH_STM32F746 to make possible to only select
STM32F746 pinctrl driver

By default, all the MACH_STM32Fxxx flags will be set with STM32 defconfig.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>

imx6ull is derived SoC from imx6ul.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

According to the datasheet, VF610 uses revision r3p2 of the L2C-310
block, same as i.MX6Q+, which does not require a software workaround for
ARM errata 769419.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

i.MX6QP added new register bit PROFILE_SEL in MADPCR0.
need set it at perf start.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

RTC is not available on DRA71x, so accessing any of the RTC
register or clkctrl register will lead to a crash. So, do not
register RTC hwmod for DRA71x.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

DRA71x processor family is a derivative of DRA722 ES2.0 targetted for
infotainment systems.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Hardware random number generator is present in both AM33xx and AM43xx
SoC's. So moving the hwmod data to common data.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

AM43xx SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Using HWSUP for l4sec clock domain is causing warnings in HWMOD code for
DRA7. Based on some observations, once the clock domain goes into an IDLE
state (because of no activity etc), the IDLEST for the module goes to '0x2'
value which means Interface IDLE condition. So far so go, however once the
MODULEMODE is set to disabled for the particular IP, the IDLEST for the
module should go to '0x3', per the HW AUTO IDLE protocol. However this is
not observed and there is no reason per the protocl for the transition to
not happen. This could potentially be a bug in the HW AUTO state-machine.

Work around for this is to use SWSUP only for the particular clockdomain.
With this all the transitions of IDLEST happen correctly and warnings
don't occur.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

DRA7 SoC contains hardware random number generator. Add hwmod data for
this IP so that it can be utilized.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: squashed the RNG hwmod IP flag fixes from Lokesh,
                  squashed the HS chip fix from Daniel Allred]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

DRA7 SoC contains SHA crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

DRA7 SoC contains AES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: squash in support for both AES1 and AES2 cores]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

DRA7 SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Merge tag 'davinci-for-v4.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

DaVinci SoC support improvements mainly towards an effort to
get to working USB support.

- use CFGCHIP syscon device to access common registers

- define platform data and device tree nodes for newly
  introduced USB phy driver

- clock lookup and auxdata lookup for USB phy and also
  for LCDC (LCD controller)

* tag 'davinci-for-v4.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da8xx: register USB PHY clocks in the DT file
  ARM: davinci: da8xx: add usb phy clocks
  ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for USB phy
  ARM: davinci: da8xx: Add USB device names to clock lookup tables
  ARM: davinci: da8xx: Add USB PHY platform device
  ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for lcdc
  ARM: davinci: da8xx: Add full regulator constraints for non-DT boot
  ARM: davinci: da8xx: Add CFGCHIP syscon platform device
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'davinci-for-v4.10/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

Clean-up some unnecessary code from mach-davinci.

- Remove now unneeded dma resources where drivers
  are already converted to use the dma_slave_map[]
  structure.

- Remove some duplicated defines related to USB support.

* tag 'davinci-for-v4.10/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da8xx: Remove duplicated defines
  ARM: davinci: dm365: Remove DMA resources for SPI
  ARM: davinci: dm355: Remove DMA resources for SPI
  ARM: davinci: devices: Remove DMA resources for MMC
  ARM: davinci: devices-da8xx: Remove DMA resources for MMC and SPI
Signed-off-by: Olof Johansson <olof@lixom.net>

Add OMAP5 CPUIDLE support.

This patch adds MPUSS low power states in cpuidle.

        C1 - CPU0 WFI + CPU1 WFI + MPU ON
        C2 - CPU0 RET + CPU1 RET + MPU CSWR

Modified from TI kernel tree commit 605967fd2205 ("ARM: DRA7: PM:
cpuidle MPU CSWR support") except enable cpuidle for omap5 instead
of dra7.

According to Nishanth Menon <nm@ti.com>, cpuidle on dra7 is not
supported properly in the hardware so we don't want to enable it.
However, for omap5 this adds some nice power savings. Note that
the TI 3.8 based tree has other cpuidle states that we may be able
to enable later on.

On omap5-uevm, the power consumption eventually settles down to about
920mW with ehci-omap and ohci-omap3 unloaded compared to about 1.7W
without these patches. Note that it seems to take few minutes after
booting for the idle power to go down to 920mW from 1.3W, no idea so
far what might be causing that.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[ j-keerthy@ti.com rework on 3.14]
Signed-off-by: Keerthy <j-keerthy@ti.com>
[nm@ti.com: updates based on profiling]
[tony@atomide.com: dropped CPUIDLE_FLAG_TIME_VALID no longer used,
changed for omap5 only as requested by Nishanth, updated comments]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

We don't want to fall through to a bunch of errors for retention
if PM_OMAP4_CPU_OSWR_DISABLE is not configured for a SoC.

Fixes: 6099dd37 ("ARM: OMAP5 / DRA7: Enable CPU RET on suspend")
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

We need to properly initialize mpuss also on omap5 like we do on omap4.
Otherwise we run into similar kexec problems like we had on omap4 when
trying to kexec from a kernel with PM initialized.

Fixes: 0573b957 ("ARM: OMAP4+: Prevent CPU1 related hang with kexec")
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

It's CONFIG_SOC_OMAP5, not CONFIG_ARCH_OMAP5. Looks like make randconfig
builds have not hit this one yet.

Fixes: b3bf289c ("ARM: OMAP2+: Fix build with CONFIG_SMP and CONFIG_PM
is not set")
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

In the device-tree case, the root interrupt controller cannot be
accessed through the 6th coprocessor, contrary to pxa27x and pxa3xx
architectures.

Fix it to behave as in non-devicetree builds.

Fixes: 32f17997 ("ARM: pxa: remove irq init from dt machines")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Select ARM errata 798181 on SoCs cores affected CA15 cores.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

This partially reverts commit 12beb346 ("Merge tag 'pxa-fixes-v4.8'
of https://github.com/rjarzmik/linux into randconfig-4.8").

This former patch introduced accidentally a double include of module.h.
Signed-off-by: Wei Yongjun <weiyj.lk@gmail.com>
Acked-by: Paul Gortmaker <paul.gortmaker@windriver.com>
[amended commit message and 2 comments]
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

The four SoCs use identical machine operations, consolidate them into
two machine definitions in a single file.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Document the SK-RZG1M device tree bindings, listing it as a supported board.

This allows to use checkpatch.pl to validate .dts files referring to the
SK-RZG1M board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add minimal support for the RZ/G1M (R8A7743) SoC.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The RZ/G1M (r8a7743) uses the R-Car Gen2 core, but not the R-Car Gen2 clock
driver. This is a harbinger of a transition for R-Car Gen2 SoCs. As the
process to get all the required pieces in place is somewhat complex it
seems useful to try to disentangle dependencies where possible.

The approach here is to temporarily disable calling rcar_gen2_clocks_init()
if no R-Car Gen2 SoC are configured and thus the symbol will not be
present.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

The usb20_phy clock needs to be registered for the driver to be able
to get and enable a clock. Currently the usb phy clocks are registered
from board files, which will not be called during a device tree based
boot.

To be able to probe correctly usb form a device tree boot, register
the usb phy clocks from the DT specific init.

Unfortunately, davinci does not have proper clock support on device tree
yet, so by registering the clock from the DT specific file we are
forced to hardcode the parent clock, and cannot select refclkin as
parent for any of the phy clocks of the da850 family.

As none of the current da850 based boards currently in mainline use
refclkin as source. I guess we can live with this limitation until clocks
are correctly represented through CCF/device tree.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
[Added error checking]
Signed-off-by: David Lechner <david@lechnology.com>
[nsekhar@ti.com: typo fixes in commit message]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>