Commits · aa11e3a8a6d9f92c3fe4b91a9aca5d8c23d55d4d · Kirill Smelkov / linux

14 Jan, 2013 1 commit
- Merge branch 'kvm-ppc-next' of https://github.com/agraf/linux-2.6 into queue · aa11e3a8
  Gleb Natapov authored Jan 14, 2013
  
  aa11e3a8
10 Jan, 2013 11 commits

KVM: trace: Fix exit decoding. · f79ed82d

Cornelia Huck authored Jan 08, 2013

trace_kvm_userspace_exit has been missing the KVM_EXIT_WATCHDOG exit.

CC: Bharat Bhushan <r65777@freescale.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

f79ed82d

KVM: MMU: fix infinite fault access retry · 7751babd

Xiao Guangrong authored Jan 08, 2013

We have two issues in current code:
- if target gfn is used as its page table, guest will refault then kvm will use
  small page size to map it. We need two #PF to fix its shadow page table

- sometimes, say a exception is triggered during vm-exit caused by #PF
  (see handle_exception() in vmx.c), we remove all the shadow pages shadowed
  by the target gfn before go into page fault path, it will cause infinite
  loop:
  delete shadow pages shadowed by the gfn -> try to use large page size to map
  the gfn -> retry the access ->...

To fix these, we can adjust page size early if the target gfn is used as page
table
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

7751babd

KVM: MMU: fix Dirty bit missed if CR0.WP = 0 · c2288505

Xiao Guangrong authored Jan 08, 2013

If the write-fault access is from supervisor and CR0.WP is not set on the
vcpu, kvm will fix it by adjusting pte access - it sets the W bit on pte
and clears U bit. This is the chance that kvm can change pte access from
readonly to writable

Unfortunately, the pte access is the access of 'direct' shadow page table,
means direct sp.role.access = pte_access, then we will create a writable
spte entry on the readonly shadow page table. It will cause Dirty bit is
not tracked when two guest ptes point to the same large page. Note, it
does not have other impact except Dirty bit since cr0.wp is encoded into
sp.role

It can be fixed by adjusting pte access before establishing shadow page
table. Also, after that, no mmu specified code exists in the common function
and drop two parameters in set_spte
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

c2288505

KVM: PPC: BookE: Add EPR ONE_REG sync · 324b3e63

Alexander Graf authored Jan 04, 2013

We need to be able to read and write the contents of the EPR register
from user space.

This patch implements that logic through the ONE_REG API and declares
its (never implemented) SREGS counterpart as deprecated.
Signed-off-by: Alexander Graf <agraf@suse.de>

324b3e63

KVM: PPC: BookE: Implement EPR exit · 1c810636

Alexander Graf authored Jan 04, 2013

The External Proxy Facility in FSL BookE chips allows the interrupt
controller to automatically acknowledge an interrupt as soon as a
core gets its pending external interrupt delivered.

Today, user space implements the interrupt controller, so we need to
check on it during such a cycle.

This patch implements logic for user space to enable EPR exiting,
disable EPR exiting and EPR exiting itself, so that user space can
acknowledge an interrupt when an external interrupt has successfully
been delivered into the guest vcpu.
Signed-off-by: Alexander Graf <agraf@suse.de>

1c810636

KVM: PPC: BookE: Emulate mfspr on EPR · 37ecb257

Alexander Graf authored Jan 04, 2013

The EPR register is potentially valid for PR KVM as well, so we need
to emulate accesses to it. It's only defined for reading, so only
handle the mfspr case.
Signed-off-by: Alexander Graf <agraf@suse.de>

37ecb257

KVM: PPC: BookE: Allow irq deliveries to inject requests · b8c649a9

Alexander Graf authored Dec 20, 2012

When injecting an interrupt into guest context, we usually don't need
to check for requests anymore. At least not until today.

With the introduction of EPR, we will have to create a request when the
guest has successfully accepted an external interrupt though.

So we need to prepare the interrupt delivery to abort guest entry
gracefully. Otherwise we'd delay the EPR request.
Signed-off-by: Alexander Graf <agraf@suse.de>

b8c649a9

KVM: PPC: Fix mfspr/mtspr MMUCFG emulation · f2be6550

Mihai Caraman authored Dec 20, 2012

On mfspr/mtspr emulation path Book3E's MMUCFG SPR with value 1015 clashes
with G4's MSSSR0 SPR. Move MSSSR0 emulation from generic part to Books3S.
MSSSR0 also clashes with Book3S's DABRX SPR. DABRX was not explicitly
handled so Book3S execution flow will behave as before.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>

f2be6550

KVM: PPC: Book3S: PR: Enable alternative instruction for SC 1 · 50c7bb80

Alexander Graf authored Dec 14, 2012

When running on top of pHyp, the hypercall instruction "sc 1" goes
straight into pHyp without trapping in supervisor mode.

So if we want to support PAPR guest in this configuration we need to
add a second way of accessing PAPR hypercalls, preferably with the
exact same semantics except for the instruction.

So let's overlay an officially reserved instruction and emulate PAPR
hypercalls whenever we hit that one.
Signed-off-by: Alexander Graf <agraf@suse.de>

50c7bb80

KVM: PPC: Only WARN on invalid emulation · 5a33169e

Alexander Graf authored Dec 14, 2012

When we hit an emulation result that we didn't expect, that is an error,
but it's nothing that warrants a BUG(), because it can be guest triggered.

So instead, let's only WARN() the user that this happened.
Signed-off-by: Alexander Graf <agraf@suse.de>

5a33169e

KVM: PPC: Fix SREGS documentation reference · 68e2ffed

Mihai Caraman authored Dec 11, 2012

Reflect the uapi folder change in SREGS API documentation.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
Reviewed-by: Amos Kong <kongjianjun@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>

68e2ffed

09 Jan, 2013 9 commits

KVM: s390: Gracefully handle busy conditions on ccw_device_start · b26ba22b

Christian Borntraeger authored Jan 07, 2013

In rare cases a virtio command might try to issue a ccw before a former
ccw was answered with a tsch. This will cause CC=2 (busy). Lets just
retry in that case.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

b26ba22b

KVM: s390: Dynamic allocation of virtio-ccw I/O data. · 73fa21ea

Cornelia Huck authored Jan 07, 2013

Dynamically allocate any data structures like ccw used when
doing channel I/O. Otherwise, we'd need to add extra serialization
for the different callbacks using the same data structures.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

73fa21ea