- 17 Apr, 2008 40 commits
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Glauber de Oliveira Costa authored
it is always integrated, so define as 1. Signed-off-by:
Glauber Costa <gcosta@redhat.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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Glauber de Oliveira Costa authored
it does not need to be inside lock. Do the way i386 does. Signed-off-by:
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Glauber de Oliveira Costa authored
This is done so we call setup_secondary_clock() in the same place x86_64 does. A separate patch for this is appearantly not needed. But clock initialization is such a delicate thing, that it's safer to do this way Signed-off-by:
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Glauber de Oliveira Costa authored
the call to idle is guaranteed to do it. Signed-off-by:
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Glauber de Oliveira Costa authored
This matches x86_64 behaviour, which is a superior one IMHO Signed-off-by:
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Glauber de Oliveira Costa authored
now that it is the same between arches, put it into smpboot.c Signed-off-by:
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Glauber de Oliveira Costa authored
Call it conditionally for secondary cpus. This behaviour matches i386 Signed-off-by:
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Glauber de Oliveira Costa authored
Call this function instead of identify_cpu in bugs_64.c Signed-off-by:
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Glauber de Oliveira Costa authored
provide two specialized identify_secondary_cpu() and identify_boot_cpu() routines for x86_64. Although not strictly needed, they are functionally correct, and will ease integration with i386 Signed-off-by:
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Glauber de Oliveira Costa authored
This will ease integration with i386 Signed-off-by:
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Glauber de Oliveira Costa authored
The split of smp_store_cpu_info in a quirks-only part will ease integration with x86_64 Signed-off-by:
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Glauber de Oliveira Costa authored
It is used to match i386. The definition for the non-paravirt case is moved to smp.h instead of smp_32.h Signed-off-by:
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Glauber de Oliveira Costa authored
This patch replaces apic_read() for apic_read_around() and apic_write for apic_write_around() in smpboot_64.c We do it to have a common usage between x86_64 and i386. In the former, it will always simply expand to apic_write Signed-off-by:
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Glauber de Oliveira Costa authored
Add loglevel facilities to printks in __inquire_remote_apic. the levels are the ones to match x86_64 ones. Signed-off-by:
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Glauber de Oliveira Costa authored
change some variables' types in __inquire_remote_apic to match x86_64 Signed-off-by:
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Pavel Machek authored
Fix coding style in pci-dma_64.c and add stubs for documentation. I hope someone fills the rest, I understand maybe off and soft... Signed-off-by:
Pavel Machek <pavel@suse.cz> Signed-off-by:
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by:
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Alexey Starikovskiy authored
[ mingo@elte.hu: fix boot regression. ] Signed-off-by:
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
Signed-off: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: -
Yinghai Lu authored
When acpi=off or there is no SRAT defined, apicid_to_node is got from K8 Northbridge PCI configuration space in k8_scan_nodes() in arch/x86_64/mm/k8toplogy.c. The problem is that it assumes bsp apic id is 0 at that point. For four socket system with Quad core cpus installed, all cpus apic id is offset by 4, and bsp apic id is 4. For eight socket system with dual core cpus installed, all cpus apic id is offset by 2, and bsp apic id is 2. We need get boot_cpu_id --- bsp apic id, before k8_scan_nodes by called. So create early_acpi_boot_init and early_get_smp_config for get boot_cpu_id. Signed-off-by:
Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by:
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Alexey Starikovskiy authored
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Mikael Pettersson authored
<asm-x86/nops.h> describes certain multibyte instructions as "generic" nops when in fact they aren't nops at all in 64-bit mode (missing REX.W causing truncation of a register). Update the comment to state that K8 or P6 style nops should be used in 64-bit mode. This matches what the alternatives code does. Signed-off-by:
Mikael Pettersson <mikpe@it.uu.se> Signed-off-by:
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Johannes Weiner authored
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Johannes Weiner <hannes@saeurebad.de> Signed-off-by:
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Jan Beulich authored
Otherwise, enabling (or better, subsequent disabling) of single stepping would cause a kernel oops on CPUs not having this MSR. The patch could have been added a conditional to the MSR write in user_disable_single_step(), but centralizing the updates seems safer and (looking forward) better manageable. Signed-off-by:
Jan Beulich <jbeulich@novell.com> Cc: Markus Metzger <markus.t.metzger@intel.com> Signed-off-by:
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Gautham R Shenoy authored
In the x86 native_smp_send_reschedule_function(), don't send the IPI if the cpu has gone offline already. Warn nevertheless!! Signed-off-by:
Gautham R Shenoy <ego@in.ibm.com> Signed-off-by:
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stephane eranian authored
adds AMD Northbridge config MSR definition Signed-off-by:
Stephane Eranian <eranian@gmail.com> Signed-off-by:
Robert Richter <robert.richter@amd.com> Signed-off-by:
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stephane eranian authored
adds cpu_has_arch_perfmon to test presence of architectural perfmon on Intel x86 processor Signed-off-by:
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Joe Perches authored
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Joe Perches <joe@perches.com> arch/x86/kernel/reboot.c | 1 - include/asm-x86/elf.h | 5 ++--- include/asm-x86/posix_types.h | 8 +------- include/asm-x86/processor.h | 3 +-- include/asm-x86/unistd.h | 8 +------- 5 files changed, 5 insertions(+), 20 deletions(-) Signed-off-by:
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Paolo Ciarrocchi authored
Fix: ERROR: do not initialise externals to 0 or NULL Signed-off-by:
Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by:
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Yinghai Lu authored
otherwise Vmemmap and High Kernel Mapping string is not showing up. Signed-off-by:
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Yinghai Lu authored
store initial_apicid from early identify. it is could be different from phys_proc_id later. also print it out in /proc/cpuinfo. Signed-off-by:
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Ingo Molnar authored
all reboot details are handled in reboot.c and quirks are handled via reboot_fixups_32.c. Signed-off-by:
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