- 04 Apr, 2024 14 commits
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Matthijs Kooijman authored
The pinctrl-single driver handles pin_config_set by looking up the requested setting in a DT-defined lookup table, which defines what bits correspond to each setting. There is no way to add PIN_CONFIG_BIAS_DISABLE entries to the table, since there is instead code to disable the bias by applying the disable values of both the pullup and pulldown entries in the table. However, this code is inside the table-lookup loop, so it would only execute if there is an entry for PIN_CONFIG_BIAS_DISABLE in the table, which can never exist, so this code never runs. This commit lifts the offending code out of the loop, so it just executes directly whenever PIN_CONFIG_BIAS_DISABLE is requested, skippipng the table lookup loop. This also introduces a new `param` variable to make the code slightly more readable. This bug seems to have existed when this code was first merged in commit 9dddb4df ("pinctrl: single: support generic pinconf"). Earlier versions of this patch did have an entry for PIN_CONFIG_BIAS_DISABLE in the lookup table, but that was removed, which is probably how this bug was introduced. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Tony Lindgren <tony@atomide.com> Message-ID: <20240319110633.230329-1-matthijs@stdin.nl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Christophe JAILLET authored
In "struct pcs_function", the 'pgnames' and 'npgnames' fields are unused. This is a left-over from commit 571aec4d ("pinctrl: single: Use generic pinmux helpers for managing functions"); Remove them. Found with cppcheck, unusedStructMember. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Message-ID: <a6b653642298d35b1e3656e9bfc6d1b322fbbe68.1712004518.git.christophe.jaillet@wanadoo.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Christophe JAILLET authored
In "struct max77620_pin_info", the 'pull_config' field is unused. In "struct max77620_pctrl_info", the 'pins_current_opt' field is unused. Remove them. On my x86_64 config, with allmodconfig, this shrinks the struct max77620_pctrl_info from 360 bytes to 296. Found with cppcheck, unusedStructMember. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Message-ID: <60af8968864ae4a83a76e589b39a2b1e1f65c9db.1711992588.git.christophe.jaillet@wanadoo.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Krzysztof Kozlowski authored
Core in platform_driver_register() already sets the .owner, so driver does not need to. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Message-ID: <20240330210954.100842-1-krzysztof.kozlowski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
In the comment, function prototype, and array of strings indentation is kinda broken. Reindent that. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-11-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
One header was misplaced and group pinctrl/* ones to show the relation with the pin control subsystem. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-10-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Simplify the error handling in probe function by switching from dev_err() to dev_err_probe(). Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-9-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
The irqchip field is allocated, assigned but never used. Remove it. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-8-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
When the variable is declared as u8, no need to perform ' & U8_MAX' as it's implied anyway. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-7-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
There are two different ways on how to get HW IRQ number in some functions. Unify that by using temporary variable and irqd_to_hwirq() call. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-6-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Since pin control provides a generic data type and a macro for the pin function definition, use them in the driver. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-5-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
The ports are equivalent from the user's point of view. Don't limit trying them both if writing to one fails. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-4-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
The pin control subsystem internally uses ENOTSUPP for the not supported functionality. The checkpatch is false positive about this error code. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-3-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
If aw9523_hw_init() fails on ->remove() the mutex left alive. Destroy it in that case as well. While at it, remove never true check at the beginning of the function. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-2-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 02 Apr, 2024 1 commit
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Arnd Bergmann authored
This variable has never been used and can be removed to avoid a W=1 warning: drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:837:6: error: variable 'i' set but not used [-Werror,-Wunused-but-set-variable] 837 | int i = 0; Fixes: 87466ccd ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Message-ID: <20240322132205.906729-1-arnd@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 28 Mar, 2024 10 commits
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Thomas Richard authored
The goal is to extend the active period of pinctrl. Some devices may need active pinctrl after suspend() and/or before resume(). So move suspend()/resume() to suspend_noirq()/resume_noirq() in order to have active pinctrl until suspend_noirq() (included), and from resume_noirq() (included). The deprecated API has been removed to use the new one (dev_pm_ops struct). No need to check the pointer returned by dev_get_drvdata(), as platform_set_drvdata() is called during the probe. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Message-ID: <20240102-j7200-pcie-s2r-v4-2-6f1f53390c85@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Anjelique Melendez authored
Add support for qcom,pmih0108-gpio and qcom,pmd8028-gpio. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Message-ID: <20240326220628.2392802-5-quic_amelende@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Anjelique Melendez authored
Add support for qcom,pmxr2230-gpio and qcom,pm6450-gpio. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Message-ID: <20240326220628.2392802-4-quic_amelende@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Anjelique Melendez authored
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation to include compatible strings for PMIH0108 and PMD8028 PMICs. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20240326220628.2392802-3-quic_amelende@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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David Collins authored
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation to include compatible strings for PMXR2230 and PM6450 PMICs. Signed-off-by: David Collins <quic_collinsd@quicinc.com> Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Acked-by: Krzystof Kozlowski <krzystof.kozlowski@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20240326220628.2392802-2-quic_amelende@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Tengfei Fan authored
Some functions were consolidated in the SM4450 pinctrl driver, but they had not been updated in the binding file before the previous SM4450 pinctrl patch series was merged. Update functions in this binding file to match with SM4450 pinctrl driver. Some functions need to be consolidated and some functions need to be removed. The following functions are removed: - atest_char0, atest_char1, atest_char2, atest_char3 - atest_usb00, atest_usb01, atest_usb02, atest_usb03 - audio_ref - cci_async - cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4 - cmu_rng0, cmu_rng1, cmu_rng2, cmu_rng3 - coex_uart1 - cri_trng0, cri_trng1 - dbg_out - ddr_pxi0, ddr_pxi1 - dp0_hot - gcc_gp1, gcc_gp2, gcc_gp3 - ibi_i3c - jitter_bist - mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3 - mi2s0_data0, mi2s0_data1, mi2s0_sck, mi2s0_ws, mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mi2s_mclk0, mi2s_mclk1 - nav_gpio0, nav_gpio1, nav_gpio2 - phase_flag0, phase_flag1, phase_flag10, phase_flag11, phase_flag12, phase_flag13, phase_flag14, phase_flag15, phase_flag16, phase_flag17, phase_flag18, phase_flag19, phase_flag2, phase_flag20, phase_flag21, phase_flag22, phase_flag23, phase_flag24, phase_flag25, phase_flag26, phase_flag27, phase_flag28, phase_flag29, phase_flag3, phase_flag30, phase_flag31, phase_flag4, phase_flag5, phase_flag6, phase_flag7, phase_flag8, phase_flag9 - pll_bist, pll_clk - prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3 - qdss_gpio0, qdss_gpio1, qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13, qdss_gpio14, qdss_gpio15, qdss_gpio2, qdss_gpio3, qdss_gpio4, qdss_gpio5, qdss_gpio6, qdss_gpio7, qdss_gpio8, qdss_gpio9 - qlink0_wmss - qup0_se5, qup0_se6, qup0_se7, qup1_se5, qup1_se6 - sd_write - tb_trig - tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3 - tmess_prng0, tmess_prng1, tmess_prng2, tmess_prng3 - tsense_pwm1, tsense_pwm2 - uim0_clk, uim0_data, uim0_present, uim0_reset, uim1_clk, uim1_data, uim1_present, uim1_reset - usb0_hs, usb0_phy - vsense_trigger The following functions are added: - atest_char - atest_usb0 - audio_ref_clk - cci - cci_async_in0 - cmu_rng - coex_uart1_rx, coex_uart1_tx - dbg_out_clk - ddr_pxi0_test, ddr_pxi1_test - gcc_gp1_clk, gcc_gp2_clk, gcc_gp3_clk - ibi_i3c_qup0, ibi_i3c_qup1 - jitter_bist_ref - mdp_vsync - nav - phase_flag - pll_bist_sync, pll_clk_aux - prng_rosc - qlink0_wmss_reset - sd_write_protect - tb_trig_sdc1, tb_trig_sdc2 - tgu_ch0_trigout, tgu_ch1_trigout, tgu_ch2_trigout, tgu_ch3_trigout - tmess_prng - tsense_pwm1_out, tsense_pwm2_out - uim0, uim1 - usb0_hs_ac, usb0_phy_ps - vsense_trigger_mirnat - wlan1_adc_dtest0, wlan1_adc_dtest1 Fixes: 7bf8b78f ("dt-bindings: pinctrl: qcom: Add SM4450 pinctrl") Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20240312025807.26075-3-quic_tengfan@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stefan Wahren authored
The BCM2711 allows to read the bias config. So implement pin_conf_get accordingly. The pull resistor values has been taken from the BCM2711/7211 datasheet. This implementation assumes that BCM7211 behaves the same way. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Message-ID: <20240307070113.4888-3-wahrenst@gmx.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stefan Wahren authored
Even the driver already has implemented pin_dbg_show, it could be helpful to implement pin_conf_get for a more generic behavior. Contrary to the BCM2711, the BCM2835 SOC doesn't allow to read the bias config, so the implementation is limited to the basics. Keep ENOTSUPP here, because it's only used internally. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Message-ID: <20240307070113.4888-2-wahrenst@gmx.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Since pin control provides a generic data type for the pin group, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Message-ID: <20240311142346.1261203-1-andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Since pin control provides a generic data type for the pin function, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Message-ID: <20240311140833.1168742-1-andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 24 Mar, 2024 13 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/efi/efiLinus Torvalds authored
Pull EFI fixes from Ard Biesheuvel: - Fix logic that is supposed to prevent placement of the kernel image below LOAD_PHYSICAL_ADDR - Use the firmware stack in the EFI stub when running in mixed mode - Clear BSS only once when using mixed mode - Check efi.get_variable() function pointer for NULL before trying to call it * tag 'efi-fixes-for-v6.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi: efi: fix panic in kdump kernel x86/efistub: Don't clear BSS twice in mixed mode x86/efistub: Call mixed mode boot services on the firmware's stack efi/libstub: fix efi_random_alloc() to allocate memory at alloc_min or higher address
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Thomas Gleixner: - Ensure that the encryption mask at boot is properly propagated on 5-level page tables, otherwise the PGD entry is incorrectly set to non-encrypted, which causes system crashes during boot. - Undo the deferred 5-level page table setup as it cannot work with memory encryption enabled. - Prevent inconsistent XFD state on CPU hotplug, where the MSR is reset to the default value but the cached variable is not, so subsequent comparisons might yield the wrong result and as a consequence the result prevents updating the MSR. - Register the local APIC address only once in the MPPARSE enumeration to prevent triggering the related WARN_ONs() in the APIC and topology code. - Handle the case where no APIC is found gracefully by registering a fake APIC in the topology code. That makes all related topology functions work correctly and does not affect the actual APIC driver code at all. - Don't evaluate logical IDs during early boot as the local APIC IDs are not yet enumerated and the invoked function returns an error code. Nothing requires the logical IDs before the final CPUID enumeration takes place, which happens after the enumeration. - Cure the fallout of the per CPU rework on UP which misplaced the copying of boot_cpu_data to per CPU data so that the final update to boot_cpu_data got lost which caused inconsistent state and boot crashes. - Use copy_from_kernel_nofault() in the kprobes setup as there is no guarantee that the address can be safely accessed. - Reorder struct members in struct saved_context to work around another kmemleak false positive - Remove the buggy code which tries to update the E820 kexec table for setup_data as that is never passed to the kexec kernel. - Update the resource control documentation to use the proper units. - Fix a Kconfig warning observed with tinyconfig * tag 'x86-urgent-2024-03-24' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/boot/64: Move 5-level paging global variable assignments back x86/boot/64: Apply encryption mask to 5-level pagetable update x86/cpu: Add model number for another Intel Arrow Lake mobile processor x86/fpu: Keep xfd_state in sync with MSR_IA32_XFD Documentation/x86: Document that resctrl bandwidth control units are MiB x86/mpparse: Register APIC address only once x86/topology: Handle the !APIC case gracefully x86/topology: Don't evaluate logical IDs during early boot x86/cpu: Ensure that CPU info updates are propagated on UP kprobes/x86: Use copy_from_kernel_nofault() to read from unsafe address x86/pm: Work around false positive kmemleak report in msr_build_context() x86/kexec: Do not update E820 kexec table for setup_data x86/config: Fix warning for 'make ARCH=x86_64 tinyconfig'
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull scheduler doc clarification from Thomas Gleixner: "A single update for the documentation of the base_slice_ns tunable to clarify that any value which is less than the tick slice has no effect because the scheduler tick is not guaranteed to happen within the set time slice" * tag 'sched-urgent-2024-03-24' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/doc: Update documentation for base_slice_ns and CONFIG_HZ relation
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git://git.infradead.org/users/hch/dma-mappingLinus Torvalds authored
Pull dma-mapping fixes from Christoph Hellwig: "This has a set of swiotlb alignment fixes for sometimes very long standing bugs from Will. We've been discussion them for a while and they should be solid now" * tag 'dma-mapping-6.9-2024-03-24' of git://git.infradead.org/users/hch/dma-mapping: swiotlb: Reinstate page-alignment for mappings >= PAGE_SIZE iommu/dma: Force swiotlb_max_mapping_size on an untrusted device swiotlb: Fix alignment checks when both allocation and DMA masks are present swiotlb: Honour dma_alloc_coherent() alignment in swiotlb_alloc() swiotlb: Enforce page alignment in swiotlb_alloc() swiotlb: Fix double-allocation of slots due to broken alignment handling
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Oleksandr Tymoshenko authored
Check if get_next_variable() is actually valid pointer before calling it. In kdump kernel this method is set to NULL that causes panic during the kexec-ed kernel boot. Tested with QEMU and OVMF firmware. Fixes: bad267f9 ("efi: verify that variable services are supported") Signed-off-by: Oleksandr Tymoshenko <ovt@google.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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Ard Biesheuvel authored
Clearing BSS should only be done once, at the very beginning. efi_pe_entry() is the entrypoint from the firmware, which may not clear BSS and so it is done explicitly. However, efi_pe_entry() is also used as an entrypoint by the mixed mode startup code, in which case BSS will already have been cleared, and doing it again at this point will corrupt global variables holding the firmware's GDT/IDT and segment selectors. So make the memset() conditional on whether the EFI stub is running in native mode. Fixes: b3810c5a ("x86/efistub: Clear decompressor BSS in native EFI entrypoint") Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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Ard Biesheuvel authored
Normally, the EFI stub calls into the EFI boot services using the stack that was live when the stub was entered. According to the UEFI spec, this stack needs to be at least 128k in size - this might seem large but all asynchronous processing and event handling in EFI runs from the same stack and so quite a lot of space may be used in practice. In mixed mode, the situation is a bit different: the bootloader calls the 32-bit EFI stub entry point, which calls the decompressor's 32-bit entry point, where the boot stack is set up, using a fixed allocation of 16k. This stack is still in use when the EFI stub is started in 64-bit mode, and so all calls back into the EFI firmware will be using the decompressor's limited boot stack. Due to the placement of the boot stack right after the boot heap, any stack overruns have gone unnoticed. However, commit 5c4feadb0011983b ("x86/decompressor: Move global symbol references to C code") moved the definition of the boot heap into C code, and now the boot stack is placed right at the base of BSS, where any overruns will corrupt the end of the .data section. While it would be possible to work around this by increasing the size of the boot stack, doing so would affect all x86 systems, and mixed mode systems are a tiny (and shrinking) fraction of the x86 installed base. So instead, record the firmware stack pointer value when entering from the 32-bit firmware, and switch to this stack every time a EFI boot service call is made. Cc: <stable@kernel.org> # v6.1+ Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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Tom Lendacky authored
Commit 63bed966 ("x86/startup_64: Defer assignment of 5-level paging global variables") moved assignment of 5-level global variables to later in the boot in order to avoid having to use RIP relative addressing in order to set them. However, when running with 5-level paging and SME active (mem_encrypt=on), the variables are needed as part of the page table setup needed to encrypt the kernel (using pgd_none(), p4d_offset(), etc.). Since the variables haven't been set, the page table manipulation is done as if 4-level paging is active, causing the system to crash on boot. While only a subset of the assignments that were moved need to be set early, move all of the assignments back into check_la57_support() so that these assignments aren't spread between two locations. Instead of just reverting the fix, this uses the new RIP_REL_REF() macro when assigning the variables. Fixes: 63bed966 ("x86/startup_64: Defer assignment of 5-level paging global variables") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/2ca419f4d0de719926fd82353f6751f717590a86.1711122067.git.thomas.lendacky@amd.com
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Tom Lendacky authored
When running with 5-level page tables, the kernel mapping PGD entry is updated to point to the P4D table. The assignment uses _PAGE_TABLE_NOENC, which, when SME is active (mem_encrypt=on), results in a page table entry without the encryption mask set, causing the system to crash on boot. Change the assignment to use _PAGE_TABLE instead of _PAGE_TABLE_NOENC so that the encryption mask is set for the PGD entry. Fixes: 533568e0 ("x86/boot/64: Use RIP_REL_REF() to access early_top_pgt[]") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/8f20345cda7dbba2cf748b286e1bc00816fe649a.1711122067.git.thomas.lendacky@amd.com
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Tony Luck authored
This one is the regular laptop CPU. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240322161725.195614-1-tony.luck@intel.com
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Adamos Ttofari authored
Commit 67236547 ("x86/fpu: Update XFD state where required") and commit 8bf26758 ("x86/fpu: Add XFD state to fpstate") introduced a per CPU variable xfd_state to keep the MSR_IA32_XFD value cached, in order to avoid unnecessary writes to the MSR. On CPU hotplug MSR_IA32_XFD is reset to the init_fpstate.xfd, which wipes out any stale state. But the per CPU cached xfd value is not reset, which brings them out of sync. As a consequence a subsequent xfd_update_state() might fail to update the MSR which in turn can result in XRSTOR raising a #NM in kernel space, which crashes the kernel. To fix this, introduce xfd_set_state() to write xfd_state together with MSR_IA32_XFD, and use it in all places that set MSR_IA32_XFD. Fixes: 67236547 ("x86/fpu: Update XFD state where required") Signed-off-by: Adamos Ttofari <attofari@amazon.de> Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240322230439.456571-1-chang.seok.bae@intel.com Closes: https://lore.kernel.org/lkml/20230511152818.13839-1-attofari@amazon.de
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Tony Luck authored
The memory bandwidth software controller uses 2^20 units rather than 10^6. See mbm_bw_count() which computes bandwidth using the "SZ_1M" Linux define for 0x00100000. Update the documentation to use MiB when describing this feature. It's too late to fix the mount option "mba_MBps" as that is now an established user interface. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240322182016.196544-1-tony.luck@intel.com
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- 23 Mar, 2024 2 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull timer fixes from Thomas Gleixner: "Two regression fixes for the timer and timer migration code: - Prevent endless timer requeuing which is caused by two CPUs racing out of idle. This happens when the last CPU goes idle and therefore has to ensure to expire the pending global timers and some other CPU come out of idle at the same time and the other CPU wins the race and expires the global queue. This causes the last CPU to chase ghost timers forever and reprogramming it's clockevent device endlessly. Cure this by re-evaluating the wakeup time unconditionally. - The split into local (pinned) and global timers in the timer wheel caused a regression for NOHZ full as it broke the idle tracking of global timers. On NOHZ full this prevents an self IPI being sent which in turn causes the timer to be not programmed and not being expired on time. Restore the idle tracking for the global timer base so that the self IPI condition for NOHZ full is working correctly again" * tag 'timers-urgent-2024-03-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: timers: Fix removed self-IPI on global timer's enqueue in nohz_full timers/migration: Fix endless timer requeue after idle interrupts
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull more clocksource updates from Thomas Gleixner: "A set of updates for clocksource and clockevent drivers: - A fix for the prescaler of the ARM global timer where the prescaler mask define only covered 4 bits while it is actully 8 bits wide. This obviously restricted the possible range of prescaler adjustments - A fix for the RISC-V timer which prevents a timer interrupt being raised while the timer is initialized - A set of device tree updates to support new system on chips in various drivers - Kernel-doc and other cleanups all over the place" * tag 'timers-core-2024-03-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/timer-riscv: Clear timer interrupt on timer initialization dt-bindings: timer: Add support for cadence TTC PWM clocksource/drivers/arm_global_timer: Simplify prescaler register access clocksource/drivers/arm_global_timer: Guard against division by zero clocksource/drivers/arm_global_timer: Make gt_target_rate unsigned long dt-bindings: timer: add Ralink SoCs system tick counter clocksource: arm_global_timer: fix non-kernel-doc comment clocksource/drivers/arm_global_timer: Remove stray tab clocksource/drivers/arm_global_timer: Fix maximum prescaler value clocksource/drivers/imx-sysctr: Add i.MX95 support clocksource/drivers/imx-sysctr: Drop use global variables dt-bindings: timer: nxp,sysctr-timer: support i.MX95 dt-bindings: timer: renesas: ostm: Document RZ/Five SoC dt-bindings: timer: renesas,tmu: Document input capture interrupt clocksource/drivers/ti-32K: Fix misuse of "/**" comment clocksource/drivers/stm32: Fix all kernel-doc warnings dt-bindings: timer: exynos4210-mct: Add google,gs101-mct compatible clocksource/drivers/imx: Fix -Wunused-but-set-variable warning
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