1. 06 Dec, 2023 2 commits
  2. 27 Nov, 2023 2 commits
  3. 09 Nov, 2023 1 commit
  4. 30 Oct, 2023 9 commits
  5. 27 Oct, 2023 4 commits
  6. 26 Oct, 2023 2 commits
    • Herve Codina's avatar
      of: address: Remove duplicated functions · 3eb030c6
      Herve Codina authored
      The recently added of_bus_default_flags_translate() performs the exact
      same operation as of_bus_pci_translate() and of_bus_isa_translate().
      
      Avoid duplicated code replacing both of_bus_pci_translate() and
      of_bus_isa_translate() with of_bus_default_flags_translate().
      Signed-off-by: default avatarHerve Codina <herve.codina@bootlin.com>
      Link: https://lore.kernel.org/r/20231017110221.189299-3-herve.codina@bootlin.comSigned-off-by: default avatarRob Herring <robh@kernel.org>
      3eb030c6
    • Herve Codina's avatar
      of: address: Fix address translation when address-size is greater than 2 · 42604f8e
      Herve Codina authored
      With the recent addition of of_pci_prop_ranges() in commit 407d1a51
      ("PCI: Create device tree node for bridge"), the ranges property can
      have a 3 cells child address, a 3 cells parent address and a 2 cells
      child size.
      
      A range item property for a PCI device is filled as follow:
        <BAR_nbr> 0 0 <phys.hi> <phys.mid> <phys.low> <BAR_sizeh> <BAR_sizel>
        <-- Child --> <-- Parent (PCI definition) --> <- BAR size (64bit) -->
      
      This allow to translate BAR addresses from the DT. For instance:
      pci@0,0 {
        #address-cells = <0x03>;
        #size-cells = <0x02>;
        device_type = "pci";
        compatible = "pci11ab,100", "pciclass,060400", "pciclass,0604";
        ranges = <0x82000000 0x00 0xe8000000
                  0x82000000 0x00 0xe8000000
      	    0x00 0x4400000>;
        ...
        dev@0,0 {
          #address-cells = <0x03>;
          #size-cells = <0x02>;
          compatible = "pci1055,9660", "pciclass,020000", "pciclass,0200";
          /* Translations for BAR0 to BAR5 */
          ranges = <0x00 0x00 0x00 0x82010000 0x00 0xe8000000 0x00 0x2000000
                    0x01 0x00 0x00 0x82010000 0x00 0xea000000 0x00 0x1000000
                    0x02 0x00 0x00 0x82010000 0x00 0xeb000000 0x00 0x800000
                    0x03 0x00 0x00 0x82010000 0x00 0xeb800000 0x00 0x800000
                    0x04 0x00 0x00 0x82010000 0x00 0xec000000 0x00 0x20000
                    0x05 0x00 0x00 0x82010000 0x00 0xec020000 0x00 0x2000>;
          ...
          pci-ep-bus@0 {
            #address-cells = <0x01>;
            #size-cells = <0x01>;
            compatible = "simple-bus";
            /* Translate 0xe2000000 to BAR0 and 0xe0000000 to BAR1 */
            ranges = <0xe2000000 0x00 0x00 0x00 0x2000000
                      0xe0000000 0x01 0x00 0x00 0x1000000>;
            ...
          };
        };
      };
      
      During the translation process, the "default-flags" map() function is
      used to select the matching item in the ranges table and determine the
      address offset from this matching item.
      This map() function simply calls of_read_number() and when address-size
      is greater than 2, the map() function skips the extra high address part
      (ie part over 64bit). This lead to a wrong matching item and a wrong
      offset computation.
      Also during the translation itself, the extra high part related to the
      parent address is not present in the translated address.
      
      Fix the "default-flags" map() and translate() in order to take into
      account the child extra high address part in map() and the parent extra
      high address part in translate() and so having a correct address
      translation for ranges patterns such as the one given in the example
      above.
      Signed-off-by: default avatarHerve Codina <herve.codina@bootlin.com>
      Link: https://lore.kernel.org/r/20231017110221.189299-2-herve.codina@bootlin.comSigned-off-by: default avatarRob Herring <robh@kernel.org>
      42604f8e
  7. 25 Oct, 2023 4 commits
  8. 24 Oct, 2023 3 commits
  9. 22 Oct, 2023 1 commit
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  11. 04 Oct, 2023 1 commit
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  15. 10 Sep, 2023 1 commit