- 03 Sep, 2014 5 commits
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Maarten Lankhorst authored
This is how you implement a memory sieve in a driver. ;-) Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
The locking of release_lock was stupid; t should have been be called with fence_lock_irq if it was legitimately used. Unfortunately it never protected anything except the fence implementation correctly. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Andreas Pokorny authored
As there should not be any other virtual device that might share buffers, the callbacks remain empty stubs. Still prime can be used to transfer buffers between processes that use qxl. Signed-off-by:
Andreas Pokorny <andreas.pokorny@canonical.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Andreas Pokorny authored
Signed-off-by:
Andreas Pokorny <andreas.pokorny@canonical.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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git://people.freedesktop.org/~mlankhorst/linuxDave Airlie authored
Merge the move to generic fences for TTM using drivers. * 'for-airlied-next' of git://people.freedesktop.org/~mlankhorst/linux: drm/nouveau: use shared fences for readable objects drm/nouveau: Keep only a single list for validation. drm/ttm: use rcu in core ttm drm/vmwgfx: use rcu in vmw_user_dmabuf_synccpu_grab drm/radeon: use rcu waits in some ioctls drm/nouveau: use rcu in nouveau_gem_ioctl_cpu_prep drm/ttm: flip the switch, and convert to dma_fence drm/qxl: rework to new fence interface drm/nouveau: rework to new fence interface drm/vmwgfx: rework to new fence interface, v2 drm/vmwgfx: get rid of different types of fence_flags entirely drm/radeon: use common fence implementation for fences, v4 drm/ttm: kill off some members to ttm_validate_buffer drm/ttm: add interruptible parameter to ttm_eu_reserve_buffers drm/ttm: kill fence_lock drm/ttm: call ttm_bo_wait while inside a reservation drm/nouveau: require reservations for nouveau_fence_sync and nouveau_bo_fence drm/nouveau: add reservation to nouveau_gem_ioctl_cpu_prep
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- 02 Sep, 2014 12 commits
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
drm-intel-next-2014-08-22: - basic code for execlist, which is the fancy new cmd submission on gen8. Still disabled by default (Ben, Oscar Mateo, Thomas Daniel et al) - remove the useless usage of console_lock for I915_FBDEV=n (Chris) - clean up relations between ctx and ppgtt - clean up ppgtt lifetime handling (Michel Thierry) - various cursor code improvements from Ville - execbuffer code cleanups and secure batch fixes (Chris) - prep work for dev -> dev_priv transition (Chris) - some of the prep patches for the seqno -> request object transition (Chris) - various small improvements all over * tag 'drm-intel-next-2014-09-01' of git://anongit.freedesktop.org/drm-intel: (86 commits) drm/i915: fix suspend/resume for GENs w/o runtime PM support drm/i915: Update DRIVER_DATE to 20140822 drm: fix plane rotation when restoring fbdev configuration drm/i915/bdw: Disable execlists by default drm/i915/bdw: Enable Logical Ring Contexts (hence, Execlists) drm/i915/bdw: Document Logical Rings, LR contexts and Execlists drm/i915/bdw: Print context state in debugfs drm/i915/bdw: Display context backing obj & ringbuffer info in debugfs drm/i915/bdw: Display execlists info in debugfs drm/i915/bdw: Disable semaphores for Execlists drm/i915/bdw: Make sure gpu reset still works with Execlists drm/i915/bdw: Don't write PDP in the legacy way when using LRCs drm/i915: Track cursor changes as frontbuffer tracking flushes drm/i915/bdw: Help out the ctx switch interrupt handler drm/i915/bdw: Avoid non-lite-restore preemptions drm/i915/bdw: Handle context switch events drm/i915/bdw: Two-stage execlist submit process drm/i915/bdw: Write the tail pointer, LRC style drm/i915/bdw: Implement context switching (somewhat) drm/i915/bdw: Emission of requests with logical rings ... Conflicts: drivers/gpu/drm/i915/i915_drv.c
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Maarten Lankhorst authored
nouveau keeps track in userspace whether a buffer is being written to or being read, but it doesn't use that information. Change this to allow multiple readers on the same bo. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by:
Ben Skeggs <bskeggs@redhat.com>
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Maarten Lankhorst authored
Maintain the original order to handle VRAM/GART/mixed correctly for <nv50, it's likely not as important on newer cards. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by:
Ben Skeggs <bskeggs@redhat.com>
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Maarten Lankhorst authored
Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by:
Christian König <christian.koenig@amd.com>
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Maarten Lankhorst authored
With the conversion to the reservation api this should be safe. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by:
Ben Skeggs <bskeggs@redhat.com>
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Maarten Lankhorst authored
Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
Final driver! \o/ This is not a proper dma_fence because the hardware may never signal anything, so don't use dma-buf with qxl, ever. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by:
Ben Skeggs <bskeggs@redhat.com>
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Maarten Lankhorst authored
Use the new fence interface on vmwgfx too. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> --- Changes since v1: Fix a sleeping function called from invalid context in enable_signaling.
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Maarten Lankhorst authored
Only one type was ever used. This is needed to simplify the fence support in the next commit. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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- 01 Sep, 2014 7 commits
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Maarten Lankhorst authored
Changes since v1: - Kill the sw interrupt dance, add and use radeon_irq_kms_sw_irq_get_delayed instead. - Change custom wait function, lockdep complained about it. Holding exclusive_lock in the wait function might cause deadlocks. Instead do all the processing in .enable_signaling, and wait on the global fence_queue to pick up gpu resets. - Process all fences in radeon_gpu_reset after reset to close a race with the trylock in enable_signaling. Changes since v2: - Small changes to work with the rewritten lockup recovery patches. Changes since v3: - Call radeon_fence_schedule_check when exclusive_lock cannot be acquired to always cause a wake up. - Reset irqs from hangup check. - Drop reading seqno in the callback, use cached value. - Fix indentation in radeon_fence_default_wait - Add a radeon_test_signaled function, drop a few test_bit calls. - Make to_radeon_fence global. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by:
Christian König <christian.koenig@amd.com>
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Maarten Lankhorst authored
This reorders the list to keep track of what buffers are reserved, so previous members are always unreserved. This gets rid of some bookkeeping that's no longer needed, while simplifying the code some. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
It seems some drivers really want this as a parameter, like vmwgfx. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
No users are left, kill it off! :D Conversion to the reservation api is next on the list, after that the functionality can be restored with rcu. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
This is the last remaining function that doesn't use the reservation lock completely to fence off access to a buffer. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Maarten Lankhorst authored
This will ensure we always hold the required lock when calling those functions. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by:
Ben Skeggs <bskeggs@redhat.com>
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Maarten Lankhorst authored
Apart from some code inside ttm itself and nouveau_bo_vma_del, this is the only place where ttm_bo_wait is used without a reservation. Fix this so we can remove the fence_lock later on. After the switch to rcu the reservation lock will be removed again. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by:
Ben Skeggs <bskeggs@redhat.com>
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- 28 Aug, 2014 5 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
Just clearing out my -next queue before I go on vacation. Two UVD improvements that depend on the ttm change you just merged. * 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: preallocate mem for UVD create/destroy msg drm/radeon: allow UVD to use a second 256MB segment
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Christian König authored
llocating memory for UVD create and destroy messages can fail, which is rather annoying when this happens in the middle of a GPU reset. Try to avoid this condition by preallocating a page for those dummy messages. Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
This improves concurrent stream decoding. Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
More radeon changes for drm-next. Highlights: - UVD support for older asics - Reset rework in preparation for Maarten's fence patches I have a few more patches which depend on Christian's ttm changes, I'll send them out separately once you've merged the ttm changes. * 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: drop doing resets in a work item drm/radeon: drop RADEON_FENCE_SIGNALED_SEQ v2 drm/radeon: add timeout argument to radeon_fence_wait_seq v2 drm/radeon: handle lockup in delayed work, v5 drm/radeon: take exclusive_lock in read mode during ring tests, v5 drm/radeon: force fence completion only on problematic rings (v2) drm/radeon: wake up all fences on manual reset drm/radeon: add UVD fw names for older asic drm/radeon: enable RB_ARB before resetting the VCPU drm/radeon: 760G/780V/880V don't have UVD drm/radeon: implement UVD hw workarounds for R6xx v3 drm/radeon: add UVD support for older asics v4 drm/radeon: add set_uvd_clocks callback for r6xx v4 drm/radeon: properly init UVD MC bits on R600 drm/radeon: force UVD buffers into VRAM on RS[78]80 v2 drm/radeon: move the IB test after the AGP fallback
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git://people.freedesktop.org/~deathsimple/linuxDave Airlie authored
pull in placement changes radeon requires. * 'ttm_pfn' of git://people.freedesktop.org/~deathsimple/linux: drm/ttm: move fpfn and lpfn into each placement v2
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- 27 Aug, 2014 11 commits
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Christian König authored
Blocking completely innocent processes with a GPU reset is a pretty bad idea. Just set needs_reset and let the next command submission or fence wait do the job. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
It's causing issues with VMID handling and comparing the fence value two times actually doesn't make handling faster. v2: rebased on reset changes Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Maarten Lankhorst authored
This makes it possible to wait for a specific amount of time, rather than wait until infinity. v2 (chk): rebased on other changes Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
v5 (chk): complete rework, start when the first fence is emitted, stop when the last fence is signalled, make it work correctly with GPU resets, cleanup radeon_fence_wait_seq Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Maarten Lankhorst authored
This is needed for the next commit, because the lockup detection will need the read lock to run. v4 (chk): split out forced fence completion, remove unrelated changes, add and handle in_reset flag v5 (agd5f): rebase fix Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Instead of resetting all fence numbers, only reset the number of the problematic ring. Split out from a patch from Maarten Lankhorst <maarten.lankhorst@canonical.com> v2 (agd5f): rebase build fix Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Wake up all fences when we manually trigger a reset. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Activating the UVD support. Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
This fixes "UVD not responding, trying to reset the VCPU" messages on earlier ASICs. Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Don't enable UVD on these asics as they don't have UVD hardware. Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Only the essentials, cause this hw generation is really buggy. v2: start supporting RV670,RV620 and RV635 as well v3: activate more workarounds Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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