- 22 Dec, 2020 29 commits
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Vincenzo Frascino authored
When MTE is present, the GCR_EL1 register contains the tags mask that allows to exclude tags from the random generation via the IRG instruction. With the introduction of the new Tag-Based KASAN API that provides a mechanism to reserve tags for special reasons, the MTE implementation has to make sure that the GCR_EL1 setting for the kernel does not affect the userspace processes and viceversa. Save and restore the kernel/user mask in GCR_EL1 in kernel entry and exit. Link: https://lkml.kernel.org/r/578b03294708cc7258fad0dc9c2a2e809e5a8214.1606161801.git.andreyknvl@google.comSigned-off-by:
Vincenzo Frascino <vincenzo.frascino@arm.com> Co-developed-by:
Andrey Konovalov <andreyknvl@google.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Tested-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Vincenzo Frascino authored
The gcr_user mask is a per thread mask that represents the tags that are excluded from random generation when the Memory Tagging Extension is present and an 'irg' instruction is invoked. gcr_user affects the behavior on EL0 only. Currently that mask is an include mask and it is controlled by the user via prctl() while GCR_EL1 accepts an exclude mask. Convert the include mask into an exclude one to make it easier the register setting. Note: This change will affect gcr_kernel (for EL1) introduced with a future patch. Link: https://lkml.kernel.org/r/946dd31be833b660334c4f93410acf6d6c4cf3c4.1606161801.git.andreyknvl@google.comSigned-off-by:
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Vincenzo Frascino authored
Hardware tag-based KASAN relies on Memory Tagging Extension (MTE) feature and requires it to be enabled. MTE supports This patch adds a new mte_enable_kernel() helper, that enables MTE in Synchronous mode in EL1 and is intended to be called from KASAN runtime during initialization. The Tag Checking operation causes a synchronous data abort as a consequence of a tag check fault when MTE is configured in synchronous mode. As part of this change enable match-all tag for EL1 to allow the kernel to access user pages without faulting. This is required because the kernel does not have knowledge of the tags set by the user in a page. Note: For MTE, the TCF bit field in SCTLR_EL1 affects only EL1 in a similar way as TCF0 affects EL0. MTE that is built on top of the Top Byte Ignore (TBI) feature hence we enable it as part of this patch as well. Link: https://lkml.kernel.org/r/7352b0a0899af65c2785416c8ca6bf3845b66fa1.1606161801.git.andreyknvl@google.comSigned-off-by:
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Vincenzo Frascino authored
Add the implementation of the in-kernel fault handler. When a tag fault happens on a kernel address: * MTE is disabled on the current CPU, * the execution continues. When a tag fault happens on a user address: * the kernel executes do_bad_area() and panics. The tag fault handler for kernel addresses is currently empty and will be filled in by a future commit. Link: https://lkml.kernel.org/r/20201203102628.GB2224@gaia Link: https://lkml.kernel.org/r/ad31529b073e22840b7a2246172c2b67747ed7c4.1606161801.git.andreyknvl@google.comSigned-off-by:
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Vincenzo Frascino authored
The hardware tag-based KASAN for compatibility with the other modes stores the tag associated to a page in page->flags. Due to this the kernel faults on access when it allocates a page with an initial tag and the user changes the tags. Reset the tag associated by the kernel to a page in all the meaningful places to prevent kernel faults on access. Note: An alternative to this approach could be to modify page_to_virt(). This though could end up being racy, in fact if a CPU checks the PG_mte_tagged bit and decides that the page is not tagged but another CPU maps the same with PROT_MTE and becomes tagged the subsequent kernel access would fail. Link: https://lkml.kernel.org/r/9073d4e973747a6f78d5bdd7ebe17f290d087096.1606161801.git.andreyknvl@google.comSigned-off-by:
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Vincenzo Frascino authored
Provide helper functions to manipulate allocation and pointer tags for kernel addresses. Low-level helper functions (mte_assign_*, written in assembly) operate tag values from the [0x0, 0xF] range. High-level helper functions (mte_get/set_*) use the [0xF0, 0xFF] range to preserve compatibility with normal kernel pointers that have 0xFF in their top byte. MTE_GRANULE_SIZE and related definitions are moved to mte-def.h header that doesn't have any dependencies and is safe to include into any low-level header. Link: https://lkml.kernel.org/r/c31bf759b4411b2d98cdd801eb928e241584fd1f.1606161801.git.andreyknvl@google.comSigned-off-by:
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Vincenzo Frascino authored
Hardware tag-based KASAN relies on Memory Tagging Extension (MTE) which is an armv8.5-a architecture extension. Enable the correct asm option when the compiler supports it in order to allow the usage of ALTERNATIVE()s with MTE instructions. Link: https://lkml.kernel.org/r/d03d1157124ea3532eaeb77507988733f5734986.1606161801.git.andreyknvl@google.comSigned-off-by:
Alexander Potapenko <glider@google.com> Tested-by:
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Andrey Konovalov authored
This patch adds a configuration option for a new KASAN mode called hardware tag-based KASAN. This mode uses the memory tagging approach like the software tag-based mode, but relies on arm64 Memory Tagging Extension feature for tag management and access checking. Link: https://lkml.kernel.org/r/44906a209d3a44f9c6f5a21841e90988e365601e.1606161801.git.andreyknvl@google.comSigned-off-by:
Marco Elver <elver@google.com> Reviewed-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. Rework print_memory_metadata() to make it agnostic with regard to the way metadata is stored. Allow providing a separate metadata_fetch_row() implementation for each KASAN mode. Hardware tag-based KASAN will provide its own implementation that doesn't use shadow memory. No functional changes for software modes. Link: https://lkml.kernel.org/r/5fb1ec0152bb1f521505017800387ec3e36ffe18.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. Hardware tag-based KASAN won't be using shadow memory, but will reuse these macros. Rename "SHADOW" to implementation-neutral "META". No functional changes. Link: https://lkml.kernel.org/r/f96244ec59dc17db35173ec352c5592b14aefaf8.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. Hardware tag-based KASAN won't be using shadow memory, but will reuse this function. Rename "shadow" to implementation-neutral "metadata". No functional changes. Link: https://lkml.kernel.org/r/dd955c5aadaee16aef451a6189d19172166a23f5.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. Hardware tag-based KASAN won't be using shadow memory, but will reuse this function. Rename "shadow" to implementation-neutral "metadata". No functional changes. Link: https://lkml.kernel.org/r/370466fba590a4596b55ffd38adfd990f8886db4.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
Rename kasan_init_tags() to kasan_init_sw_tags() as the upcoming hardware tag-based KASAN mode will have its own initialization routine. Also similarly to kasan_init() mark kasan_init_tags() as __init. Link: https://lkml.kernel.org/r/71e52af72a09f4b50c8042f16101c60e50649fbb.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
Software tag-based KASAN mode is fully initialized with kasan_init_tags(), while the generic mode only requires kasan_init(). Move the initialization message for tag-based mode into kasan_init_tags(). Also fix pr_fmt() usage for KASAN code: generic.c doesn't need it as it doesn't use any printing functions; tag-based mode should use "kasan:" instead of KBUILD_MODNAME (which stands for file name). Link: https://lkml.kernel.org/r/29a30ea4e1750450dd1f693d25b7b6cb05913ecf.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. Hardware tag-based KASAN won't use kasan_depth. Only define and use it when one of the software KASAN modes are enabled. No functional changes for software modes. Link: https://lkml.kernel.org/r/e16f15aeda90bc7fb4dfc2e243a14b74cc5c8219.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. Hardware tag-based KASAN won't be using shadow memory. Only initialize it when one of the software KASAN modes are enabled. No functional changes for software modes. Link: https://lkml.kernel.org/r/d1742eea2cd728d150d49b144e49b6433405c7ba.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
Decoding routines aren't needed when CONFIG_KASAN_STACK_ENABLE is not enabled. Currently only generic KASAN mode implements stack error reporting. No functional changes for software modes. Link: https://lkml.kernel.org/r/05a24db36f5ec876af876a299bbea98c29468ebd.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. For software KASAN modes the check is based on the value in the shadow memory. Hardware tag-based KASAN won't be using shadow, so hide the implementation of the check in check_invalid_free(). Also simplify the code for software tag-based mode. No functional changes for software modes. Link: https://lkml.kernel.org/r/d01534a4b977f97d87515dc590e6348e1406de81.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
Both KASAN_GENERIC and KASAN_SW_TAGS have common dependencies, move those to KASAN. Link: https://lkml.kernel.org/r/c1cc0d562608a318c607afe22db5ec2a7af72e47.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
Rename generic_report.c to report_generic.c and tags_report.c to report_sw_tags.c, as their content is more relevant to report.c file. Also rename tags.c to sw_tags.c to better reflect that this file contains code for software tag-based mode. No functional changes. Link: https://lkml.kernel.org/r/a6105d416da97d389580015afed66c4c3cfd4c08.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
Define KASAN_MEMORY_PER_SHADOW_PAGE as (KASAN_GRANULE_SIZE << PAGE_SHIFT), which is the same as (KASAN_GRANULE_SIZE * PAGE_SIZE) for software modes that use shadow memory, and use it across KASAN code to simplify it. Link: https://lkml.kernel.org/r/8329391cfe14b5cffd3decf3b5c535b6ce21eef6.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. The new mode won't be using shadow memory. Move all shadow-related code to shadow.c, which is only enabled for software KASAN modes that use shadow memory. No functional changes for software modes. Link: https://lkml.kernel.org/r/17d95cfa7d5cf9c4fcd9bf415f2a8dea911668df.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. The new mode won't be using shadow memory, so only build init.c that contains shadow initialization code for software modes. No functional changes for software modes. Link: https://lkml.kernel.org/r/bae0a6a35b7a9b1a443803c1a55e6e3fecc311c9.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. The new mode won't be using shadow memory, but will still use the concept of memory granules. Each memory granule maps to a single metadata entry: 8 bytes per one shadow byte for generic mode, 16 bytes per one shadow byte for software tag-based mode, and 16 bytes per one allocation tag for hardware tag-based mode. Rename KASAN_SHADOW_SCALE_SIZE to KASAN_GRANULE_SIZE, and KASAN_SHADOW_MASK to KASAN_GRANULE_MASK. Also use MASK when used as a mask, otherwise use SIZE. No functional changes. Link: https://lkml.kernel.org/r/939b5754e47f528a6e6a6f28ffc5815d8d128033.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. The new mode won't be using shadow memory. Rename external annotation kasan_unpoison_shadow() to kasan_unpoison_range(), and introduce internal functions (un)poison_range() (without kasan_ prefix). Co-developed-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. Group shadow-related KASAN function declarations and only define them for the two existing software modes. No functional changes for software modes. Link: https://lkml.kernel.org/r/35126.1606402815@turing-police Link: https://lore.kernel.org/linux-arm-kernel/24105.1606397102@turing-police/ Link: https://lkml.kernel.org/r/e88d94eff94db883a65dca52e1736d80d28dd9bc.1606161801.git.andreyknvl@google.comSigned-off-by:
Valdis Kletnieks <valdis.kletnieks@vt.edu> Reviewed-by:
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Andrey Konovalov authored
This is a preparatory commit for the upcoming addition of a new hardware tag-based (MTE-based) KASAN mode. Group all vmalloc-related function declarations in include/linux/kasan.h, and their implementations in mm/kasan/common.c. No functional changes. Link: https://lkml.kernel.org/r/80a6fdd29b039962843bd6cf22ce2643a7c8904e.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
Currently only generic KASAN mode supports vmalloc, reflect that in the config. Link: https://lkml.kernel.org/r/0c493d3a065ad95b04313d00244e884a7e2498ff.1606161801.git.andreyknvl@google.comSigned-off-by:
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Andrey Konovalov authored
Patch series "kasan: add hardware tag-based mode for arm64", v11. This patchset adds a new hardware tag-based mode to KASAN [1]. The new mode is similar to the existing software tag-based KASAN, but relies on arm64 Memory Tagging Extension (MTE) [2] to perform memory and pointer tagging (instead of shadow memory and compiler instrumentation). This patchset is co-developed and tested by Vincenzo Frascino <vincenzo.frascino@arm.com>. This patchset is available here: https://github.com/xairy/linux/tree/up-kasan-mte-v11 For testing in QEMU hardware tag-based KASAN requires: 1. QEMU built from master [4] (use "-machine virt,mte=on -cpu max" arguments to run). 2. GCC version 10. [1] https://www.kernel.org/doc/html/latest/dev-tools/kasan.html [2] https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/enhancing-memory-safety [3] git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux for-next/mte [4] https://github.com/qemu/qemu ====== Overview The underlying ideas of the approach used by hardware tag-based KASAN are: 1. By relying on the Top Byte Ignore (TBI) arm64 CPU feature, pointer tags are stored in the top byte of each kernel pointer. 2. With the Memory Tagging Extension (MTE) arm64 CPU feature, memory tags for kernel memory allocations are stored in a dedicated memory not accessible via normal instuctions. 3. On each memory allocation, a random tag is generated, embedded it into the returned pointer, and the corresponding memory is tagged with the same tag value. 4. With MTE the CPU performs a check on each memory access to make sure that the pointer tag matches the memory tag. 5. On a tag mismatch the CPU generates a tag fault, and a KASAN report is printed. Same as other KASAN modes, hardware tag-based KASAN is intended as a debugging feature at this point. ====== Rationale There are two main reasons for this new hardware tag-based mode: 1. Previously implemented software tag-based KASAN is being successfully used on dogfood testing devices due to its low memory overhead (as initially planned). The new hardware mode keeps the same low memory overhead, and is expected to have significantly lower performance impact, due to the tag checks being performed by the hardware. Therefore the new mode can be used as a better alternative in dogfood testing for hardware that supports MTE. 2. The new mode lays the groundwork for the planned in-kernel MTE-based memory corruption mitigation to be used in production. ====== Technical details Considering the implementation perspective, hardware tag-based KASAN is almost identical to the software mode. The key difference is using MTE for assigning and checking tags. Compared to the software mode, the hardware mode uses 4 bits per tag, as dictated by MTE. Pointer tags are stored in bits [56:60), the top 4 bits have the normal value 0xF. Having less distict tags increases the probablity of false negatives (from ~1/256 to ~1/16) in certain cases. Only synchronous exceptions are set up and used by hardware tag-based KASAN. ====== Benchmarks Note: all measurements have been performed with software emulation of Memory Tagging Extension, performance numbers for hardware tag-based KASAN on the actual hardware are expected to be better. Boot time [1]: * 2.8 sec for clean kernel * 5.7 sec for hardware tag-based KASAN * 11.8 sec for software tag-based KASAN * 11.6 sec for generic KASAN Slab memory usage after boot [2]: * 7.0 kb for clean kernel * 9.7 kb for hardware tag-based KASAN * 9.7 kb for software tag-based KASAN * 41.3 kb for generic KASAN Measurements have been performed with: * defconfig-based configs * Manually built QEMU master * QEMU arguments: -machine virt,mte=on -cpu max * CONFIG_KASAN_STACK_ENABLE disabled * CONFIG_KASAN_INLINE enabled * clang-10 as the compiler and gcc-10 as the assembler [1] Time before the ext4 driver is initialized. [2] Measured as `cat /proc/meminfo | grep Slab`. ====== Notes The cover letter for software tag-based KASAN patchset can be found here: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0116523cfffa62aeb5aa3b85ce7419f3dae0c1b8 ===== Tags Tested-by:
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- 21 Dec, 2020 8 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds authored
Pull clk updates from Stephen Boyd: "The core framework got some nice improvements this time around. We gained the ability to get struct clk pointers from a struct clk_hw so that clk providers can consume the clks they provide, if they need to do something like that. This has been a long missing part of the clk provider API that will help us move away from exposing a struct clk pointer in the struct clk_hw. Tracepoints are added for the clk_set_rate() "range" functions, similar to the tracepoints we already have for clk_set_rate() and we added a column to debugfs to help developers understand the hardware enable state of clks in case firmware or bootloader state is different than what is expected. Overall the core changes are mostly improving the clk driver writing experience. At the driver level, we have the usual collection of driver updates and new drivers for new SoCs. This time around the Qualcomm folks introduced a good handful of clk drivers for various parts of three or four SoCs. The SiFive folks added a new clk driver for their FU740 SoCs, coming in second on the diffstat and then Atmel AT91 and Amlogic SoCs had lots of work done after that for various new features. One last thing to note in the driver area is that the i.MX driver has gained a new binding to support SCU clks after being on the list for many months. It uses a two cell binding which is sort of rare in clk DT bindings. Beyond that we have the usual set of driver fixes and tweaks that come from more testing and finding out that some configuration was wrong or that a driver could support being built as a module. Summary: Core: - Add some trace points for clk_set_rate() "range" functions - Add hardware enable information to clk_summary debugfs - Replace clk-provider.h with of_clk.h when possible - Add devm variant of clk_notifier_register() - Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw New Drivers: - Bindings for Canaan K210 SoC clks - Support for SiFive FU740 PRCI - Camera clks on Qualcomm SC7180 SoCs - GCC and RPMh clks on Qualcomm SDX55 SoCs - RPMh clks on Qualcomm SM8350 SoCs - LPASS clks on Qualcomm SM8250 SoCs Updates: - DVFS support for AT91 clk driver - Update git repo branch for Renesas clock drivers - Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U - Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E - Stop using __raw_*() I/O accessors in Renesas clk drivers - One more conversion of DT bindings to json-schema - Make i.MX clk-gate2 driver more flexible - New two cell binding for i.MX SCU clks - Drop of_match_ptr() in i.MX8 clk drivers - Add arch dependencies for Rockchip clk drivers - Fix i2s on Rockchip rk3066 - Add MIPI DSI clks on Amlogic axg and g12 SoCs - Support modular builds of Amlogic clk drivers - Fix an Amlogic Video PLL clock dependency - Samsung Kconfig dependencies updates for better compile test coverage - Refactoring of the Samsung PLL clocks driver - Small Tegra driver cleanups - Minor fixes to Ingenic and VC5 clk drivers - Cleanup patches to remove unused variables and plug memory leaks" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits) dt-binding: clock: Document canaan,k210-clk bindings dt-bindings: Add Canaan vendor prefix clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts" clk: ingenic: Fix divider calculation with div tables clk: sunxi-ng: Make sure divider tables have sentinel clk: s2mps11: Fix a resource leak in error handling paths in the probe function clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9 clk: si5351: Wait for bit clear after PLL reset clk: at91: sam9x60: remove atmel,osc-bypass support clk: at91: sama7g5: register cpu clock clk: at91: clk-master: re-factor master clock clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz clk: at91: sama7g5: decrease lower limit for MCK0 rate clk: at91: sama7g5: remove mck0 from parent list of other clocks clk: at91: clk-sam9x60-pll: allow runtime changes for pll clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics clk: at91: clk-master: add 5th divisor for mck master clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT dt-bindings: clock: at91: add sama7g5 pll defines clk: at91: sama7g5: fix compilation error ...
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git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommuLinus Torvalds authored
Pull m68knommu updates from Greg Ungerer: - cleanup of 68328 code - align BSS section to 32bit * tag 'm68knommu-for-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68k: m68328: remove duplicate code m68k: m68328: move platform code to separate files m68knommu: align BSS section to 4-byte boundaries
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git://github.com/martinetd/linuxLinus Torvalds authored
Pull 9p update from Dominique Martinet: - fix long-standing limitation on open-unlink-fop pattern - add refcount to p9_fid (fixes the above and will allow for more cleanups and simplifications in the future) * tag '9p-for-5.11-rc1' of git://github.com/martinetd/linux: 9p: Remove unnecessary IS_ERR() check 9p: Uninitialized variable in v9fs_writeback_fid() 9p: Fix writeback fid incorrectly being attached to dentry 9p: apply review requests for fid refcounting 9p: add refcount to p9_fid struct fs/9p: search open fids first fs/9p: track open fids fs/9p: fix create-unlink-getattr idiom
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Stephen Boyd authored
Merge branches 'clk-ingenic', 'clk-vc5', 'clk-cleanup', 'clk-canaan' and 'clk-marvell' into clk-next - Bindings for Canaan K210 SoC clks * clk-ingenic: clk: ingenic: Fix divider calculation with div tables * clk-vc5: clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts" * clk-cleanup: clk: sunxi-ng: Make sure divider tables have sentinel clk: s2mps11: Fix a resource leak in error handling paths in the probe function clk: bcm: dvp: Add MODULE_DEVICE_TABLE() clk: bcm: dvp: drop a variable that is assigned to only * clk-canaan: dt-binding: clock: Document canaan,k210-clk bindings dt-bindings: Add Canaan vendor prefix * clk-marvell: clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9
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Stephen Boyd authored
- Add some trace points for clk_set_rate() "range" functions - DVFS support for AT91 clk driver * clk-ti: clk: ti: omap5: Fix reboot DPLL lock failure when using ABE TIMERs clk: ti: Fix memleak in ti_fapll_synth_setup * clk-analog: clk: axi-clkgen: move the OF table at the bottom of the file clk: axi-clkgen: wrap limits in a struct and keep copy on the state object dt-bindings: clock: adi,axi-clkgen: convert old binding to yaml format * clk-trace: clk: Trace clk_set_rate() "range" functions * clk-at91: clk: at91: sam9x60: remove atmel,osc-bypass support clk: at91: sama7g5: register cpu clock clk: at91: clk-master: re-factor master clock clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz clk: at91: sama7g5: decrease lower limit for MCK0 rate clk: at91: sama7g5: remove mck0 from parent list of other clocks clk: at91: clk-sam9x60-pll: allow runtime changes for pll clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics clk: at91: clk-master: add 5th divisor for mck master clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT dt-bindings: clock: at91: add sama7g5 pll defines clk: at91: sama7g5: fix compilation error * clk-silabs: clk: si5351: Wait for bit clear after PLL reset
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Stephen Boyd authored
- Support for SiFive FU740 PRCI - Add hardware enable information to clk_summary debugfs * clk-tegra: clk: tegra: Fix duplicated SE clock entry clk: tegra: bpmp: Clamp clock rates on requests clk: tegra: Do not return 0 on failure * clk-imx: (24 commits) clk: imx: scu: remove the calling of device_is_bound clk: imx: scu: Make pd_np with static keyword clk: imx8mq: drop of_match_ptr from of_device_id table clk: imx8mp: drop of_match_ptr from of_device_id table clk: imx8mn: drop of_match_ptr from of_device_id table clk: imx8mm: drop of_match_ptr from of_device_id table clk: imx: gate2: Remove unused variable ret clk: imx: gate2: Add locking in is_enabled op clk: imx: gate2: Add cgr_mask for more flexible number of control bits clk: imx: gate2: Check if clock is enabled against cgr_val clk: imx: gate2: Keep the register writing in on place clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special case clk: imx: scu: fix build break when compiled as modules clk: imx: remove redundant assignment to pointer np clk: imx: remove unneeded semicolon clk: imx: lpcg: add suspend/resume support clk: imx: clk-imx8qxp-lpcg: add runtime pm support clk: imx: lpcg: allow lpcg clk to take device pointer clk: imx: imx8qxp-lpcg: add parsing clocks from device tree clk: imx: scu: add suspend/resume support ... * clk-sifive: clk: sifive: Add clock enable and disable ops clk: sifive: Fix the wrong bit field shift clk: sifive: Add a driver for the SiFive FU740 PRCI IP block clk: sifive: Use common name for prci configuration clk: sifive: Extract prci core to common base dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI * clk-mediatek: clk: mediatek: Make mtk_clk_register_mux() a static function * clk-summary: clk: Add hardware-enable column to clk summary
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Stephen Boyd authored
Merge branches 'clk-amlogic', 'clk-rockchip', 'clk-of', 'clk-freescale' and 'clk-unused' into clk-next - Replace clk-provider.h with of_clk.h when possible * clk-amlogic: clk: meson: g12a: add MIPI DSI Host Pixel Clock dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings clk: meson: enable building as modules clk: meson: Kconfig: fix dependency for G12A clk: meson: axg: add MIPI DSI Host clock clk: meson: axg: add Video Clocks dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding dt-bindings: clk: axg-clkc: add Video Clocks * clk-rockchip: clk: rockchip: fix i2s gate bits on rk3066 and rk3188 clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks clk: rockchip: Remove redundant null check before clk_prepare_enable clk: rockchip: Add appropriate arch dependencies * clk-of: xtensa: Replace <linux/clk-provider.h> by <linux/of_clk.h> sh: boards: Replace <linux/clk-provider.h> by <linux/of_clk.h> * clk-freescale: clk: fsl-flexspi: new driver dt-bindings: clock: document the fsl-flexspi-clk device clk: divider: add devm_clk_hw_register_divider_table() clk: qoriq: provide constants for the type clk: fsl-sai: use devm_clk_hw_register_composite_pdata() clk: composite: add devm_clk_hw_register_composite_pdata() clk: fsl-sai: fix memory leak clk: qoriq: Add platform dependencies * clk-unused: clk: scpi: mark scpi_clk_match as maybe unused clk: pwm: drop of_match_ptr from of_device_id table
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Stephen Boyd authored
Merge branches 'clk-doc', 'clk-qcom', 'clk-simplify', 'clk-hw', 'clk-renesas' and 'clk-samsung' into clk-next - Camera clks on Qualcomm SC7180 SoCs - GCC and RPMh clks on Qualcomm SDX55 SoCs - RPMh clks on Qualcomm SM8350 SoCs - LPASS clks on Qualcomm SM8250 SoCs - Add devm variant of clk_notifier_register() - Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw * clk-doc: clk: fix a kernel-doc markup * clk-qcom: (27 commits) clk: qcom: rpmh: add support for SM8350 rpmh clocks dt-bindings: clock: Add RPMHCC bindings for SM8350 clk: qcom: lpasscc: Introduce pm autosuspend for SC7180 clk: qcom: gcc-sc7180: Add 50 MHz clock rate for SDC2 clk: qcom: gcc-sc7180: Use floor ops for sdcc clks clk: qcom: Add GDSC support for SDX55 GCC dt-bindings: clock: Add GDSC in SDX55 GCC clk: qcom: Add support for SDX55 RPMh clocks dt-bindings: clock: Introduce RPMHCC bindings for SDX55 clk: qcom: Add SDX55 GCC support dt-bindings: clock: Add SDX55 GCC clock bindings clk: qcom: Kconfig: Fix spelling mistake "dyanmic" -> "dynamic" clk: qcom: rpmh: Add CE clock on sdm845. dt-bindings: clock: Add entry for crypto engine RPMH clock resource clk: qcom: dispcc-sm8250: handle MMCX power domain clk: qcom: camcc-sc7180: Use runtime PM ops instead of clk ones clk: qcom: lpass-sc7180: Clean up on error in lpass_sc7180_init() clk: qcom: Add support to LPASS AON_CC Glitch Free Mux clocks clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks dt-bindings: clock: Add support for LPASS Always ON Controller ... * clk-simplify: clk: remove unneeded dead-store initialization * clk-hw: clk: meson: g12: use devm variant to register notifiers clk: add devm variant of clk_notifier_register clk: meson: g12: drop use of __clk_lookup() clk: add api to get clk consumer from clk_hw clk: avoid devm_clk_release name clash * clk-renesas: dt-bindings: clock: renesas: rcar-usb2-clock-sel: Convert bindings to json-schema clk: renesas: sh73a0: Stop using __raw_*() I/O accessors clk: renesas: r8a774c0: Add RPC clocks clk: renesas: r8a779a0: Fix R and OSC clocks clk: renesas: cpg-mssr: fix kerneldoc of cpg_mssr_priv clk: renesas: rcar-usb2-clock-sel: Replace devm_reset_control_array_get() clk: renesas: r8a774b1: Add RPC clocks clk: renesas: r8a774a1: Add RPC clocks clk: renesas: r8a779a0: Add VIN clocks clk: renesas: r8a779a0: Add CSI4[0-3] clocks MAINTAINERS: Update git repo for Renesas clock drivers clk: renesas: r8a779a0: Make rcar_r8a779a0_cpg_clk_register() static clk: renesas: rcar-gen3: Remove stp_ck handling for SDHI * clk-samsung: clk: samsung: Prevent potential endless loop in the PLL ops clk: samsung: Allow compile testing of Exynos, S3C64xx and S5Pv210
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- 20 Dec, 2020 3 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linuxLinus Torvalds authored
Pull orangefs update from Mike Marshall: "Add splice file operations" * tag 'for-linus-5.11-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux: orangefs: add splice file operations
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git://git.samba.org/sfrench/cifs-2.6Linus Torvalds authored
Pull cifs fixes from Steve French: "Four small CIFS/SMB3 fixes (witness protocol and reconnect related), and two that add ability to get and set auditing information in the security descriptor (SACL), which can be helpful not just for backup scenarios ("smbinfo secdesc" etc.) but also for improving security" * tag '5.11-rc-smb3-part2' of git://git.samba.org/sfrench/cifs-2.6: Add SMB 2 support for getting and setting SACLs SMB3: Add support for getting and setting SACLs cifs: Avoid error pointer dereference cifs: Re-indent cifs_swn_reconnect() cifs: Unlock on errors in cifs_swn_reconnect() cifs: Delete a stray unlock in cifs_swn_reconnect() -
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linuxLinus Torvalds authored
Pull perf tools updates from Arnaldo Carvalho de Melo: "perf record: - Fix memory leak when using '--user-regs=?' to list registers aarch64 support: - Add aarch64 registers to 'perf record's' --user-regs command line option aarch64 hw tracing support: - Decode memory tagging properties - Improve ARM's auxtrace support - Add support for ARMv8.3-SPE perf kvm: - Add kvm-stat for arm64 perf stat: - Add --quiet option Cleanups: - Fixup function names wrt what is in libperf and what is in tools/perf Build: - Allow building without libbpf in older systems New kernel features: - Initial support for data/code page size sample type, more to come perf annotate: - Support MIPS instruction extended support perf stack unwinding: - Fix separate debug info files when using elfutils' libdw's unwinder perf vendor events: - Update Intel's Skylake client events to v50 - Add JSON metrics for ARM's imx8mm DDR Perf - Support printing metric groups for system PMUs perf build id: - Prep work for supporting having the build id provided by the kernel in PERF_RECORD_MMAP2 metadata events perf stat: - Support regex pattern in --for-each-cgroup pipe mode: - Allow to use stdio functions for pipe mode - Support 'perf report's' --header-only for pipe mode - Support pipe mode display in 'perf evlist' Documentation: - Update information about CAP_PERFMON" * tag 'perf-tools-2020-12-19' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: (134 commits) perf mem: Factor out a function to generate sort order perf sort: Add sort option for data page size perf script: Support data page size tools headers UAPI: Update asm-generic/unistd.h tools headers cpufeatures: Sync with the kernel sources tools headers UAPI: Sync linux/prctl.h with the kernel sources tools headers UAPI: Sync linux/fscrypt.h with the kernel sources tools headers UAPI: Sync linux/const.h with the kernel headers tools arch x86: Sync the msr-index.h copy with the kernel sources perf trace beauty: Update copy of linux/socket.h with the kernel sources tools headers: Update linux/ctype.h with the kernel sources tools headers: Add conditional __has_builtin() tools headers: Get tools's linux/compiler.h closer to the kernel's tools headers UAPI: Sync linux/stat.h with the kernel sources tools headers: Syncronize linux/build_bug.h with the kernel sources perf tools: Reformat record's control fd man text perf config: Fix example command in manpage to conform to syntax specified in the SYNOPSIS section. perf test: Make sample-parsing test aware of PERF_SAMPLE_{CODE,DATA}_PAGE_SIZE perf tools: Add support to read build id from compressed elf perf debug: Add debug_set_file function ...
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