- 09 Jun, 2023 40 commits
-
-
Joshua Ashton authored
Given that we always pass dm_state into here now, this won't ever trigger anymore. This is needed for we will always fail mode validation with invalid clocks or link bandwidth errors. Signed-off-by:
Joshua Ashton <joshua@froggi.es> Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com>
-
Harry Wentland authored
Look at connector->colorimetry to determine output colorspace. We don't want to impact current SDR behavior, so DRM_MODE_COLORIMETRY_DEFAULT preserves current behavior. Also add support to explicitly set BT601 and BT709. v4: - Roll support for BT709 and BT601 into this patch - Add default case to avoid warnings for unhandled enum values Signed-off-by:
-
Harry Wentland authored
We need to signal mode_changed to make sure we update the output colorspace. v2: No need to call drm_hdmi_avi_infoframe_colorimetry as DC does its own infoframe packing. Signed-off-by:Leo Li <sunpeng.li@amd.com> Reviewed-by:
-
Harry Wentland authored
We want compositors to be able to set the output colorspace on DP and HDMI outputs, based on the caps reported from the receiver via EDID. Signed-off-by:
-
Harry Wentland authored
We need the connector_state for colorspace and scaling information and can get it from connector->state. Signed-off-by:
-
Harry Wentland authored
Drivers might not support all colorspaces defined in dp_colorspaces and hdmi_colorspaces. This results in undefined behavior when userspace is setting an unsupported colorspace. Allow drivers to pass the list of supported colorspaces when creating the colorspace property. v2: - Use 0 to indicate support for all colorspaces (Jani) - Print drm_dbg_kms message when drivers pass 0 to signal that drivers should specify supported colorspaecs explicity (Jani) v3: - Move changes to create a common colorspace_names array to separate patch v6: - Avoid magic when passing 0 for supported_colorspaces; be explicit in treating it as "all DP/HDMI" Signed-off-by:
Sebastian Wick <sebastian.wick@redhat.com> Reviewed-by:
Simon Ser <contact@emersion.fr> Cc: Pekka Paalanen <ppaalanen@gmail.com> Cc: Sebastian Wick <sebastian.wick@redhat.com> Cc: Vitaly.Prosyak@amd.com Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Joshua Ashton <joshua@froggi.es> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Simon Ser <contact@emersion.fr> Cc: Melissa Wen <mwen@igalia.com> Cc: dri-devel@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Signed-off-by:
-
Harry Wentland authored
v3: Fix kerneldocs (kernel test robot) v4: Avoid returning NULL from drm_get_colorspace_name Signed-off-by:
-
Harry Wentland authored
We an use bitfields to track the support ones for HDMI and DP. This allows us to print colorspaces in a consistent manner without needing to know whether we're dealing with DP or HDMI. v4: - Rename _MAX to _COUNT and leave comment to indicate it's not a valid value - Fix misplaced function doc v6: - Drop magic in drm_mode_create_colorspace_property for dealing with "0" supported_colorspaces. Expect the caller to always provide a non-zero supported_colorspaces. - Improve error checking and logging Signed-off-by:
-
Harry Wentland authored
Signed-off-by:
-
Joshua Ashton authored
To match the other enums, and add more information about these values. v2: - Specify where an enum entry comes from - Clarify DEFAULT and NO_DATA behavior - BT.2020 CYCC is "constant luminance" - correct type for BT.601 v4: - drop DP/HDMI clarifications that might create more questions than answers v5: - Add note on YCC and RGB variants Signed-off-by:
Pekka Paalanen <pekka.paalanen@collabora.com> Reviewed-by:
-
Harry Wentland authored
This allows us to use strongly typed arguments. v2: - Bring NO_DATA back - Provide explicit enum values v3: - Drop unnecessary '&' from kerneldoc (emersion) v4: - Fix Normal Colorimetry comment Signed-off-by:
-
Mukul Joshi authored
This patch fixes a regression caused by a bad merge where the handling of reserved SDMA queues was accidentally removed. With the fix, the reserved SDMA queues are again correctly marked as unavailable for allocation. Fixes: a805889a ("drm/amdkfd: Update SDMA queue management for GFX9.4.3") Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
-
Alex Deucher authored
0x5b70 is a missing RV370 secondary id. Add it so we don't try and probe it with amdgpu. Cc: michel@daenzer.net Reviewed-by:
Michel Dänzer <mdaenzer@redhat.com> Tested-by:
-
Mario Limonciello authored
It's pointless on laptops to look for the SRAT table as these are not NUMA. Check the number of possible nodes is > 1 to decide whether to look for SRAT. Suggested-by:
Mario Limonciello <mario.limonciello@amd.com> Reviewed-by:
-
Jonathan Kim authored
Exception handling for vmfaults should be raised with additional data. Reported-by:
Jonathan Kim <jonathan.kim@amd.com> Reviewed-by:
-
Stanley.Yang authored
Set EEPROM ras info: rma status, health percent and bad page threshold. Signed-off-by:
Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
-
Stanley.Yang authored
It's more reasonable to check EEPROM table ras info bytes. Signed-off-by:
-
Stanley.Yang authored
Add ras info to EEPROM table, app can analyse device ECC status without GPU driver through EEPROM table ras info. Signed-off-by:
-
Stanley.Yang authored
Add setting EEPROM table version interface for umcv8.10, Add EEPROM table v2.1 to UMC v8.10. Signed-off-by:
-
Stanley.Yang authored
Add RAS EEPROM table version 2.1 macro definition. Signed-off-by:
-
Stanley.Yang authored
Rename RAS_TABLE_VER to RAS_TABLE_VER_V1, move RAS_TABLE_VER_V1 from amdgpu_ras_eeprom.c to amdgpu_ras_eeprom.h. Signed-off-by:
-
Jiadong Zhu authored
Patch the packages including CONTEXT_CONTROL and WRITE_DATA for gfx9 during the resubmission scenario. Signed-off-by:
Jiadong Zhu <Jiadong.Zhu@amd.com> Acked-by:
-
Jiadong Zhu authored
When the preempted IB frame resubmitted to cp, we need to modify the frame data including: 1. set PRE_RESUME 1 in CONTEXT_CONTROL. 2. use meta data(DE and CE) read from CSA in WRITE_DATA. Add functions to save the location the first time IBs emitted and callback to patch the package when resubmission happens. Signed-off-by:
-
Emily Deng authored
For the header, it is version related, shouldn't use MAX_VCN_INSTANCES. Signed-off-by:
Emily Deng <Emily.Deng@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Acked-by:
-
Dan Carpenter authored
The "target" either comes from kfd_create_process() which returns error pointers on error or kfd_lookup_process_by_pid() which returns NULL on error. So we need to check for both types of errors. Fixes: 0ab2d753 ("drm/amdkfd: prepare per-process debug enable and disable") Signed-off-by:
Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by:
-
Aurabindo Pillai authored
We only gain a benefit of using the ODM2:1 dynamic policy if it allow us to decrease DISPCLK to use the VMIN freq. If the display config can already achieve VMIN DISPCLK freq without ODM2:1, don't apply the policy. This patch was reverted but that causes some IGT regressions. To unblock, the patch is being applied again until IGT failures are fixed. Signed-off-by:
Alvin Lee <Alvin.Lee2@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
-
Dan Carpenter authored
The "od_table" is a pointer to a large struct, but this code is doing pointer math as if it were pointing to bytes. It results in writing far outside the struct. Fixes: 2e8452ea ("drm/amd/pm: fulfill the OD support for SMU13.0.0") Fixes: 2a9aa52e ("drm/amd/pm: fulfill the OD support for SMU13.0.7") Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
-
Sui Jingfeng authored
This patch replace the leading spaces with tab, make them keep aligned with the rest of the config options. No functional change. Signed-off-by:
Sui Jingfeng <suijingfeng@loongson.cn> Signed-off-by:
-
Hamza Mahfooz authored
clang reports: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.c:3892:6: error: stack frame size (2632) exceeds limit (2048) in 'dml314_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] 3892 | void dml314_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ 1 error generated. So, since UseMinimumDCFCLK() consumes a lot of stack space, mark it as noinline_for_stack to prevent it from blowing up dml314_ModeSupportAndSystemConfigurationFull()'s stack size. Acked-by:Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
-
Hamza Mahfooz authored
clang reports: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3797:6: error: stack frame size (2632) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] 3797 | void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ 1 error generated. So, since UseMinimumDCFCLK() consumes a lot of stack space, mark it as noinline_for_stack to prevent it from blowing up dml31_ModeSupportAndSystemConfigurationFull()'s stack size. Acked-by: -
Srinivasan Shanmugam authored
Fix below compilation error: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3524:7: error: unused variable 'should_lock_all_pipes' [-Werror,-Wunused-variable] bool should_lock_all_pipes = (update_type != UPDATE_TYPE_FAST); Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Signed-off-by:
-
Alvin Lee authored
[Description] Reduce expected SDP bandwidth due to poor QoS and arbitration issues on high bandwidth configs Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by:
Stylon Wang <stylon.wang@amd.com> Signed-off-by:
Nevenko Stupar <Nevenko.Stupar@amd.com> Tested-by:
-
Max Tseng authored
Add control flag to dc_stream_state to skip eDP BL off/link off. Acked-by:
Max Tseng <max.tseng@amd.com> Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Tested-by:
-
Saaem Rizvi authored
[Why and How] Type mismatch in index and pipe count might cause an infinite loop. code Change should resolve this issue. Acked-by:
Saaem Rizvi <syedsaaem.rizvi@amd.com> Reviewed-by:
Josip Pavic <Josip.Pavic@amd.com> Tested-by:
-
Alvin Lee authored
[Description] - Refactor HW sequencer to use a build / execute sequence - Also move gamma updates to become fast v2: squash in build fix ("drm/amd/display: Fix guarding of 'if (dc->debug.visual_confirm)'") Acked-by:Jun Lei <jun.lei@amd.com> Tested-by:
-
Dmytro Laktyushkin authored
Change to improve avoiding asymetric crb calculations for single stream scenarios. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by:
Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Tested-by:
-
YiPeng Chai authored
The link object of mgr->reserved_pages is the blocks variable in struct amdgpu_vram_reservation, not the link variable in struct drm_buddy_block. Signed-off-by:
YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by:
Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
-
Chia-I Wu authored
According to Alex, most APUs from that time seem to have the same issue (vbios says 48Mhz, actual is 100Mhz). I only have a CHIP_STONEY so I limit the fixup to CHIP_STONEY Signed-off-by:
Chia-I Wu <olvaffe@gmail.com> Signed-off-by:
-
Min Li authored
Userspace can race to free the gobj(robj converted from), robj should not be accessed again after drm_gem_object_put, otherwith it will result in use-after-free. Reviewed-by:
Min Li <lm0963hack@gmail.com> Signed-off-by:
-
Alex Deucher authored
This reverts commit f03eb1d2. This results in inconsistent timing reported via asynchronous GPU queries. Link: https://lists.freedesktop.org/archives/amd-gfx/2023-May/093731.html Cc: Jesse.Zhang@amd.com Cc: michel@daenzer.net Reviewed-by:
-
