- 14 Nov, 2023 37 commits
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Dmitry Baryshkov authored
Device tree node names should not use vendor prefix, they contain a generic name of the device. Drop the qcom, prefix from the SSBI node name. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-37-dmitry.baryshkov@linaro.orgSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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Dmitry Baryshkov authored
Device tree node names should not use vendor prefix, they contain a generic name of the device. Drop the qcom, prefix from the SSBI node name. Signed-off-by:
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Dmitry Baryshkov authored
Use generic `adc-channel@N' node names for board-specific ADC channels (routed to MPP pins) to follow the schema. Reviewed-by:
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Dmitry Baryshkov authored
Since keypad is used only by some devices, disable it by default and enable explicitly. Reviewed-by:
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Dmitry Baryshkov authored
The vph-pwr and boost regulators (even if they are unified by design) are not a property of SoC, so move them to board files. Reviewed-by:
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Dmitry Baryshkov authored
The set of regulators available over the RPM requests is not a property of the SoC. The only msm8960 board file (qcom-msm8960-cdp) also defines this node together with the compatible string. Drop the useless device node. Reviewed-by:
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Dmitry Baryshkov authored
The set of regulators available over the RPM requests is not a property of the SoC. Move them to board files. Reviewed-by:
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Dmitry Baryshkov authored
The set of regulators available over the RPM requests is not a property of the SoC. Move them to board files. Reviewed-by:
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Dmitry Baryshkov authored
The set of regulators available over the RPM requests is not a property of the SoC. Move them to board files. Reviewed-by:
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Dmitry Baryshkov authored
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by:
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Dmitry Baryshkov authored
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by:
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Dmitry Baryshkov authored
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by:
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Dmitry Baryshkov authored
Use symbolic names for IRQ flags instead of using the numeric values. Reviewed-by:
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Dmitry Baryshkov authored
Move reg property to come after compatible. Reviewed-by:
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Dmitry Baryshkov authored
Move reg property to come after compatible. Reviewed-by:
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Dmitry Baryshkov authored
Move pm8921 device nodes to follow the alphanumberic sorting order. Reviewed-by:
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Dmitry Baryshkov authored
Move pm8058 device nodes to follow the alphanumberic sorting order. Reviewed-by:
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Dmitry Baryshkov authored
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by:
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Dmitry Baryshkov authored
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by:
Neil Armstrong <neil.armstrong@linaro.org> Acked-by:
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Dmitry Baryshkov authored
The PMICs are not a part of the SoC, so move PMICs to separate files and include them from the board files. Suggested-by:
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Dmitry Baryshkov authored
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by:
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Dmitry Baryshkov authored
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Reviewed-by:
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Dmitry Baryshkov authored
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Acked-by:
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Dmitry Baryshkov authored
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Acked-by:
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Dmitry Baryshkov authored
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Reviewed-by:
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Dmitry Baryshkov authored
Change PM8921 node labels to start with pm8921_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by:
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Dmitry Baryshkov authored
Change PM8058 node labels to start with pm8058_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by:
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Dmitry Baryshkov authored
Change PM8018 node labels to start with pm8018_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by:
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Dmitry Baryshkov authored
Change PM8921 node labels to start with pm8921_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by:
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Dmitry Baryshkov authored
As the vendor DTS files were moved to per-vendor subdirs, there no need to use common prefixes. Drop the `qcom-' prefix from PMIC dtsi file. This makes 32-bit qcom/ dts files closer to arm64 ones. Reviewed-by:
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Dmitry Baryshkov authored
Group file inclusion to follow contemporary practice. Reviewed-by:
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Dmitry Baryshkov authored
Move sdcc1 device node to follow the alphanumberic sorting order. Reviewed-by:
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Dmitry Baryshkov authored
Directly use pm8058_keypad to declare keypad properties instead of referencing pm8058 top-level node. Reviewed-by:
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Dmitry Baryshkov authored
To simplify MSM8960 CDP board file, add label to PMIC keypad node. Reviewed-by:
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Dmitry Baryshkov authored
The XOADC is present at the address 0x197 rather than just 197. It doesn't change a lot (since the driver hardcodes all register addresses), but the DT should present correct address anyway. Fixes: c4b70883 ("ARM: dts: add XOADC and IIO HWMON to APQ8064") Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by:
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by:
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- 13 Nov, 2023 1 commit
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Linus Torvalds authored
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- 12 Nov, 2023 2 commits
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Miri Korenblit authored
The commands should be sorted inside the group definition. Fix the ordering so we won't get following warning: WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg)) Link: https://lore.kernel.org/regressions/2fa930bb-54dd-4942-a88d-05a47c8e9731@gmail.com/ Link: https://lore.kernel.org/linux-wireless/CAHk-=wix6kqQ5vHZXjOPpZBfM7mMm9bBZxi2Jh7XnaKCqVf94w@mail.gmail.com/ Fixes: b6e3d1ba ("wifi: iwlwifi: mvm: implement new firmware API for statistics") Tested-by:
Niklāvs Koļesņikovs <pinkflames.linux@gmail.com> Tested-by:
Damian Tometzki <damian@riscv-rocks.de> Acked-by:
Kalle Valo <kvalo@kernel.org> Signed-off-by:
Miri Korenblit <miriam.rachel.korenblit@intel.com> Signed-off-by:
Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Linus Torvalds authored
Merge tag 'parisc-for-6.7-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc architecture fixes from Helge Deller: - Include the upper 5 address bits when inserting TLB entries on a 64-bit kernel. On physical machines those are ignored, but in qemu it's nice to have them included and to be correct. - Stop the 64-bit kernel and show a warning if someone tries to boot on a machine with a 32-bit CPU - Fix a "no previous prototype" warning in parport-gsc * tag 'parisc-for-6.7-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Prevent booting 64-bit kernels on PA1.x machines parport: gsc: mark init function static parisc/pgtable: Do not drop upper 5 address bits of physical address
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