- 14 Aug, 2023 29 commits
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Lin, Meng-Bo authored
Similar to A5, E5 uses a Melfas MMS345L touchscreen that is connected to blsp_i2c5. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230812071448.4710-1-linmengbo0689@protonmail.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Nikita Travkin authored
When initially submitted, the sc7180 support only targeted CROS devices that make use of alternative TF-A firmware and not the official Qualcomm firmware. The PSCI implementations in those firmwares differ however so devices that use qcom firmware, like WoA laptops such as aspire1 need different setup. This commit adjusts the SoC dtsi to the OSI mode PSCI setup, common to the Qualcomm firmware and introduces new sc7180-firmware-tfa.dtsi that overrides the PSCI setup for the PC mode and uses TF-A specific psci-suspend-param. This dtsi is added to all boards that appear to use TF-A. Signed-off-by: Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20230808-sc7180-tfa-fw-v1-1-666d5d8467e5@trvn.ruSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
Disappointigly, the camera activity LED is implemented in software. Hook it up as a gpio-led and (until we have camera *and* a "camera on" LED trigger) configure it as a panic indicator. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230805-topic-x13s_cam_led-v1-1-443d752158c4@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
Pins 83-86 and 158-160 are NC, so there's no point in keeping them reserved. Take care of that. Fixes: 32c23138 ("arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetree") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230803-topic-x13s_pin-v1-1-fae792274e89@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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AngeloGioacchino Del Regno authored
Add the required nodes to support the display hardware on msm8998. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> [konrad: update the commit msg and AGdR's email, rebase] Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230805-topic-8998_dpu-v1-1-9d402dc1ecc0@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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David Wronek authored
Fix IRQ flags mismatch which was keeping dsi1 from probing by changing interrupts = <4> to interrupts = <5>. Fixes: 2752bb7d ("arm64: dts: qcom: msm8996: add second DSI interface") Signed-off-by: David Wronek <davidwronek@gmail.com> Acked-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230805130936.359860-2-davidwronek@gmail.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Rohit Agarwal authored
Add all the regulators along with labels found on SDX75 IDP. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-10-git-send-email-quic_rohiagar@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Rohit Agarwal authored
Add rpmhpd node and opps for this node to the SDX75 dts. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-9-git-send-email-quic_rohiagar@quicinc.com [bjorn: include qcom-rpmpd.h as well] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Rohit Agarwal authored
SDX75-idp features pmk8550, pmx75 and pm7550ba pmic, so include them. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-8-git-send-email-quic_rohiagar@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Rohit Agarwal authored
Add dtsi for pmx75 PMIC found in Qualcomm platforms. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-6-git-send-email-quic_rohiagar@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Rohit Agarwal authored
Add dtsi for pm7550ba PMIC found in Qualcomm platforms. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/1691415534-31820-5-git-send-email-quic_rohiagar@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Rohit Agarwal authored
Add pinctrl gpio dts node for pm7250b. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-4-git-send-email-quic_rohiagar@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Rohit Agarwal authored
Add SPMI node to SDX75 dtsi. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-3-git-send-email-quic_rohiagar@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
The MMSS SMMU has its own power domain. Attach it so that we can drop the "keep it always-on" hack. Fixes: 05ce21b5 ("arm64: dts: qcom: msm8998: Configure the multimedia subsystem iommu") Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-2-ba1b1fd9ee75@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
The MMSS SMMU has been abusingly consuming the exposed RPM interconnect clock. Drop it. Fixes: 05ce21b5 ("arm64: dts: qcom: msm8998: Configure the multimedia subsystem iommu") Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-1-ba1b1fd9ee75@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
SM8450 also exposes RPMh stats, hook them up for low power state monitoring. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-8450_stats-v1-1-f26ae3fdf2cf@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
MMCC has its own GPLL0 legs - one for 1-1 and one for div-2 output. We've already been using the correct one in the non-div case, start doing so for the other one as well. Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-8-6222fbc2916b@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
GPUCC has its own GPLL0 leg, switch to it to allow shutting it down when it's unused. Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-7-6222fbc2916b@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bjorn Andersson authored
Merge additional MSM8998 GCC DeviceTree binding constants for use in the MSM8998 DeviceTree source.
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Konrad Dybcio authored
GPLL0 has two separate outputs to both GPUSS and MMSS: one that's 2-divided and one that runs at the same rate as the GPLL0 itself. Add the missing ones to the binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Sridharan S N authored
Add support for wlan-2g LED on GPIO 36 and wps buttons on GPIO 35. Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230616083238.20690-2-quic_sridsn@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
Add the Qualcomm Pseudo-Random Number Generator. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-8450_prng-v1-3-01becceeb1ee@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bryan O'Donoghue authored
When we have no camera mezzanine attached it is still possible to run the test-pattern generator of the CSID block. As an example: media-ctl --reset yavta --no-query -w '0x009f0903 1' /dev/v4l-subdev2 yavta --list /dev/v4l-subdev2 media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:UYVY8_1X16/1920x1080 field:none]' media-ctl -l '"msm_csid0":1->"msm_ispif0":0[1]' media-ctl -d /dev/media0 -V '"msm_ispif0":0[fmt:UYVY8_1X16/1920x1080 field:none]' media-ctl -l '"msm_ispif0":1->"msm_vfe0_rdi0":0[1]' media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:UYVY8_1X16/1920x1080]' media-ctl -d /dev/media0 -p yavta -B capture-mplane --capture=5 -n 5 -I -f UYVY -s 1920x1080 --file=TPG-UYVU-1920x1080-000-#.bin /dev/video0 Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-8-bryan.odonoghue@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bryan O'Donoghue authored
At the moment we define a single ov5640 sensor in the apq8016-sbc and disable that sensor. The sensor mezzanine for this is a D3 Engineering Dual ov5640 mezzanine card. Move the definition from the apq8016-sbc where it shouldn't be to a standalone dts. Enables the sensor by default, as we are adding a standalone mezzanine structure. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-7-bryan.odonoghue@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bryan O'Donoghue authored
There are two control lines controlled by GPIO going into ov5640 - Reset - Powerdown The driver and yaml expect "reset-gpios" and "powerdown-gpios" there has never been an "enable-gpios". Fixes: 39e0ce6c ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes") Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-6-bryan.odonoghue@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bryan O'Donoghue authored
The driver for the ov5640 doesn't do a set-rate, instead it expects the clock to already be set at an appropriate rate. Similarly the yaml for ov5640 doesn't understand clock-frequency. Convert from clock-rate to assigned-clock and assigned-clock-rate to remediate. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-5-bryan.odonoghue@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bryan O'Donoghue authored
The yaml constraint for data-lanes is [1, 2] not [0, 2]. The driver itself doesn't do anything with the data-lanes declaration save count the number of specified data-lanes and calculate the link rate so, this change doesn't have any functional side-effects. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-4-bryan.odonoghue@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bryan O'Donoghue authored
The ov5640 driver expects DOVDD, AVDD and DVDD as regulator supply names. The ov5640 has depended on these names since the driver was committed upstream in 2017. Similarly apq8016-sbc.dtsi has had completely different regulator names since its own initial commit in 2020. Perhaps the regulators were left on in previous 410c bootloaders. In any case today on 6.5 we won't switch on the ov5640 without correctly naming the regulators. Fixes: 39e0ce6c ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes") Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-3-bryan.odonoghue@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bryan O'Donoghue authored
Each CSIPHY in CAMMS maps to a port here in the dtsi, since the number of CSIPHYs is fixed per SoC define the 8916 ports for both available PHYs. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-2-bryan.odonoghue@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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- 11 Aug, 2023 11 commits
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Sricharan Ramabadhran authored
Add initial device tree support for the Qualcomm IPQ5018 SoC and rdp432-c2 board. Few things like 'reboot' does not work because, couple of more 'SCM' APIS are needed to clear some TrustZone settings. Those will be posted separately. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Co-developed-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-6-git-send-email-quic_srichara@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Sricharan Ramabadhran authored
Document the new ipq5018 SOC/board device tree bindings. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-4-git-send-email-quic_srichara@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bjorn Andersson authored
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in order to the the clock defines.
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Sricharan Ramabadhran authored
This patch adds support for the global clock controller found on the IPQ5018 based devices. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bartosz Golaszewski authored
Enable the second MAC on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-10-brgl@bgdev.plSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bartosz Golaszewski authored
Once we add a second ethernet node, the MDIO bus names will conflict unless we provide aliases. Add one for the existing ethernet node. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-9-brgl@bgdev.plSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bartosz Golaszewski authored
For improved readability order the aliases alphabetically for sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-8-brgl@bgdev.plSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bartosz Golaszewski authored
Add a second SGMII PHY that will be used by EMAC1 on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-7-brgl@bgdev.plSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bartosz Golaszewski authored
We'll be adding a second SGMII PHY on the same MDIO bus, so let's index the first one for better readability. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-6-brgl@bgdev.plSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bartosz Golaszewski authored
Device-tree bindings for MDIO define per-PHY reset-gpios as well as a global reset-gpios property at the MDIO node level which controls all devices on the bus. The latter is most likely a workaround for the chicken-and-egg problem where we cannot read the ID of the PHY before bringing it out of reset but we cannot bring it out of reset until we've read its ID. I have proposed a comprehensive solution for this problem in 2020 but it never got upstream. We do however have workaround in place which allows us to hard-code the PHY id in the compatible property, thus skipping the ID scanning. Let's make the device-tree for sa8775p-ride slightly more correct by moving the reset-gpios property to the PHY node with its ID put into the PHY node's compatible. Link: https://lore.kernel.org/all/20200622093744.13685-1-brgl@bgdev.pl/Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-5-brgl@bgdev.plSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bartosz Golaszewski authored
Enable the second SerDes PHY on sa8775p-ride development board. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-4-brgl@bgdev.plSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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