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  1. 14 Aug, 2004 1 commit
  2. 02 Aug, 2004 1 commit
    • Paul Mackerras's avatar
      [PATCH] ppc64: improve SLB reload · 178af227
      Paul Mackerras authored
      Rewrite/cleanup of the SLB management code.  This removes nearly all the
      SLB related code from arch/ppc64/kernel/stab.c and puts a rewritten version
      in arch/ppc64/mm, where it better belongs.  The main SLB miss path is in
      assembler and the other routines have been cleaned up and streamlined.
      
      Notable changes:
      
      - Ugly bitfields no longer used for generating SLB entries.
      
      - slb_allocate() (the main SLB miss routine) is now in assembler, and all
        the data it uses is stored in the PACA.
      
      - The mm context is now copied into the PACA at context switch time, to
        avoid looking up the thread struct on SLB miss.
      
      - An SLB miss will now never (directly) result in a call to
        do_page_fault.  If we get a miss on a totally bogus address the handler
        will now put in an SLB referencing VSID 0.  This will never have any
        pages, so we'll get the (fatal) page fault shortly afterwards.  This
        simplifies the SLB entry and exit paths.
      
      - The round-robin pointer in the PACA now references the last-used
        instead of next-to-use SLB slot, which simplifies the asm for updating it
        slightly.
      
      - Unify do_slb_bolted with the general SLB miss path.  There is now one
        SLB miss handler, in assembler, and called with only the low-level
        exception prolog (EXCEPTION_PROLOG_[PI]SERIES rather than
        EXCEPTION_PROLOG_COMMON) and minimal extra save/restore logic.
      
      - Streamlines the exception entry/exit path of the SLB miss handler to
        shave a few cycles off.  The most significant change is that the RI bit
        is left off throughout the whole handler, which avoids an extra mtmsrd to
        turn it back off on the exit path.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      178af227
  3. 27 Feb, 2004 1 commit
    • Anton Blanchard's avatar
      [PATCH] ppc64: TLB flush rework · 750737f6
      Anton Blanchard authored
      ppc64 tlb flush rework from Paul Mackerras
      
      Instead of doing a double pass of the pagetables, we batch things
      up in the pte flush routines and then shoot the batch down in
      flush_tlb_pending.
      
      Our page aging was broken, we never flushed entries out of the ppc64
      hashtable. We now flush in ptep_test_and_clear_young.
      
      A number of other things were fixed up in the process:
      
      - change ppc64_tlb_batch to per cpu data
      - remove some LPAR debug code
      - be more careful with ioremap_mm inits
      - clean up arch/ppc64/mm/init.c, create tlb.c
      750737f6
  4. 19 Jan, 2004 2 commits
    • Paul Mackerras's avatar
      [PATCH] sort exception tables · 35b93751
      Paul Mackerras authored
      This patch arranges for the exception tables to be sorted on most
      architectures.  It sorts the main kernel exception table on startup
      and the module exception tables when they get loaded.  The main table
      is sorted reasonably early - just after kmem_cache_init - but that
      could be moved even earlier if necessary.
      
      There is now a lib/extable.c which includes the sort_extable()
      function from arch/ppc/mm/extable.c and the search_extable() function
      from arch/i386/mm/extable.c, which had been copied to many
      architectures.  On many architectures, arch/$(ARCH)/mm/extable.c
      became empty and so I have removed it.
      
      There are four architectures which do things differently from i386:
      alpha, ia64, sparc and sparc64.  Alpha and ia64 store the offset from
      the offset from the exception table entry to the instruction, and
      sparc and sparc64 have range entries in the table.  For those
      architectures I have added empty sort_extable functions.  The
      maintainers for those architectures can implement something better if
      they care to.  As it is they are no worse off than before.
      
      Although it is a moderately sizable patch, it ends up with a net
      reduction of 377 lines in the size of the kernel source. :)
      
      I have tested this on x86 and ppc with a module that uses __get_user
      in an init function, deliberately laid out to get the exception table
      out of order, and it works (whereas it oopsed without this patch).
      35b93751
    • Andrew Morton's avatar
      [PATCH] ppc64: __hash_page rewrite, from Ben Herrenschmidt · 008d0de4
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Rewrite __hash_page function in assembly in such a way we don't need
      the page table lock any more. We now rely on a BUSY bit in the linux
      PTE on which we spin on when doing an update of the PTE
      008d0de4
  5. 07 Sep, 2003 1 commit
  6. 15 Dec, 2002 1 commit
  7. 14 Dec, 2002 1 commit
  8. 22 Sep, 2002 1 commit
  9. 17 Sep, 2002 1 commit
  10. 15 Feb, 2002 1 commit
  11. 05 Feb, 2002 2 commits
    • Linus Torvalds's avatar
      v2.4.4.5 -> v2.4.4.6 · c9df1e20
      Linus Torvalds authored
        - Johannes Erdfelt: OHCI hash-chain corruption fix, USB updates
        - Richard Henderson, Ivan Kokshaysky: alpha PCI iommu fixes
        - Tim Waugh: parport changelogs and printk levels
        - Andrew Morton: vmalloc off-by-one (overly sensitive) test
        - Al Viro: VFS layer cleanups
        - Cort Dougan: PPC updates (big bootloader re-org)
        - Alan Cox: more merges, remove phillips camera conversion code
        - Andrea Arkangeli: alpha fixups
        - OGAWA Hirofumi: big-sector support with FAT
        - Neil Brown: more md fixes
      c9df1e20
    • Linus Torvalds's avatar
      Import changeset · 7a2deb32
      Linus Torvalds authored
      7a2deb32