- 22 Dec, 2021 1 commit
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Bjorn Andersson authored
The SM6125_VDDCX constant is introduced through a separate branch and is not available in the dts branch. Temporarily replace the constant with it's value to avoid the build breakage. Signed-off-by:Bjorn Andersson <bjorn.andersson@linaro.org>
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- 21 Dec, 2021 2 commits
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Vinod Koul authored
Enable the usb phy and usb controller in peripheral mode. This helps to get the adb working with the QRD board. Signed-off-by:
Vinod Koul <vkoul@kernel.org> Signed-off-by:
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Vinod Koul authored
SM8450 features a single USB controller which connects to both HS and SS phy. Add the USB and the phy nodes for Qualcomm SM8450 SoC. Signed-off-by:
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- 15 Dec, 2021 23 commits
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Dmitry Baryshkov authored
Add device tree nodes for two i2c blocks: i2c13 and i2c14. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Vladimir Zapolskiy authored
The change adds a description of a SM8450 cpufreq-epss controller and references to it from CPU nodes. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
This adds RPMH power domain found in SM8450 SoC Signed-off-by:
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Vinod Koul authored
Enable the UFS and phy node and add the regulators used by them. Signed-off-by:
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Vinod Koul authored
Add the UFS and QMP PHY node for SM8450 SoC Signed-off-by:
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Vinod Koul authored
Add the RPMH regulators found in QRD-SM8450 platform Signed-off-by:
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Vinod Koul authored
Add DTS for Qualcomm QRD platform which uses SM8450 SoC and mark the reserved nodes. Signed-off-by:
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Vinod Koul authored
Add the apps smmu node as found in the SM8450 SoC Signed-off-by:
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Vinod Koul authored
Add the reserved memory nodes for SM8450. This is based on the downstream documentation. Signed-off-by:
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Vinod Koul authored
Add tlmm node found in SM8450 SoC and uart pin configuration Signed-off-by:
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Vinod Koul authored
This add based DTSI for SM8450 SoC and includes base description of CPUs, GCC, RPMHCC, UART, interuupt-controller which helps to boot to shell with console on boards with this SoC Signed-off-by:
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Baruch Siach authored
There must be three parameters in gpio-ranges property. Fixes this not very helpful error message: OF: /soc/pinctrl@1000000: (null) = 3 found 3 Fixes: 1e827785 ("arm64: dts: Add ipq6018 SoC and CP01 board support") Cc: Sricharan R <sricharan@codeaurora.org> Signed-off-by:
Baruch Siach <baruch@tkos.co.il> Tested-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by:
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David Heidelberg authored
Use correct compatible according to dt-binding. Fixes + few other lines of `make qcom/sdm845-oneplus-fajita.dtb`: arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: qfprom@784000: compatible: ['qcom,qfprom'] is too short From schema: Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml Signed-off-by:David Heidelberg <david@ixit.cz> Signed-off-by:
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Bjorn Andersson authored
Downstream defines four ADC channels related to thermal sensors external to the PM8998 and two channels for internal voltage measurements. Add these to the upstream SDM845 MTP, describe the thermal monitor channels and add thermal_zones for these. Signed-off-by:
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Bjorn Andersson authored
Add a node for the ADC Thermal Monitor found in the PM8998 PMIC. This is used to connect thermal zones with ADC channels. Signed-off-by:
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David Heidelberg authored
Property #stream-id-cells is legacy leftover and isn't currently documented nor used. Signed-off-by:
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Bjorn Andersson authored
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org The immutable branch contains DT binding and in defines for the global clock controller registers used the the Qualcomm SM8450 dtsi.
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Konrad Dybcio authored
This reverts commit ed9500c1. The clock-frequency property was meant to aid platforms with broken firmwares that don't set up the timer properly on their own. Don't include it where it is not the case. Signed-off-by:
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Srinivas Kandagatla authored
Add MBHC support available in WCD934X codec. Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by:
Steev Klimaszewski <steev@kali.org> Signed-off-by:
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Srinivas Kandagatla authored
Currently Soundcard has 1 rx device for headset and SoundWire Speaker Playback. This setup has issues, ex if we try to play on headset the audio stream is also sent to SoundWire Speakers and we will hear sound in both headsets and speakers. Make a separate device for Speakers and Headset so that the streams are different and handled properly. Fixes: 45021d35 ("arm64: dts: qcom: c630: Enable audio support") Signed-off-by:
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Katherine Perez authored
This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350 Chipset Signed-off-by:
Katherine Perez <kaperez@linux.microsoft.com> Signed-off-by:
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Caleb Connolly authored
The msm-id and board-id can be used to select the correct dtb when multiple are provided to the bootloader. Multiple DTBs can be provided on sdm845 devices using boot image header v1 by appending them all to the kernel image before creating the boot image. The bootloader then selects them like this: Best match DTB tags 321/00000008/0x00000000/20001/20014/20115/20018/0/(offset)0x79998E27/(size)0x000173CD Using pmic info 0x20014/0x20115/0x20018/0x0 for device 0x20014/0x20115/0x20018/0x0 Signed-off-by:
Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by:
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Vinod Koul authored
Add device tree bindings for global clock controller on SM8450 SoCs. Signed-off-by:
Stephen Boyd <sboyd@kernel.org> Signed-off-by:
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- 13 Dec, 2021 6 commits
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Luca Weiss authored
Enable the remoteprocs found on the SoC and add a qcom,rmtfs-mem node. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Reviewed-by:
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Luca Weiss authored
Add the required nodes for booting the CDSP on sm6350. Signed-off-by:
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Luca Weiss authored
Add the required nodes for booting the ADSP on sm6350. Signed-off-by:
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Luca Weiss authored
Add the required nodes for booting the MPSS on sm6350. Signed-off-by:
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Luca Weiss authored
Sort clocks and interrupts as specified in the docs and remove the stray property #power-domain-cells from aoss_qmp to solve dtbs_check validation errors. Signed-off-by:
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Julian Ribbeck authored
Samsung J5 2015 is a MSM8916 based Smartphone. It is similar to some of the other MSM8916 devices, especially the Samsung ones. With this patch initial support for the following is added: - eMMC/SD card - Buttons - USB (although no suiting MUIC driver currently) - UART (untested for lack of equipment) - WiFi/Bluetooth (WCNSS) It is worth noting that Samsung J5 with MSM8916 exists in different generations (e.g Samsung J5 2015 and Samsung J5 2016) which each have different models (e.g. samsung-j5nlte, samsung-j5xnlte, etc). This patch is only regarding the 2015 generation, but should work with all of it's models, as far as we could test. Co-developed-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
Julian Ribbeck <julian.ribbeck@gmx.de> Signed-off-by:
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- 01 Dec, 2021 8 commits
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Dmitry Baryshkov authored
Change sdhcN aliases to mmcN to make them actually work. Currently the board uses non-standard aliases sdhcN, which do not work, resulting in mmc0 and mmc1 hosts randomly changing indices between boots. Fixes: c4da5a56 ("arm64: dts: qcom: Add msm8916 sdhci configuration nodes") Signed-off-by:
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Martin Botka authored
Add RPM Power Domains to internal eMMC and SDCard. Signed-off-by:
Martin Botka <martin.botka@somainline.org> Signed-off-by:
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Martin Botka authored
Add RPM Power Distribution node for sm6125 SoC. Signed-off-by:
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Kshitiz Godara authored
Add Touchscreen and touchpad hid-over-i2c node for the sc7280 CRD board Signed-off-by:
Kshitiz Godara <kgodara1@codeaurora.org> Signed-off-by:
Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by:
Matthias Kaehlcke <mka@chromium.org> Signed-off-by:
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Kshitiz Godara authored
The IDP2 and CRD boards share the EC and H1 parts, so define all related device nodes into a common file and include them in the idp2 and crd dts files to avoid duplication. Signed-off-by:
Kshitiz Godara <kgodara@codeaurora.org> Signed-off-by:
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Rajendra Nayak authored
CRD (Compute Reference Design) is a sc7280 based board, largely derived from the existing IDP board design with some key deltas 1. has EC and H1 over SPI similar to IDP2 2. touchscreen and trackpad support 3. eDP display We just add the barebones dts file here, subsequent patches will add support for EC/H1 and other components. Signed-off-by:
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Rajendra Nayak authored
Document the qcom,sc7280-crd board based off sc7280 SoC, The board is also known as hoglin in the Chrome OS builds, so document the google,hoglin compatible as well. Signed-off-by:
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Dang Huynh authored
This property doesn't seem to exist in the documentation nor in source code, but for some reason it is defined in a bunch of device trees. Signed-off-by:
Dang Huynh <danct12@riseup.net> Signed-off-by:
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