1. 20 Aug, 2009 9 commits
    • Benjamin Herrenschmidt's avatar
      powerpc: Remove use of a second scratch SPRG in STAB code · c5a8c0c9
      Benjamin Herrenschmidt authored
      The STAB code used on Power3 and RS/64 uses a second scratch SPRG to
      save a GPR in order to decide whether to go to do_stab_bolted_* or
      to handle a normal data access exception.
      
      This prevents our scheme of freeing SPRG3 which is user visible for
      user uses since we cannot use SPRG0 which, on RS/64, seems to be
      read-only for supervisor mode (like POWER4).
      
      This reworks the STAB exception entry to use the PACA as temporary
      storage instead.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c5a8c0c9
    • Benjamin Herrenschmidt's avatar
      powerpc: Use names rather than numbers for SPRGs (v2) · ee43eb78
      Benjamin Herrenschmidt authored
      The kernel uses SPRG registers for various purposes, typically in
      low level assembly code as scratch registers or to hold per-cpu
      global infos such as the PACA or the current thread_info pointer.
      
      We want to be able to easily shuffle the usage of those registers
      as some implementations have specific constraints realted to some
      of them, for example, some have userspace readable aliases, etc..
      and the current choice isn't always the best.
      
      This patch should not change any code generation, and replaces the
      usage of SPRN_SPRGn everywhere in the kernel with a named replacement
      and adds documentation next to the definition of the names as to
      what those are used for on each processor family.
      
      The only parts that still use the original numbers are bits of KVM
      or suspend/resume code that just blindly needs to save/restore all
      the SPRGs.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ee43eb78
    • Benjamin Herrenschmidt's avatar
      powerpc: Rename exception.h to exception-64s.h · 8aa34ab8
      Benjamin Herrenschmidt authored
      The file include/asm/exception.h contains definitions
      that are specific to exception handling on 64-bit server
      type processors.
      
      This renames the file to exception-64s.h to reflect that
      fact and avoid confusion.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8aa34ab8
    • Anton Blanchard's avatar
      powerpc: Preload application text segment instead of TASK_UNMAPPED_BASE · de4376c2
      Anton Blanchard authored
      TASK_UNMAPPED_BASE is not used with the new top down mmap layout. We can
      reuse this preload slot by loading in the segment at 0x10000000, where almost
      all PowerPC binaries are linked at.
      
      On a microbenchmark that bounces a token between two 64bit processes over pipes
      and calls gettimeofday each iteration (to access the VDSO), both the 32bit and
      64bit context switch rate improves (tested on a 4GHz POWER6):
      
      32bit: 273k/sec -> 283k/sec
      64bit: 277k/sec -> 284k/sec
      Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      de4376c2
    • Anton Blanchard's avatar
      powerpc: Rearrange SLB preload code · 5eb9bac0
      Anton Blanchard authored
      With the new top down layout it is likely that the pc and stack will be in the
      same segment, because the pc is most likely in a library allocated via a top
      down mmap. Right now we bail out early if these segments match.
      
      Rearrange the SLB preload code to sanity check all SLB preload addresses
      are not in the kernel, then check all addresses for conflicts.
      Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      5eb9bac0
    • Anton Blanchard's avatar
      powerpc: Move 64bit VDSO to improve context switch performance · 30d0b368
      Anton Blanchard authored
      On 64bit applications the VDSO is the only thing in segment 0. Since the VDSO
      is position independent we can remove the hint and let get_unmapped_area pick
      an area. This will mean the vdso will be near other mmaps and will share
      an SLB entry:
      
      10000000-10001000 r-xp 00000000 08:06 5778459        /root/context_switch_64
      10010000-10011000 r--p 00000000 08:06 5778459        /root/context_switch_64
      10011000-10012000 rw-p 00001000 08:06 5778459        /root/context_switch_64
      fffa92ae000-fffa92b0000 rw-p 00000000 00:00 0
      fffa92b0000-fffa9453000 r-xp 00000000 08:06 4334051  /lib64/power6/libc-2.9.so
      fffa9453000-fffa9462000 ---p 001a3000 08:06 4334051  /lib64/power6/libc-2.9.so
      fffa9462000-fffa9466000 r--p 001a2000 08:06 4334051  /lib64/power6/libc-2.9.so
      fffa9466000-fffa947c000 rw-p 001a6000 08:06 4334051  /lib64/power6/libc-2.9.so
      fffa947c000-fffa9480000 rw-p 00000000 00:00 0
      fffa9480000-fffa94a8000 r-xp 00000000 08:06 4333852  /lib64/ld-2.9.so
      fffa94b3000-fffa94b4000 rw-p 00000000 00:00 0
      
      fffa94b4000-fffa94b7000 r-xp 00000000 00:00 0        [vdso] <----- here I am
      
      fffa94b7000-fffa94b8000 r--p 00027000 08:06 4333852  /lib64/ld-2.9.so
      fffa94b8000-fffa94bb000 rw-p 00028000 08:06 4333852  /lib64/ld-2.9.so
      fffa94bb000-fffa94bc000 rw-p 00000000 00:00 0
      fffe4c10000-fffe4c25000 rw-p 00000000 00:00 0        [stack]
      
      On a microbenchmark that bounces a token between two 64bit processes over pipes
      and calls gettimeofday each iteration (to access the VDSO), our context switch
      rate goes from 268k to 277k ctx switches/sec (tested on a 4GHz POWER6).
      Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      30d0b368
    • Geoff Thorpe's avatar
      powerpc: expose the multi-bit ops that underlie single-bit ops. · 0d2d3e38
      Geoff Thorpe authored
      The bitops.h functions that operate on a single bit in a bitfield are
      implemented by operating on the corresponding word location. In all
      cases the inner logic is valid if the mask being applied has more than
      one bit set, so this patch exposes those inner operations. Indeed,
      set_bits() was already available, but it duplicated code from
      set_bit() (rather than making the latter a wrapper) - it was also
      missing the PPC405_ERR77() workaround and the "volatile" address
      qualifier present in other APIs. This corrects that, and exposes the
      other multi-bit equivalents.
      
      One advantage of these multi-bit forms is that they allow word-sized
      variables to essentially be their own spinlocks, eg. very useful for
      state machines where an atomic "flags" variable can obviate the need
      for any additional locking.
      Signed-off-by: default avatarGeoff Thorpe <geoff@geoffthorpe.net>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      0d2d3e38
    • Michael Ellerman's avatar
      powerpc/mpic: Fix MPIC_BROKEN_REGREAD on non broken MPICs · 11a6b292
      Michael Ellerman authored
      The workaround enabled by CONFIG_MPIC_BROKEN_REGREAD does not work
      on non-broken MPICs. The symptom is no interrupts being received.
      
      The fix is twofold. Firstly the code was broken for multiple isus,
      we need to index into the shadow array with the src_no, not the idx.
      Secondly, we always do the read, but only use the VECPRI_MASK and
      VECPRI_ACTIVITY bits from the hardware, the rest of "val" comes
      from the shadow.
      Signed-off-by: default avatarMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      11a6b292
    • Gerhard Pircher's avatar
      powerpc/amigaone: Convert amigaone_init() to a machine_device_initcall() · 66dc3304
      Gerhard Pircher authored
      This allows to remove the ppc_md.init() hook in the setup code.
      Signed-off-by: default avatarGerhard Pircher <gerhard_pircher@gmx.net>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      66dc3304
  2. 19 Aug, 2009 2 commits
  3. 18 Aug, 2009 20 commits
  4. 17 Aug, 2009 9 commits
    • Linus Torvalds's avatar
      df4ecf15
    • Linus Torvalds's avatar
      Merge branch 'for-linus' of git://oss.sgi.com/xfs/xfs · c58afec8
      Linus Torvalds authored
      * 'for-linus' of git://oss.sgi.com/xfs/xfs:
        xfs: fix locking in xfs_iget_cache_hit
      c58afec8
    • Linus Torvalds's avatar
      Merge branch 'for-linus' of... · 52dec22e
      Linus Torvalds authored
      Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/security-testing-2.6
      
      * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/security-testing-2.6:
        security: define round_hint_to_min in !CONFIG_SECURITY
        Security/SELinux: seperate lsm specific mmap_min_addr
        SELinux: call cap_file_mmap in selinux_file_mmap
        Capabilities: move cap_file_mmap to commoncap.c
      52dec22e
    • Eric Paris's avatar
      inotify: start watch descriptor count at 1 · 08e53fcb
      Eric Paris authored
      The inotify_add_watch man page specifies that inotify_add_watch() will
      return a non-negative integer.  However, historically the inotify
      watches started at 1, not at 0.
      
      Turns out that the inotifywait program provided by the inotify-tools
      package doesn't properly handle a 0 watch descriptor.  In 7e790dd5 we
      changed from starting at 1 to starting at 0.  This patch starts at 1,
      just like in previous kernels, but also just like in previous kernels
      it's possible for it to wrap back to 0.  This preserves the kernel
      functionality exactly like it was before the patch (neither method broke
      the spec)
      Signed-off-by: default avatarEric Paris <eparis@redhat.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      08e53fcb
    • Eric Paris's avatar
      inotify: tail drop inotify q_overflow events · cd94c8bb
      Eric Paris authored
      In f44aebcc the tail drop logic of events with no file backing
      (q_overflow and in_ignored) was reversed so IN_IGNORED events would
      never be tail dropped.  This now means that Q_OVERFLOW events are NOT
      tail dropped.  The fix is to not tail drop IN_IGNORED, but to tail drop
      Q_OVERFLOW.
      Signed-off-by: default avatarEric Paris <eparis@redhat.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      cd94c8bb
    • Eric Paris's avatar
      notify: unused event private race · eef3a116
      Eric Paris authored
      inotify decides if private data it passed to get added to an event was
      used by checking list_empty().  But it's possible that the event may
      have been dequeued and the private event removed so it would look empty.
      
      The fix is to use the return code from fsnotify_add_notify_event rather
      than looking at the list.
      Signed-off-by: default avatarEric Paris <eparis@redhat.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      eef3a116
    • Linus Torvalds's avatar
      Merge master.kernel.org:/home/rmk/linux-2.6-arm · 0f66f96d
      Linus Torvalds authored
      * master.kernel.org:/home/rmk/linux-2.6-arm: (37 commits)
        ARM: 5673/1: U300 fix initsection compile warning
        ARM: Fix broken highmem support
        mx31moboard: invert sdhc ro signal sense
        ARM: S3C24XX: Fix clkout mpx error
        ARM: S3C64XX: serial: Fix a typo in Kconfig
        IXP4xx: Fix IO_SPACE_LIMIT for 2.6.31-rc core PCI changes
        OMAP3: RX51: Updated rx51_defconfig
        OMAP2/3: mmc-twl4030: Free up MMC regulators while cleaning up
        OMAP3: RX51: Define TWL4030 USB transceiver in board file
        OMAP3: Overo: Fix smsc911x platform device resource value
        OMAP3: Fix omap3 sram virtual addres overlap vmalloc space after increasing vmalloc size
        OMAP2/3: DMA errata correction
        OMAP: Fix testing of cpu defines for mach-omap1
        OMAP3: Overo: add missing pen-down GPIO definition
        OMAP: GPIO: clear/restore level/edge detect settings on mask/unmask
        OMAP3: PM: Fix wrong sequence in suspend.
        OMAP: PM: CPUfreq: obey min/max settings of policy
        OMAP2/3/4: UART: allow in-order port traversal
        OMAP2/3/4: UART: Allow per-UART disabling wakeup for serial ports
        OMAP3: Fixed crash bug with serial + suspend
        ...
      0f66f96d
    • Atsushi Nemoto's avatar
      MIPS: Fix HPAGE_SIZE redefinition · 87c62a66
      Atsushi Nemoto authored
      This patch fixes warnings like this:
        CC      fs/proc/meminfo.o
      In file included from /work/linux/include/linux/mmzone.h:20,
                       from /work/linux/include/linux/gfp.h:4,
                       from /work/linux/include/linux/mm.h:8,
                       from /work/linux/fs/proc/meminfo.c:5:
      /work/linux/arch/mips/include/asm/page.h:36:1: warning: "HPAGE_SIZE" redefined
      In file included from /work/linux/fs/proc/meminfo.c:2:
      /work/linux/include/linux/hugetlb.h:107:1: warning: this is the location of the previous definition
      Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
      Acked-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
      Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      87c62a66
    • Ingo Molnar's avatar
      x86, mce: Don't initialize MCEs on unknown CPUs · e412cd25
      Ingo Molnar authored
      An older test-box started hanging at the following point during
      bootup:
      
       [    0.022996] Mount-cache hash table entries: 512
       [    0.024996] Initializing cgroup subsys debug
       [    0.025996] Initializing cgroup subsys cpuacct
       [    0.026995] Initializing cgroup subsys devices
       [    0.027995] Initializing cgroup subsys freezer
       [    0.028995] mce: CPU supports 5 MCE banks
      
      I've bisected it down to commit 4efc0670 ("x86, mce: use 64bit
      machine check code on 32bit"), which utilizes the MCE code on
      32-bit systems too.
      
      The problem is caused by this detail in my config:
      
        # CONFIG_CPU_SUP_INTEL is not set
      
      This disables the quirks in mce_cpu_quirks() but still enables
      MCE support - which then hangs due to the missing quirk
      workaround needed on this CPU:
      
      	if (c->x86 == 6 && c->x86_model < 0x1A && banks > 0)
      		mce_banks[0].init = 0;
      
      The safe solution is to not initialize MCEs if we dont know on
      what CPU we are running (or if that CPU's support code got
      disabled in the config).
      
      Also be a bit more defensive on 32-bit systems: dont do a
      boot-time dump of pending MCEs not just on the specific system
      that we found a problem with (Pentium-M), but earlier ones as
      well.
      
      Now this problem is probably not common and disabling CPU
      support is rare - but still being more defensive in something
      we turned on for a wide range of CPUs is prudent.
      
      Cc: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      LKML-Reference: Message-ID: <4A88E3E4.40506@jp.fujitsu.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      e412cd25