+. LOONGSON64 use 0x98xx_xxxx_xxxx_xxxx as xphys cached, instread of
0xa8xx_xxxx_xxxx_xxxx

+. let CONFIG_MIPS_PGD_C0_CONTEXT depend on 64bit

+. cast CAC_BASE into u64 to silence warning on MIPS32

CP0 Context has enough room for wraping pgd into its 41-bit PTEBase field.

+. For XPHYS, the trick is that pgd is 4kB aligned, and the PABITS <= 53,
only save 53 - 12 = 41 bits, aka :

   bit[63:59] | 0000 00 |  bit[53:12] | 0000 0000 0000

+. for CKSEG0, only save 29 - 12 = 17 bits

when switching pgd, only need to save bit[53:12] or bit[28:12] into
CP0 Context's bit[63:23], see folling asm generated at run time

tlbmiss_handler_setup_pgd:
	.set	push
	.set	noreorder

	dsra	a2, a0, 29
	move	a3, a0
	dins	a0, zero, 29, 35
	daddiu	a2, a2, 4	//for CKSEG0, a2 from 0xfffffffffffffffc
				//into 0

	movn	a0, a3, a2
	dsll	a0, a0, 11
	jr	ra
	dmtc0	a0, CP0_CONTEXT

	.set	pop

when using it on page walking

	dmfc0	k0, CP0_CONTEXT
	dins	k0, zero, 0, 23	         // zero badv2
	ori	k0, k0, (CAC_BASE >> 53) // *prefix* with bit[63:59]
	drotr	k0, k0, 11		 // kick it in the right place
Signed-off-by: Huang Pei <huangpei@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

The NT39016 panel is a fun beast, even though the documentation states
that the CS line is active-low, it will work just fine if the CS line is
configured as active-high, but it won't work if the CS line is forced
low or forced high.

Since it did actually work with the spi-cs-high property, this is not a
bugfix, but we should nonetheless remove that property to match the
documentation.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

The NT39016 panel is a fun beast, even though the documentation states
that the CS line is active-low, it will work just fine if the CS line is
configured as active-high, but it won't work if the CS line is forced
low or forced high.

Since it did actually work with the spi-cs-high property, this is not a
bugfix, but we should nonetheless remove that property from the example
to match the documentation.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Separated function was not improving code quality much (or at all).
Moreover it expected possible flash end address as argument and it was
returning NVRAM size.

The new code always operates on offsets which means less logic and less
calculations.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

This loop requires variable initialization, stop condition and post
iteration increment. It's pretty much a for loop definition.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

This simplifies function finding NVRAM. It doesn't directly deal with
NVRAM structure anymore and is a bit smaller.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

This avoids duplicating code doing casting and checking for NVRAM magic.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

1. Use "bcm47xx_" function name prefix for consistency
2. It takes flash start as argument so s/iobase/flash_start/
3. "off" was used for finding flash end so just call it "flash_size"
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Loongson64 allocates arrays of pglist_data statically and is located
at Node 0, and cpu from Nodes other than 0 need remote access to
pglist_data and zone info.

Delay pglist_data allocation till run time, and make it NUMA-aware
Signed-off-by: Huang Pei <huangpei@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

The purpose of separating loongson_system_configuration from boot_param.h
is to keep the other structure consistent with the firmware.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

We don't need them anymore, They are uniform on all Loongson64 systems
and have been fixed in DeviceTree.loongson3_platform_init is replaced
with DTS + driver.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Upstream a long-standing OpenWrt patch [0] that fixes MT7620 PCIe PLL
lock check. The existing code checks the wrong register bit: PPLL_SW_SET
is not defined in PPLL_CFG1 and bit 31 of PPLL_CFG1 is marked as reserved
in the MT7620 Programming Guide. The correct bit to check for PLL lock
is PPLL_LD (bit 23).

Also reword the error message for clarity.

Without this change it is unlikely that this driver ever worked with
mainline kernel.

[0]: https://lists.infradead.org/pipermail/lede-commits/2017-July/004441.htmlSigned-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Cc: John Crispin <john@phrozen.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Change /include/ with #include in order to be able to include header files
from dt-bindings.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

bpftrace is a high-level tracing language for Linux enhanced Berkeley
Packet Filter (eBPF) available in recent Linux kernels (4.x). bpftrace
uses LLVM as a backend to compile scripts to BPF-bytecode and makes use
of BCC for interacting with the Linux BPF system, as well as existing
Linux tracing capabilities: kernel dynamic tracing (kprobes), user-level
dynamic tracing (uprobes), and tracepoints.

According to Linux Kernel Requirements in bpftrace/INSTALL.md [1], the
kernel needs to be built with the following options:

CONFIG_BPF=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT=y
CONFIG_HAVE_EBPF_JIT=y
CONFIG_BPF_EVENTS=y
CONFIG_FTRACE_SYSCALLS=y
CONFIG_FUNCTION_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_DYNAMIC_FTRACE=y
CONFIG_HAVE_KPROBES=y
CONFIG_KPROBES=y
CONFIG_KPROBE_EVENTS=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_UPROBES=y
CONFIG_UPROBE_EVENTS=y
CONFIG_DEBUG_FS=y

So enable some missed configs in loongson3_defconfig to make sure
the above configs are set after make loongson3_defconfig.

[1] https://github.com/iovisor/bpftrace/blob/master/INSTALL.mdSigned-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

s/revelant/relevant/
Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Many architectures duplicate similar shell scripts.

This commit converts mips to use scripts/syscallhdr.sh.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Many architectures duplicate similar shell scripts.

This commit converts mips to use scripts/syscalltbl.sh. This also
unifies syscall_table_32_o32.h and syscall_table_64_o32.h into
syscall_table_o32.h.

The offset parameters are unneeded here; __SYSCALL(nr, entry) is defined
as 'PTR entry', so the parameter 'nr' is not used in the first place.

With this commit, syscall tables and generated files are straight
mapped,  which makes things easier to understand.

  syscall_n32.tbl  -->  syscall_table_n32.h
  syscall_n64.tbl  -->  syscall_table_n64.h
  syscall_o32.tbl  -->  syscall_table_o32.h

Then, the abi parameters are also unneeded.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

After removal of the guest part of KVM TE (trap and emulate), also remove
the host part.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

KVM_GUEST is broken and unmaintained, so let's remove it.
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

- fixes for boot breakage because of misaligned FDTs
- fix for overwritten exception handlers
- enable MIPS optimized crypto for all MIPS CPUs to improve wireguard
  performance

BMIPS is one of the few platforms that do change the exception base.
After commit 2dcb3964 ("memblock: do not start bottom-up allocations
with kernel_end") we started seeing BMIPS boards fail to boot with the
built-in FDT being corrupted.

Before the cited commit, early allocations would be in the [kernel_end,
RAM_END] range, but after commit they would be within [RAM_START +
PAGE_SIZE, RAM_END].

The custom exception base handler that is installed by
bmips_ebase_setup() done for BMIPS5000 CPUs ends-up trampling on the
memory region allocated by unflatten_and_copy_device_tree() thus
corrupting the FDT used by the kernel.

To fix this, we need to perform an early reservation of the custom
exception space. Additional we reserve the first 4k (1k for R3k) for
either normal exception vector space (legacy CPUs) or special vectors
like cache exceptions.

Huge thanks to Serge for analysing and proposing a solution to this
issue.

Fixes: 2dcb3964 ("memblock: do not start bottom-up allocations with kernel_end")
Reported-by: Kamal Dasu <kdasu.kdev@gmail.com>
Debugged-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Mike Rapoport <rppt@linux.ibm.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

The devicetree specification requires 8-byte alignment in
memory. This is now enforced by libfdt since commit 79edff12
("scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9")
which included the upstream commit 5e735860c478 ("libfdt: Check for
8-byte address alignment in fdt_ro_probe_()").

This broke the MIPS raw appended DTBs which would be appended to
the image immediately following the initramfs section.  This ends
with a 32bit size, resulting in a 4-byte alignment of the DTB.

Fix by padding with zeroes to 8-bytes when MIPS_RAW_APPENDED_DTB
is defined.

Fixes: 79edff12 ("scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9")
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

The MIPS Poly1305 implementation is generic MIPS code written such as to
support down to the original MIPS I and MIPS III ISA for the 32-bit and
64-bit variant respectively.  Lift the current limitation then to enable
code for MIPSr1 ISA or newer processors only and have it available for
all MIPS processors.
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Fixes: a11d055e ("crypto: mips/poly1305 - incorporate OpenSSL/CRYPTOGAMS optimized implementation")
Cc: stable@vger.kernel.org # v5.5+
Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Since 5.12-rc1, the Device Tree blob must now be properly aligned.

Therefore, the decompress routine must be careful to copy the blob at
the next aligned address after the kernel image.

This commit fixes the kernel sometimes not booting with a Device Tree
blob appended to it.

Fixes: 79edff12 ("scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9")
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

These are PCI based systems, so not enabling the support is rather
pointless.  Additionally the random configѕ generated by the build bot
for IP27 and IP30 builds without PCI fail to buіld.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Ensure this file has a prototype for phys_to_dma and dma_to_phys.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Ensure this file has a prototype for phys_to_dma and dma_to_phys.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Fix the following coccicheck warning:
./arch/mips/cavium-octeon/oct_ilm.c:65:0-23: WARNING:
reset_statistics_ops should be defined with DEFINE_DEBUGFS_ATTRIBUTE
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

MIPS doesn't have architecture-optimized bitsearching functions,
like find_{first,next}_bit() etc.
It's absolutely harmless to enable GENERIC_FIND_FIRST_BIT as this
functionality is not new at all and well-tested. It provides more
optimized code and saves some .text memory (32 R2):

add/remove: 4/1 grow/shrink: 1/53 up/down: 216/-372 (-156)

Users of for_each_set_bit() like hotpath gic_handle_shared_int()
will also benefit from this.
Suggested-by: Yury Norov <yury.norov@gmail.com>
Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Yury Norov <yury.norov@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

CPU_MIPS64 is supposed to be selected for CPUs that implement a revision
of the MIPS64 ISA. While it contains the generic ones, it forgot about
Octeon and Loongson in its list, which are indeed MIPS64 processors.
This commit adds these missing CPUs to the auto-selection list.

Cc: Maciej W. Rozycki <macro@orcam.me.uk>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: George Cherian <gcherian@marvell.com>
Cc: Huacai Chen <chenhuacai@kernel.org>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

This board is used in Ubiquiti EdgeRouter 4.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

When booting bmips with SMP enabled on a BCM6358 running on CPU #1 instead of
CPU #0, the current CPU mapping code produces the following:
- smp_processor_id(): 0
- cpu_logical_map(0): 1
- cpu_number_map(0): 1

This is because SMP isn't supported on BCM6358 since it has a shared TLB, so
it is disabled and max_cpus is decreased from 2 to 1.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

This is a Copyright line, and just a typo slipped through.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>