1. 12 Oct, 2005 5 commits
    • David S. Miller's avatar
      [SPARC64]: Fix boot failures on SunBlade-150 · c9c10830
      David S. Miller authored
      The sequence to move over to the Linux trap tables from
      the firmware ones needs to be more air tight.  It turns
      out that to be %100 safe we do need to be able to translate
      OBP mappings in our TLB miss handlers early.
      
      In order not to eat up a lot of kernel image memory with
      static page tables, just use the translations array in
      the OBP TLB miss handlers.  That solves the bulk of the
      problem.
      
      Furthermore, to make sure the OBP TLB miss path will work
      even before the fixed MMU globals are loaded, explicitly
      load %g1 to TLB_SFSR at the beginning of the i-TLB and
      d-TLB miss handlers.
      
      To ease the OBP TLB miss walking of the prom_trans[] array,
      we sort it then delete all of the non-OBP entries in there
      (for example, there are entries for the kernel image itself
      which we're not interested in at all).
      
      We also save about 32K of kernel image size with this change.
      Not a bad side effect :-)
      
      There are still some reasons why trampoline.S can't use the
      setup_trap_table() yet.  The most noteworthy are:
      
      1) OBP boots secondary processors with non-bias'd stack for
         some reason.  This is easily fixed by using a small bootup
         stack in the kernel image explicitly for this purpose.
      
      2) Doing a firmware call via the normal C call prom_set_trap_table()
         goes through the whole OBP enter/exit sequence that saves and
         restores OBP and Linux kernel state in the MMUs.  This path
         unfortunately does a "flush %g6" while loading up the OBP locked
         TLB entries for the firmware call.
      
         If we setup the %g6 in the trampoline.S code properly, that
         is in the PAGE_OFFSET linear mapping, but we're not on the
         kernel trap table yet so those addresses won't translate properly.
      
         One idea is to do a by-hand firmware call like we do in the
         early bootup code and elsewhere here in trampoline.S  But this
         fails as well, as aparently the secondary processors are not
         booted with OBP's special locked TLB entries loaded.  These
         are necessary for the firwmare to processes TLB misses correctly
         up until the point where we take over the trap table.
      
      This does need to be resolved at some point.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c9c10830
    • Benjamin Herrenschmidt's avatar
      [PATCH] ppc32: Tell userland about lack of standard TB · d8e998c5
      Benjamin Herrenschmidt authored
      Glibc is about to get some new high precision timer stuff that relies on
      the standard timebase of the PPC architecture.
      
      However, some (rare & old) CPUs do not have such timebase and it is a
      bit annoying to have your stuff just crash because you are running on
      the wrong CPU...
      
      This exposes to userland a CPU feature bit that tells that the current
      processor doesn't have a standard timebase.  It's negative logic so that
      glibc will still "just work" on older kernels (it will just be unhappy
      on those old CPUs but that doesn't really matter as distro tend to
      update glibc & kernel at the same time).
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      d8e998c5
    • Benjamin Herrenschmidt's avatar
      [PATCH] ppc32: Fix timekeeping · cbd27b8c
      Benjamin Herrenschmidt authored
      Interestingly enough, ppc32 had broken timekeeping for ages...  It
      worked, but probably drifted a bit more than could be explained by the
      actual bad precision of the timebase calibration.  We discovered that
      recently when somebody figured out that the common code was using
      CLOCK_TICK_RATE to correct the timekeeing, and ppc32 had a completely
      bogus value for it.
      
      This patch turns it into something saner.  Probably not as good as doing
      something based on the actual timebase frequency precision but I'll
      leave that sort of math to others.  This at least makes it better for
      the common HZ values.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      cbd27b8c
    • Paolo 'Blaisorblade' Giarrusso's avatar
      [PATCH] uml: compile-time fix recent patch · 9d624ea4
      Paolo 'Blaisorblade' Giarrusso authored
      Give an empty definition for clear_can_do_skas() when it is not needed.
      Thanks to Junichi Uekawa <dancer@netfort.gr.jp> for reporting the
      breakage and providing a fix (I re-fixed it in an IMHO cleaner way).
      Signed-off-by: default avatarPaolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      9d624ea4
    • Jeff Dike's avatar
      [PATCH] uml: revert block driver use of host AIO · 91acb21f
      Jeff Dike authored
      The patch to use host AIO support that I submitted early after 2.6.13 exposed
      some problems in the block driver.  I have fixes for these, but am not
      comfortable putting them into 2.6.14 at this late date.  So, this patch reverts
      the use of host AIO.
      
      I will resubmit the original patch, plus fixes to the driver after 2.6.14
      in order to get a reasonable amount of testing before they're exposed to
      the general public.
      Signed-off-by: default avatarJeff Dike <jdike@addtoit.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      91acb21f
  2. 11 Oct, 2005 17 commits
  3. 10 Oct, 2005 18 commits