- 11 Dec, 2008 1 commit
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Stefan Roese authored
With this patch the L2 cache is enabled on Canyonlands to increase the overall performance. There is a known cache coherency issue with the L2 cache, but this is related to the high bandwidth (HB) PLB segment where the memory address is 0x8.xxxx.xxxx (low bandwidth PLB segment is mapped to 0x0.xxxx.xxxx). Since this HB address is currently unused it is safe to enable the L2 cache. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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- 04 Dec, 2008 3 commits
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Benjamin Herrenschmidt authored
This adds support for ISA memory holes on the PCI, PCI-X and PCI-E busses of the 4xx platforms. The patch includes changes to the Bamboo and Canyonlands device-trees to add such a hole, others can be updated separately. The ISA memory hole is an additional outbound window configured in the bridge to generate PCI cycles in the low memory addresses, thus allowing to access things such as the hard-decoded VGA aperture at 0xa0000..0xbffff or other similar things. It's made accessible to userspace via the new legacy_mem file in sysfs for which support was added by a previous patch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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Stephen Rothwell authored
This removes CONFIG_PCI_LEGACY (which is not needed) and consequently several compiler warnings. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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Hollis Blanchard authored
KVM host support was recently enabled in ppc44x_defconfig, but since then the config option was renamed. Update ppc44x_defconfig to match. Also, KVM guests aren't very interesting without networking, so enable CONFIG_TUN and CONFIG_BRIDGE. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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- 03 Dec, 2008 34 commits
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Haiying Wang authored
This patch creates the dts files for each core and splits the devices between the two cores for MPC8572DS. core0 has memory, L2, i2c, dma1, global-util, eth0, eth1, crypto, pci0, pci1. core1 has L2, dma2, eth2, eth3, pci2, msi. MPIC is shared between two cores but each core will protect its interrupts from other core by using "protected-sources" of mpic. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Haiying Wang authored
The flag MPIC_WANTS_RESET shouldn't be set if we are doing cooperative asymmetric MP. The second linux shouldn't reset the pic or the first one gets very confused. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Haiying Wang authored
Also add NOR and NAND flash partitions for mpc8572ds board Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Martyn Welch authored
Basic support for the GPIO available on the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This patch adds basic support for the GPIO in the devices I/O FPGA, the GPIO functionality is exposed through the AFIX pins on the backplane, unless used by an AFIX card. This code currently does not support switching between totem-pole and open-drain outputs (when used as outputs, GPIOs default to totem-pole). The interrupt capabilites of the GPIO lines is also not currently supported. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Anton Vorontsov authored
With this patch we can compile the qe_lib/usb.c without the UCC support (that is, without UCC_GETH and/or SERIAL_QE). Fixes following link error (CONFIG_SMP should be =y to trigger this): arch/powerpc/sysdev/built-in.o: In function `qe_usb_clock_set': (.text+0x3cae): undefined reference to `cmxgcr_lock' make: *** [.tmp_vmlinux1] Error 1 While at it, also add missing spinlock.h includes. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-By: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Martyn Welch authored
Adding use of newly added Epson RTX-8581 real-time clock driver to GE Fanuc SBC610's dts file and adding driver to default config. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
arch/powerpc/platforms/85xx/mpc85xx_mds.c: In function 'board_fixups': arch/powerpc/platforms/85xx/mpc85xx_mds.c:244: warning: format '%x' expects type 'unsigned int', but argument 4 has type 'resource_size_t' arch/powerpc/platforms/85xx/mpc85xx_mds.c:250: warning: format '%x' expects type 'unsigned int', but argument 4 has type 'resource_size_t' Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Added 85xx specifc smp_ops structure. We use ePAPR style boot release and the MPIC for IPIs at this point. Additionally added routines for secondary cpu entry and initializtion. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Trent Piepho <tpiepho@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Removed unused branch labels Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Trent Piepho authored
The initial TLB mapping for the kernel boot didn't set the memory coherent attribute, MAS2[M], in SMP mode. If this code supported booting a secondary processor, which it doesn't yet, but if it did, then when a secondary processor boots, it would probably signal the primary processor by setting a variable called something like __secondary_hold_acknowledge. However, due to the lack of the M bit, the primary processor would not snoop the transaction (even if a transaction were broadcast). If primary CPU's L1 D-cache had a copy, it would not be flushed and the CPU would never see the ack. Which would have resulted in the primary CPU spinning for a long time, perhaps a full second before it gives up, while it would have waited for the ack from the secondary CPU that it wouldn't have been able to see because of the stale cache. The value of MAS2 for the boot page TLB1 entry is a compile time constant, so there is no need to calculate it in powerpc assembly language. Also, from the MPC8572 manual section 6.12.5.3, "Bits that represent offsets within a page are ignored and should be cleared." Existing code didn't clear them, this code does. The same when the page of KERNELBASE is found; we don't need to use asm to mask the lower 12 bits off. In the code that computes the address to rfi from, don't hard code the offset to 24 bytes, but have the assembler figure that out for us. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Liu Yu authored
This patch add the handlers of SPE/EFP exceptions. The code is used to emulate float point arithmetic, when MSR(SPE) is enabled and receive EFP data interrupt or EFP round interrupt. This patch has no conflict with or dependence on FP math-emu. The code has been tested by TestFloat. Now the code doesn't support SPE/EFP instructions emulation (it won't be called when receive program interrupt), but it could be easily added. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Liu Yu authored
FP_DECL_EX is already used, so ret is redundant. And FP_SET_EXCEPTION will add status into return value. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Liu Yu authored
Move to using the same macro definition for _FP_CHOOSENAN as s390, sh, sparc32/64. The original author didn't understand this and matched what sparc64 was doing and they have updated to this definition. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Liu Yu authored
PowerPC float point division emulation is derived from gcc. I reported this problem on gcc maillist and got this reply: http://gcc.gnu.org/ml/gcc/2008-03/msg00543.html Since UDIV_NEEDS_NORMALIZATION is not used by kernel, we should use _FP_DIV_MEAT_1_udiv_norm to make sure the single float point is normalized before udiv_qrnnd. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
After testing of various compiler flag combinations by Nate Case it was determined that -mabi=no-spe has no impact on the compiler generating SPE instructions. Only -mno-spe and -mspe=no do. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Hendrik Brueckner authored
The test to check for a new winsize runs out-of-sync with the underlying tty. After a tty has been released and initialized again, the winsize might differ between the tty and the hp struct. The solution is to simply remove the check and always schedule the resize work. Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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roel kluin authored
Otherwise the tests for count < 0 will never be true. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Nicolas Palix authored
of_node_put is needed before discarding a value received from of_find_node_by_name, e.g., in error handling code or when the device node is no longer used. The semantic match that catches the bug is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @r exists@ local idexpression struct device_node *n; position p1, p2; statement S1,S2; expression E,E1; expression *ptr != NULL; @@ ( if (!(n@p1 = of_find_node_by_name(...))) S1 | n@p1 = of_find_node_by_name(...) ) <... when != of_node_put(n) when != if (...) { <+... of_node_put(n) ...+> } when != true !n || ... when != n = E when != E = n if (!n || ...) S2 ...> ( return \(0\|<+...n...+>\|ptr\); | return@p2 ...; | n = E1 | E1 = n ) @script:python@ p1 << r.p1; p2 << r.p2; @@ print "* file: %s of_find_node_by_name %s return %s" % (p1[0].file,p1[0].line,p2[0].line) // </smpl> Signed-off-by: Nicolas Palix <npalix@diku.dk> Signed-off-by: Julia Lawall <julia@diku.dk> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Anton Vorontsov authored
This adds a new function, of_get_gpio_flags, which is like of_get_gpio(), but accepts a new "flags" argument. This new function will be used by the drivers that need to retrieve additional GPIO information, such as active-low flag. Also, this changes the default ("simple") .xlate routine to warn about bogus (< 2) #gpio-cells usage: the second cell should always be present for GPIO flags. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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roel kluin authored
i2c_smbus_read_word_data() returns a s32, which may be negative but unsigned len cannot be negative. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Anton Vorontsov authored
For I2C devices we just setting the node pointer in the archdata. This is needed so that the I2C devices could find their OF tree nodes. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Anton Vorontsov authored
The name of the device_node field differ across the platforms, so we have to implement inlined accessors. This is needed to avoid ugly #ifdef in the generic code. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Sonny Rao authored
This adds support for multiple BSR nodes in the OF device tree. Previously, the BSR driver only supported a single OF node describing a BSR. Apparently when an LPAR is set to use "all system resources" the BSR appears as a single node, but when it is handed out in pieces, each 8 byte piece gets its own node. So, this keeps a list of BSR devices instead of the array and includes all nodes. Also, this makes the code be more inclusive of what BSR devices we accept by only checking compatibility and not the device name property (which might change in the future versions of BSR). Signed-off-by: Sonny Rao <sonnyrao@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Sebastien Dugue authored
ibmebus_free_irq() frees the IRQ but does not remove its mapping, which results in stale entries in the map. This fixes it by adding a call to irq_dispose_mapping() in ibmebus_free_irq(). Signed-off-by: Sebastien Dugue <sebastien.dugue@bull.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Julia Lawall authored
As noted by Akinobu Mita in commit b1fceac2 ("x86: remove unnecessary memset and NULL check after alloc_bootmem()"), alloc_bootmem and related functions never return NULL and always return a zeroed region of memory. Thus a NULL test or memset after calls to these functions is unnecessary. This was fixed using the following semantic patch. (http://www.emn.fr/x-info/coccinelle/) // <smpl> @@ expression E; statement S; @@ E = \(alloc_bootmem\|alloc_bootmem_low\|alloc_bootmem_pages\|alloc_bootmem_low_pages\|alloc_bootmem_node\|alloc_bootmem_low_pages_node\|alloc_bootmem_pages_node\)(...) ... when != E ( - BUG_ON (E == NULL); | - if (E == NULL) S ) @@ expression E,E1; @@ E = \(alloc_bootmem\|alloc_bootmem_low\|alloc_bootmem_pages\|alloc_bootmem_low_pages\|alloc_bootmem_node\|alloc_bootmem_low_pages_node\|alloc_bootmem_pages_node\)(...) ... when != E - memset(E,0,E1); // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Becky Bruce authored
We need to swap these out once we start using swiotlb, so add them to dma_ops. Create CONFIG_PPC_NEED_DMA_SYNC_OPS Kconfig option; this is currently enabled automatically if we're CONFIG_NOT_COHERENT_CACHE. In the future, this will also be enabled for builds that need swiotlb. If PPC_NEED_DMA_SYNC_OPS is not defined, the dma_sync_*_for_* ops compile to nothing. Otherwise, they access the dma_ops pointers for the sync ops. This patch also changes dma_sync_single_range_* to actually sync the range - previously it was using a generous dma_sync_single. dma_sync_single_* is now implemented as a dma_sync_single_range with an offset of 0. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Johannes Berg authored
On my screen, when something crashes, I only have space for maybe 16 functions of the stack trace before the information above it scrolls off the screen. It's easy to hack the kernel to print out only that much, but it's harder to remember to do it. This introduces a config option for it so that I can keep the setting in my config. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Kumar Gala authored
Refactor the RCU based pte free code that was used on ppc64 to be used on all powerpc. Additionally refactor pte_free() & pte_free_kernel() into common code between ppc32 & ppc64. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Kumar Gala authored
The tlb invalidates in kmap_atomic/kunmap_atomic can be called from IRQ context, however they are only local invalidates (on the processor that the kmap was called on). In the future we want to use IPIs to do tlb invalidates this causes issue since flush_tlb_page() is considered a broadcast invalidate. Add local_flush_tlb_page() as a non-broadcast invalidate and use it in kmap_atomic() since we don't have enough information in the flush_tlb_page() call to determine its local. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Kumar Gala authored
Clean up the ifdefs so we only use hash_page_sync if we have CONFIG_SMP && CONFIG_PPC_STD_MMU_32. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Benjamin Herrenschmidt authored
The 32-bit hash code didn't need it so far so we don't update mm->cpu_vm_mask on context switch. This however will break when we merge the RCU based page table freeing patch and other upcoming 32-bit embedded SMP work, so this adds the update. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Kumar Gala authored
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Paul Mackerras authored
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Benjamin Herrenschmidt authored
On PowerPC 4xx or other non cache-coherent platforms, we lost the appropriate cache flushing in dma_map_sg() when merging the 32 and 64-bit DMA code (commit 4fc665b8, "powerpc: Merge 32 and 64-bit dma code"). This restores it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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- 02 Dec, 2008 2 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdogLinus Torvalds authored
* git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog: [WATCHDOG] hpwdt: Fix kdump when using hpwdt [WATCHDOG] hpwdt: set the mapped BIOS address space as executable [WATCHDOG] iTCO_wdt: add PCI ID's for ICH9 & ICH10 chipsets [WATCHDOG] iTCO_wdt : correct status clearing [WATCHDOG] iTCO_wdt : problem with rebooting on new ICH9 based motherboards [WATCHDOG] fix mtx1_wdt compilation failure
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git://git.infradead.org/ubifs-2.6Linus Torvalds authored
* 'linux-next' of git://git.infradead.org/ubifs-2.6: UBIFS: pre-allocate bulk-read buffer UBIFS: do not allocate too much UBIFS: do not print scary memory allocation warnings UBIFS: allow for gaps when dirtying the LPT UBIFS: fix compilation warnings MAINTAINERS: change UBI/UBIFS git tree URLs UBIFS: endian handling fixes and annotations UBIFS: remove printk
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