- 18 Sep, 2020 15 commits
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Swapnil Jakhade authored
Add support to configure link_cmn_vals and xcvr_diag_vals in case of single link PHY configuration. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600327846-9733-9-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Prepare and enable clock in probe instead of phy_init. Also, remove phy_exit callback. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600327846-9733-8-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
For multilink configuration, deassert PHY and link reset after PHY registers are configured in probe and only check link status in power_on callback. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600327846-9733-7-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Added support for multilink configuration of Torrent PHY. Currently, maximum two links are supported. In case of multilink configuration, PHY needs to be configured for both the protocols simultaneously at the beginning as per the requirement of Torrent PHY. Also, register sequences for PCIe + SGMII/QSGMII Unique SSC PHY multilink configurations are added. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600327846-9733-6-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Add definition for QSGMII phy type. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1600327846-9733-5-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Add support for PHY APB reset and make it optional. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600327846-9733-4-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Check if cmn_ready is set after both PLL0 and PLL1 are locked. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600327846-9733-3-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Add single link PCIe register sequences in Torrent PHY driver. Also, add support for getting SSC type from DT. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600327846-9733-2-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Torrent PHY can be used in different multi-link multi-protocol configurations including protocols other than DisplayPort also, such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have support for these configurations. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600280911-9214-8-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Add binding to specify Spread Spectrum Clocking mode used. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1600280911-9214-7-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Add checking if total number of lanes for all subnodes is not greater than number of lanes supported by PHY. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600280911-9214-6-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Added separate functions for regmap initialization of torrent PHY generic registers and DP specific registers. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600280911-9214-5-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Enable support for multiple subnodes in torrent PHY to include multi-link combinations. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600280911-9214-4-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Use devm_platform_ioremap_resource() to get register addresses instead of boilerplate code. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600280911-9214-3-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Use of_device_get_match_data() to get driver data instead of boilerplate code. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1600280911-9214-2-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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- 16 Sep, 2020 9 commits
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Wan Ahmad Zainie authored
Add support for eMMC PHY on Intel Keem Bay SoC. Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200913235522.4316-4-wan.ahmad.zainie.wan.mohamad@intel.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Wan Ahmad Zainie authored
Binding description for Intel Keem Bay eMMC PHY. Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200913235522.4316-3-wan.ahmad.zainie.wan.mohamad@intel.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Wan Ahmad Zainie authored
Rename phy-intel-{combo,emmc}.c to phy-intel-lgm-{combo,emmc}.c to make drivers/phy/intel directory more generic for future use. Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> Reviewed-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Link: https://lore.kernel.org/r/20200913235522.4316-2-wan.ahmad.zainie.wan.mohamad@intel.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Rikard Falkeborn authored
The regmap_config structs are never modified and can be made const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200912204639.501669-4-rikard.falkeborn@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Rikard Falkeborn authored
cdns_nxp_sequence_pair[] are never modified and can be made const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Reviewed-by: Peter Chen <peter.chen@nxp.com> Link: https://lore.kernel.org/r/20200912204639.501669-3-rikard.falkeborn@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Rikard Falkeborn authored
The static cdns_reg_pairs and regmap_config structs are not modified and can be made const. This allows the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200912204639.501669-2-rikard.falkeborn@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Vinod Koul authored
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Swapnil Jakhade authored
Set Torrent PHY attributes bus_width, max_link_rate and mode for DisplayPort. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/1599805114-22063-3-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Swapnil Jakhade authored
Add new PHY attribute max_link_rate to struct phy_attrs. This indicates maximum link rate supported by PHY (in Mbps). Signed-off-by: Yuti Amonkar <yamonkar@cadence.com> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/1599805114-22063-2-git-send-email-sjakhade@cadence.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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- 11 Sep, 2020 2 commits
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Ramuthevar Vadivel Murugan authored
Add support for USB PHY on Intel LGM SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Ramuthevar Vadivel Murugan authored
Add the dt-schema to support USB PHY on Intel LGM SoC Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200828022312.52724-2-vadivel.muruganx.ramuthevar@linux.intel.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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- 08 Sep, 2020 10 commits
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Roger Quadros authored
Move ti,omap-usb2 to its own YAML schema. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200831142130.21836-1-rogerq@ti.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Grygorii Strashko authored
On K3 AM654x/J721E platforms the Port MII mode selection register(s) have similar format and placed in the System Control Module (SCM) module sequentially as one register per port, but, depending SOC and CPSW instance, the base offset and number of ports can be different. Hence, add possibility to retrieve number of ports and base registers offset from DT and support for max possible number of ports supported by K3 SoCs like J721E. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-4-grygorii.strashko@ti.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Grygorii Strashko authored
Use features mask during PHYs initialization to simplify code. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-3-grygorii.strashko@ti.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Grygorii Strashko authored
Move phy initialization in separate function to improve code readability and simplify future changes. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-2-grygorii.strashko@ti.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Chunfeng Yun authored
Use readl_poll_timeout() to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1598320987-25518-6-git-send-email-chunfeng.yun@mediatek.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Chunfeng Yun authored
Use readl_poll_timeout() to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1598320987-25518-5-git-send-email-chunfeng.yun@mediatek.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Chunfeng Yun authored
Use readl_relaxed_poll_timeout() to simplify code, rename local function read_poll_timeout() as poll_timeout() to avoid repeated definition Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1598320987-25518-4-git-send-email-chunfeng.yun@mediatek.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Chunfeng Yun authored
Use readl_poll_timeout_atomic() to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1598320987-25518-3-git-send-email-chunfeng.yun@mediatek.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Chunfeng Yun authored
Use readl_poll_timeout_atomic() to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1598320987-25518-2-git-send-email-chunfeng.yun@mediatek.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Chunfeng Yun authored
Use readl_poll_timeout_atomic() to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1598320987-25518-1-git-send-email-chunfeng.yun@mediatek.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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- 31 Aug, 2020 4 commits
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Ezequiel Garcia authored
There is no need for this driver to be in staging. Let's promote it! Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Link: https://lore.kernel.org/r/20200825220710.634106-1-ezequiel@collabora.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Kunihiko Hayashi authored
Add a driver for PHY interface built into ahci controller implemented in UniPhier SoCs. This supports PXs2 and PXs3 SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1598352071-26675-3-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Kunihiko Hayashi authored
Add DT bindings for PHY interface built into ahci controller implemented in UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1598352071-26675-2-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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Rikard Falkeborn authored
Their only usages is to assign the address to the data field in the of_device_id struct, which is a const void pointer. Make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200823220025.17588-9-rikard.falkeborn@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>
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