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- 05 Oct, 2021 1 commit
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Lucas Stach authored
Add the DT node for the GPC, including all the PGC power domains, some of them are not fully functional yet, as they require interaction with the blk-ctrls to properly power up/down the peripherals. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 14 Aug, 2021 3 commits
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Peng Fan authored
i.MX8M use PPI for pmu, interrupt-affinity is not needed. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
i.MX8MM features four Cortex-A53 cores, update the compatible to use more accurate "arm,cortex-a53-pmu" Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Marek Vasut authored
The fsl,usbphy DT property is deprecated, replace it with phys DT property and specify #phy-cells. No functional change. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> To: linux-arm-kernel@lists.infradead.org Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 28 Jul, 2021 1 commit
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Joakim Zhang authored
Add "fsl,imx8mq-fec" compatible string for FEC to support new feature (IEEE 802.3az EEE standard). Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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- 12 Jun, 2021 2 commits
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Lucas Stach authored
DMA addressing capabilities on i.MX8MM are limited by the interconnect, same as on i.MX8MQ. Add dma-ranges to the the peripheral bus to let the kernel know about this. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
The i.MX8MM reference manual shows there are two spba busses. SPBA1 handles much of the serial interfaces, and SPBA2 covers much of the audio. Add both of them. Signed-off-by:
Adam Ford <aford173@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 29 Mar, 2021 1 commit
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Kuldeep Singh authored
Reorder flexspi clock-names entry to make it compliant with bindings. Signed-off-by:
Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 18 Jan, 2021 3 commits
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Joakim Zhang authored
Add fsl,stop-mode property for FEC to enable stop mode. Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Joakim Zhang authored
Add mac address in efuse, so that FEC driver can parse it from nvmem cell. Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Joakim Zhang authored
CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to CLK_ENET_PHY_REF clock. Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 11 Jan, 2021 2 commits
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Alice Guo authored
In order to be able to use NVMEM APIs to read soc unique ID, add the nvmem data cell and name for nvmem-cells to the "soc" node, and add a nvmem node which provides soc unique ID to efuse@30350000. Reviewed-by:
Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
Alice Guo <alice.guo@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Alice Guo authored
Add compatible string to .dtsi files for binding of imx8_soc_info and device. Reviewed-by:
Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
Alice Guo <alice.guo@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 10 Nov, 2020 1 commit
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Lucas Stach authored
The datasheet for both the industrial and consumer variant of the SoC lists a typical voltage of 0.95V for the 1.6GHz CPU operating point. Fixes: e85c9d0f (arm64: dts: imx8mm: Add cpufreq properties) Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 31 Oct, 2020 2 commits
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Adam Ford authored
The i.MX8M Mini can support SPDIF which is compatible to the IP used on the i.MX35. Add the node. Signed-off-by:
Adam Ford <aford173@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
The i.MX8M Mini has supports the MICFIL digital interface. It's a 16-bit audio signal from a PDM microphone bitstream. The driver is already in the kernel, but the node is missing. This patch adds the micfil node. Signed-off-by:
Adam Ford <aford173@gmail.com> Reviewed-by:
Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 30 Oct, 2020 1 commit
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Krzysztof Kozlowski authored
i.MX 8M Mini has four Cortex-A CPUs, not six. Using higher value is harmless but adjust it to match real HW. Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by:
Jacky Bai <ping.bai@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 23 Aug, 2020 1 commit
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Fabio Estevam authored
The i.MX8M SoCs have a fourth ENET interrupt dedicated to PPS (Pulse Per Second). Add support for it. Suggested-by:
Rogerio Nunes <rogerio.nunes@nxp.com> Signed-off-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Fugang Duan <fugang.duan@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 23 Jun, 2020 2 commits
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Peng Fan authored
Add mu node to let A53 could communicate with M Core. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Reviewed-by:
Fugang Duan <fugang.duan@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 18 Jun, 2020 1 commit
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Peng Fan authored
Sort the aliases alphabetically. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 20 May, 2020 1 commit
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Peng Fan authored
Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what is done in drivers/clk/imx/clk-imx8m*.c, then we could remove the settings in driver which triggers lockdep warning. Reported-by:
Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by:
Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by:
Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 29 Apr, 2020 1 commit
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Matt Porter authored
Add #sound-dai-cells properties to SAI nodes. Signed-off-by:
Matt Porter <mporter@konsulko.com> Reviewed-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 25 Apr, 2020 1 commit
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Fabio Estevam authored
Commit dc3efc6f ("arm64: dts: imx8m: fix aips dts node") caused several dtc warnings like these when building with W=1: arch/arm64/boot/dts/freescale/imx8mm.dtsi:265.23-542.5: Warning (simple_bus_reg): /soc@0/bus@30000000: simple-bus unit address format error, expected "301f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:544.23-602.5: Warning (simple_bus_reg): /soc@0/bus@30400000: simple-bus unit address format error, expected "305f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:604.23-862.5: Warning (simple_bus_reg): /soc@0/bus@30800000: simple-bus unit address format error, expected "309f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:864.23-909.5: Warning (simple_bus_reg): /soc@0/bus@32c00000: simple-bus unit address format error, expected "32df0000" Fix them by using the correct address base and size in the AIPS reg properties. Fixes: dc3efc6f ("arm64: dts: imx8m: fix aips dts node") Signed-off-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 16 Mar, 2020 1 commit
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Peng Fan authored
Per binding doc fsl,aips-bus.yaml, compatible and reg is required. And for reg, the AIPS configuration space should be used, not all the AIPS bus space. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 12 Mar, 2020 1 commit
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Anson Huang authored
Add thermal zone and tmu node to support i.MX8MM thermal driver, ONLY cpu thermal zone is supported, and cpu cooling is also added. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 11 Mar, 2020 2 commits
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Adam Ford authored
Pull in downstream patch from NXP repository to enable fspi device. Signed-off-by:
Han Xu <han.xu@nxp.com> Signed-off-by:
Adam Ford <aford173@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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André Draszik authored
On i.MX8MM, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844e ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by:
André Draszik <git@andred.net> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 14 Feb, 2020 1 commit
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Peng Fan authored
There is interrupt-parent = <&gic> in root node, there is no need set it again in node ddr-pmu@3d800000. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 09 Jan, 2020 1 commit
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Anson Huang authored
Memory address/size depends on board design, so memory node should be in board DT. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Reviewed-by:
Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 23 Dec, 2019 3 commits
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Adam Ford authored
The i.MX8M Mini supports the same crypto engine as what is in the i.MX8MQ, but it is not currently present in the device tree. This patch places it into the device tree. Signed-off-by:
Adam Ford <aford173@gmail.com> Reviewed-by:
Horia Geantă <horia.geanta@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error. This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the timeout error. Fixes: a05ea40e ("arm64: dts: imx: Add i.mx8mm dtsi support") Signed-off-by:
Adam Ford <aford173@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
There is no binding doc for these compatible string "fsl,imx8mq-aips-bus" and "fsl,aips-bus", "simple-bus" is enough for aips usage, so drop the upper two. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 09 Dec, 2019 2 commits
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Leonard Crestez authored
This is used by the imx-ddrc devfreq driver to implement dynamic frequency scaling of DRAM. Support for proactive scaling via interconnect will come later. The high-performance bus masters which need that (display, vpu, gpu) are mostly not yet enabled in upstream anyway. Signed-off-by:
Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Fancy Fang authored
Remove "simple-bus" compatible for device anatop, since no child nodes exist under it and it is not a populated bus. Signed-off-by:
Fancy Fang <chen.fang@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 04 Nov, 2019 1 commit
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Anson Huang authored
Machine compatible string normally is located in board DT, remove the duplicated one from SoC dtsi. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Reviewed-by:
Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 28 Oct, 2019 3 commits
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Anson Huang authored
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Reviewed-by:
Abel Vesa <abel.vesa@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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S.j. Wang authored
Assign clocks and clock-rates for audio plls, that audio drivers can utilize them. Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524, that sai driver can generate correct bit clock. Fixes: 13f3b9fd ("arm64: dts: imx8mm-evk: Enable audio codec wm8524") Signed-off-by:
Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by:
Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Shengjiu Wang authored
SDMA in i.MX8MM should use same configuration as i.MX8MQ So need to change compatible string to be "fsl,imx8mq-sdma". Fixes: a05ea40e ("arm64: dts: imx: Add i.mx8mm dtsi support") Signed-off-by:
Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 14 Oct, 2019 1 commit
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Anson Huang authored
On i.MX8MM, usdhc's ipg clock is from IMX8MM_CLK_IPG_ROOT, assign it explicitly instead of using IMX8MM_CLK_DUMMY. Fixes: a05ea40e ("arm64: dts: imx: Add i.mx8mm dtsi support") Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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