- 25 Apr, 2022 5 commits
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Luca Ceresoli authored
The hardware (except for the ROCKCHIP_SPI_VER2_TYPE2 version) does not support active-high native chip selects. However if such a CS is configured the core does not error as it normally should, because the 'ctlr->use_gpio_descriptors = true' line in rockchip_spi_probe() makes the core set SPI_CS_HIGH in ctlr->mode_bits. In such a case the spi-rockchip driver operates normally but produces an active-low chip select signal without notice. There is no provision in the current core code to handle this situation. Fix by adding a check in the ctlr->setup function (similarly to what spi-atmel.c does). This cannot be done reading the SPI_CS_HIGH but in ctlr->mode_bits because that bit gets always set by the core for master mode (see above). Fixes: eb1262e3 ("spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods") Signed-off-by:
Luca Ceresoli <luca.ceresoli@bootlin.com> Link: https://lore.kernel.org/r/20220421213251.1077899-1-luca.ceresoli@bootlin.comSigned-off-by:
Mark Brown <broonie@kernel.org>
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Minghao Chi authored
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by:
Zeal Robot <zealci@zte.com.cn> Signed-off-by:
Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220414085433.2541670-1-chi.minghao@zte.com.cnSigned-off-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by:
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- 22 Apr, 2022 1 commit
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Zheng Yongjun authored
If the device is already in a runtime PM enabled state pm_runtime_get_sync() will return 1, so a test for negative value should be used to check for errors. Fixes: deba2580 ("spi: Add driver for IMG SPFI controller") Signed-off-by:
Zheng Yongjun <zhengyongjun3@huawei.com> Link: https://lore.kernel.org/r/20220422062641.10486-1-zhengyongjun3@huawei.comSigned-off-by:
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- 20 Apr, 2022 2 commits
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Mika Westerberg authored
Currently the driver goes over the supported opcodes list each time ->exec_op() is called and finds the suitable for the given operation. This consumes unnecessary amount of CPU cycles because the operation is always the same. For this reason populate dirmap hooks for the driver so that we cache the selected operation and then simply call it on each read/write. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20220420104350.19510-1-mika.westerberg@linux.intel.comSigned-off-by:
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Mark Brown authored
Merge series from AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>: This series performs some cleanups to the spi-mt65xx driver, removing all gotos, simplifying the probe function and adding kerneldoc to the driver structures.
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- 19 Apr, 2022 17 commits
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AngeloGioacchino Del Regno authored
Some definitions at the beginning of this file were wrongly indented: fix the indentation for all of these and, while at it, also move the MTK_SPI_IDLE and MTK_SPI_PAUSED down, as to implicitly group the hardware related definitions to the software (driver) related ones. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220407114428.167091-9-angelogioacchino.delregno@collabora.comSigned-off-by:
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AngeloGioacchino Del Regno authored
One of the two structures was already partially documented, but not in kerneldoc format: enhance readability by adding the missing documentation bits and use kerneldoc. Signed-off-by:
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AngeloGioacchino Del Regno authored
Switch to dev_err_probe() to remove all dev_err() -> return repeated patterns, simplifying and shortening the probe function. Signed-off-by:
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AngeloGioacchino Del Regno authored
The last goto in the probe function can be removed by calling pm_runtime_enable() right before devm_spi_register_master(), as only some init checks were being performed after enabling pm. This is a cleanup and brings no functional changes. Signed-off-by:
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AngeloGioacchino Del Regno authored
Reparenting sel_clk to parent_clk can be done before enabling any of spi_clk and spi_hclk. Move the call to clk_set_parent() for sel_clk earlier, and call disable_unprepare() upon spi_clk prepare_enable() failure to remove all clock disablement related gotos. This commit is in preparation of a later cleanup. Signed-off-by:
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AngeloGioacchino Del Regno authored
In preparation for switching to dev_err_probe() in this function, add a pointer to struct device and replace all occurrences of '&pdev->dev' to using this 'dev' pointer. This is done for one-line fitting of the dev_err_probe() calls. Signed-off-by:
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AngeloGioacchino Del Regno authored
Instead of performing yet another match check in the probe function, simply switch to device_get_match_data(). This is a cleanup and brings no functional change. Signed-off-by:
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AngeloGioacchino Del Regno authored
Switch to the devm variant of spi_alloc_master() to save some gotos. This patch is a cleanup that brings no functional changes. Signed-off-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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Baruch Siach authored
When SPI_RX_CPHA_FLIP is set, flip CPHA on Rx only transfers. This is useful to access devices that use inverted CPHA for MISO vs MOSI signals. Only support the mx51/mx53 variants for now. Tested on i.MX6ULL based system. Signed-off-by:
Baruch Siach <baruch.siach@siklu.com> Link: https://lore.kernel.org/r/e11b4446afe9a46a282dd923d22c27d03fae15f8.1649702729.git.baruch@tkos.co.ilSigned-off-by:
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Baruch Siach authored
Allow userspace to set SPI_RX_CPHA_FLIP mode bit using the SPI_IOC_WR_MODE32 ioctl. Signed-off-by:
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Baruch Siach authored
Some SPI devices latch MOSI bits on one clock phase, but produce valid MISO bits on the other phase. Add SPI_RX_CPHA_FLIP mode to instruct the controller driver to flip CPHA for Rx (MISO) only transfers. Signed-off-by:
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Mika Westerberg authored
Should be 'specific' not 'spefific'. Fix this. Reported-by:
Hongli Li <hongli.li@intel.com> Signed-off-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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Li-hao Kuo authored
remove spin_lock_irq spin_unlock_irq and variable in the irq funciton Signed-off-by:
Li-hao Kuo <lhjeff911@gmail.com> Link: https://lore.kernel.org/r/f9991d6064d892d22ac7c2dfabe16309e9d03888.1650010304.git.lhjeff911@gmail.comSigned-off-by:
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- 14 Apr, 2022 1 commit
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Paul Kocialkowski authored
The previous commit that made bits-per-word validation conditional results in leaving no unconditional affectation of the status variable. Since the variable is returned at the end of the function, initialize it to avoid returning an undefined value. Signed-off-by:
Paul Kocialkowski <paul.kocialkowski@bootlin.com> Fixes: b3fe2e51 ("spi: core: Only check bits_per_word validity when explicitly provided") Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20220414084040.975520-1-paul.kocialkowski@bootlin.comSigned-off-by:
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- 13 Apr, 2022 5 commits
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Mark Brown authored
Pull in Atmel fix series, only first patch of which is for Linus Signed-off-by: -
Tudor Ambarus authored
Remove the DTR checks as they are already handled in spi_mem_default_supports_op(). This code removal was intentionally not done in the previous patch that introduced the use of the spi_mem_default_supports_op() core helper and fixed the buswidth adjustment between SPIMEM and the SPI controller, so that the fix can be easily backported to stable kernels. Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220406133604.455356-2-tudor.ambarus@microchip.comSigned-off-by:
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Tudor Ambarus authored
Use the spi_mem_default_supports_op() core helper in order to take into account the buswidth specified by the user in device tree. Cc: <stable@vger.kernel.org> Fixes: 0e6aae08 ("spi: Add QuadSPI driver for Atmel SAMA5D2") Signed-off-by:
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Matthias Schiffer authored
Since the conversion to spi-mem, the driver advertised support for various operations that cqspi_set_protocol() was never expected to handle correctly - in particuar all non-DTR operations with command or address buswidth > 1. For DTR, all operations except for 8-8-8 would fail, as cqspi_set_protocol() returns -EINVAL. In non-DTR mode, this resulted in data corruption for SPI-NOR flashes that support such operations. As a minimal fix that can be backported to stable kernels, simply disallow the unsupported operations again to avoid this issue. Fixes: a314f636 ("mtd: spi-nor: Convert cadence-quadspi to use spi-mem framework") Signed-off-by:
Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/20220406132832.199777-1-matthias.schiffer@ew.tq-group.comSigned-off-by:
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Mika Westerberg authored
Intel Raptor Lake-S has the same SPI serial flash controller as Alder Lake-P. Add Raptor Lake-S PCI ID to the driver list of supported devices. Signed-off-by:
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- 12 Apr, 2022 4 commits
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Allen-KH Cheng authored
After system resumes, the registers of nor controller are initialized with default values. The nor controller will not function properly. To handle both issues above, we add mtk_nor_init() in mtk_nor_resume after pm_runtime_force_resume(). Fixes: 3bfd9103 ("spi: spi-mtk-nor: Add power management support") Signed-off-by:
Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by:
Rex-BC Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20220412115743.22641-1-allen-kh.cheng@mediatek.comSigned-off-by:
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Biju Das authored
The direction field in the DMA config is deprecated. The rspi driver sets {src,dst}_{addr,addr_width} based on the DMA direction and it results in dmaengine_slave_config() failure as RZ DMAC driver validates {src,dst}_addr_width values independent of DMA direction. This patch fixes the issue by passing both {src,dst}_{addr,addr_width} values independent of DMA direction. Signed-off-by:Biju Das <biju.das.jz@bp.renesas.com> Suggested-by:
Vinod Koul <vkoul@kernel.org> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Tested-by:
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Paul Kocialkowski authored
On SPI device probe, the core will call spi_setup in spi_add_device before the corresponding driver was probed. When this happens, the bits_per_word member of the device is not yet set by the driver, resulting in the default being set to 8 bits-per-word. However some controllers do not support 8 bits-per-word at all, which results in a failure when checking the bits-per-word validity. In order to support these devices, skip the bits-per-word validity check when it is not explicitly provided by drivers. Signed-off-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20220412070906.2532091-1-chi.minghao@zte.com.cnSigned-off-by:
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- 11 Apr, 2022 1 commit
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Miaoqian Lin authored
wait_for_completion_timeout() returns unsigned long not int. It returns 0 if timed out, and positive if completed. The check for <= 0 is ambiguous and should be == 0 here indicating timeout which is the only error case. Fixes: 5720ec0a ("spi: spi-ti-qspi: Add DMA support for QSPI mmap read") Signed-off-by:
Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220411111034.24447-1-linmq006@gmail.comSigned-off-by:
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- 06 Apr, 2022 4 commits
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Michal Simek authored
Kernel function name don't match with function name. Error log: drivers/spi/spi-cadence.c:661: warning: expecting prototype for cdns_spi_runtime_resume(). Prototype was for cnds_runtime_resume() instead drivers/spi/spi-cadence.c:690: warning: expecting prototype for cdns_spi_runtime_suspend(). Prototype was for cnds_runtime_suspend() instead Fixes: d36ccd9f ("spi: cadence: Runtime pm adaptation") Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Signed-off-by:
Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Link: https://lore.kernel.org/r/20220322150018.12736-1-amit.kumar-mahapatra@xilinx.comSigned-off-by:
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Kamal Dasu authored
This fixes case where MSPI controller is used to access spi-nor flash and BSPI block is not present. Fixes: 5f195ee7 ("spi: bcm-qspi: Implement the spi_mem interface") Signed-off-by:
Kamal Dasu <kdasu.kdev@gmail.com> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220328142442.7553-1-kdasu.kdev@gmail.comSigned-off-by:
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Matthias Schiffer authored
cqspi_set_protocol() only set the data width, but ignored the command and address width (except for 8-8-8 DTR ops), leading to corruption of all transfers using 1-X-X or X-X-X ops. Fix by setting the other two widths as well. While we're at it, simplify the code a bit by replacing the CQSPI_INST_TYPE_* constants with ilog2(). Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash with 1-4-4 read and write operations. Signed-off-by:
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Vinod Koul authored
Commit b470e10e ("spi: core: add dma_map_dev for dma device") added dma_map_dev for _spi_map_msg() but missed to add for unmap routine, __spi_unmap_msg(), so add it now. Fixes: b470e10e ("spi: core: add dma_map_dev for dma device") Cc: stable@vger.kernel.org # v5.14+ Signed-off-by:
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