1. 27 Nov, 2023 2 commits
  2. 09 Nov, 2023 1 commit
  3. 30 Oct, 2023 9 commits
  4. 27 Oct, 2023 4 commits
  5. 26 Oct, 2023 2 commits
    • Herve Codina's avatar
      of: address: Remove duplicated functions · 3eb030c6
      Herve Codina authored
      The recently added of_bus_default_flags_translate() performs the exact
      same operation as of_bus_pci_translate() and of_bus_isa_translate().
      
      Avoid duplicated code replacing both of_bus_pci_translate() and
      of_bus_isa_translate() with of_bus_default_flags_translate().
      Signed-off-by: default avatarHerve Codina <herve.codina@bootlin.com>
      Link: https://lore.kernel.org/r/20231017110221.189299-3-herve.codina@bootlin.comSigned-off-by: default avatarRob Herring <robh@kernel.org>
      3eb030c6
    • Herve Codina's avatar
      of: address: Fix address translation when address-size is greater than 2 · 42604f8e
      Herve Codina authored
      With the recent addition of of_pci_prop_ranges() in commit 407d1a51
      ("PCI: Create device tree node for bridge"), the ranges property can
      have a 3 cells child address, a 3 cells parent address and a 2 cells
      child size.
      
      A range item property for a PCI device is filled as follow:
        <BAR_nbr> 0 0 <phys.hi> <phys.mid> <phys.low> <BAR_sizeh> <BAR_sizel>
        <-- Child --> <-- Parent (PCI definition) --> <- BAR size (64bit) -->
      
      This allow to translate BAR addresses from the DT. For instance:
      pci@0,0 {
        #address-cells = <0x03>;
        #size-cells = <0x02>;
        device_type = "pci";
        compatible = "pci11ab,100", "pciclass,060400", "pciclass,0604";
        ranges = <0x82000000 0x00 0xe8000000
                  0x82000000 0x00 0xe8000000
      	    0x00 0x4400000>;
        ...
        dev@0,0 {
          #address-cells = <0x03>;
          #size-cells = <0x02>;
          compatible = "pci1055,9660", "pciclass,020000", "pciclass,0200";
          /* Translations for BAR0 to BAR5 */
          ranges = <0x00 0x00 0x00 0x82010000 0x00 0xe8000000 0x00 0x2000000
                    0x01 0x00 0x00 0x82010000 0x00 0xea000000 0x00 0x1000000
                    0x02 0x00 0x00 0x82010000 0x00 0xeb000000 0x00 0x800000
                    0x03 0x00 0x00 0x82010000 0x00 0xeb800000 0x00 0x800000
                    0x04 0x00 0x00 0x82010000 0x00 0xec000000 0x00 0x20000
                    0x05 0x00 0x00 0x82010000 0x00 0xec020000 0x00 0x2000>;
          ...
          pci-ep-bus@0 {
            #address-cells = <0x01>;
            #size-cells = <0x01>;
            compatible = "simple-bus";
            /* Translate 0xe2000000 to BAR0 and 0xe0000000 to BAR1 */
            ranges = <0xe2000000 0x00 0x00 0x00 0x2000000
                      0xe0000000 0x01 0x00 0x00 0x1000000>;
            ...
          };
        };
      };
      
      During the translation process, the "default-flags" map() function is
      used to select the matching item in the ranges table and determine the
      address offset from this matching item.
      This map() function simply calls of_read_number() and when address-size
      is greater than 2, the map() function skips the extra high address part
      (ie part over 64bit). This lead to a wrong matching item and a wrong
      offset computation.
      Also during the translation itself, the extra high part related to the
      parent address is not present in the translated address.
      
      Fix the "default-flags" map() and translate() in order to take into
      account the child extra high address part in map() and the parent extra
      high address part in translate() and so having a correct address
      translation for ranges patterns such as the one given in the example
      above.
      Signed-off-by: default avatarHerve Codina <herve.codina@bootlin.com>
      Link: https://lore.kernel.org/r/20231017110221.189299-2-herve.codina@bootlin.comSigned-off-by: default avatarRob Herring <robh@kernel.org>
      42604f8e
  6. 25 Oct, 2023 4 commits
  7. 24 Oct, 2023 3 commits
  8. 22 Oct, 2023 1 commit
  9. 17 Oct, 2023 4 commits
  10. 04 Oct, 2023 1 commit
  11. 28 Sep, 2023 2 commits
  12. 22 Sep, 2023 1 commit
  13. 20 Sep, 2023 3 commits
  14. 10 Sep, 2023 3 commits
    • Linus Torvalds's avatar
      Linux 6.6-rc1 · 0bb80ecc
      Linus Torvalds authored
      0bb80ecc
    • Linus Torvalds's avatar
      Merge tag 'topic/drm-ci-2023-08-31-1' of git://anongit.freedesktop.org/drm/drm · 1548b060
      Linus Torvalds authored
      Pull drm ci scripts from Dave Airlie:
       "This is a bunch of ci integration for the freedesktop gitlab instance
        where we currently do upstream userspace testing on diverse sets of
        GPU hardware. From my perspective I think it's an experiment worth
        going with and seeing how the benefits/noise playout keeping these
        files useful.
      
        Ideally I'd like to get this so we can do pre-merge testing on PRs
        eventually.
      
        Below is some info from danvet on why we've ended up making the
        decision and how we can roll it back if we decide it was a bad plan.
      
        Why in upstream?
      
         - like documentation, testcases, tools CI integration is one of these
           things where you can waste endless amounts of time if you
           accidentally have a version that doesn't match your source code
      
         - but also like the above, there's a balance, this is the initial cut
           of what we think makes sense to keep in sync vs out-of-tree,
           probably needs adjustment
      
         - gitlab supports out-of-repo gitlab integration and that's what's
           been used for the kernel in drm, but it results in per-driver
           fragmentation and lots of duplicated effort. the simple act of
           smashing an arbitrary winner into a topic branch already started
           surfacing patches on dri-devel and sparking good cross driver team
           discussions
      
        Why gitlab?
      
         - it's not any more shit than any of the other CI
      
         - drm userspace uses it extensively for everything in userspace, we
           have a lot of people and experience with this, including
           integration of hw testing labs
      
         - media userspace like gstreamer is also on gitlab.fd.o, and there's
           discussion to extend this to the media subsystem in some fashion
      
        Can this be shared?
      
         - there's definitely a pile of code that could move to scripts/ if
           other subsystem adopt ci integration in upstream kernel git. other
           bits are more drm/gpu specific like the igt-gpu-tests/tools
           integration
      
         - docker images can be run locally or in other CI runners
      
        Will we regret this?
      
         - it's all in one directory, intentionally, for easy deletion
      
         - probably 1-2 years in upstream to see whether this is worth it or a
           Big Mistake. that's roughly what it took to _really_ roll out solid
           CI in the bigger userspace projects we have on gitlab.fd.o like
           mesa3d"
      
      * tag 'topic/drm-ci-2023-08-31-1' of git://anongit.freedesktop.org/drm/drm:
        drm: ci: docs: fix build warning - add missing escape
        drm: Add initial ci/ subdirectory
      1548b060
    • Linus Torvalds's avatar
      Merge tag 'x86-urgent-2023-09-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · e56b2b60
      Linus Torvalds authored
      Pull x86 fixes from Ingo Molnar:
       "Fix preemption delays in the SGX code, remove unnecessarily
        UAPI-exported code, fix a ld.lld linker (in)compatibility quirk and
        make the x86 SMP init code a bit more conservative to fix kexec()
        lockups"
      
      * tag 'x86-urgent-2023-09-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/sgx: Break up long non-preemptible delays in sgx_vepc_release()
        x86: Remove the arch_calc_vm_prot_bits() macro from the UAPI
        x86/build: Fix linker fill bytes quirk/incompatibility for ld.lld
        x86/smp: Don't send INIT to non-present and non-booted CPUs
      e56b2b60