- 30 Mar, 2013 1 commit
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Thomas Graf authored
Specifying the minimal length in the policy makes it reuseable and documents the interface. Signed-off-by:
Thomas Graf <tgraf@suug.ch> Signed-off-by:
Jesse Gross <jesse@nicira.com>
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- 29 Mar, 2013 14 commits
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Rajesh Borundia authored
Signed-off-by:
Rajesh Borundia <rajesh.borundia@qlogic.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Rajesh Borundia authored
o VFs might get scheduled out after sending a command to a PF and scheduled in after receiving a response. Implement a worker thread to handle atomic commands. Signed-off-by:
Manish Chopra <manish.chopra@qlogic.com> Signed-off-by:
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Rajesh Borundia authored
o Add support for commands from VF to PF. o PF validates the commands sent by the VF before sending it to adapter. o vPort is a container of resources. PF creates vPort for VFs and attach resources to it. vPort is transparent to the VF. o Separate 83xx TX and RX hardware resource cleanup from 82xx. Signed-off-by:
Sucheta Chakraborty <sucheta.chakraborty@qlogic.com> Signed-off-by:
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Rajesh Borundia authored
o Adapter provides communication channel between VF and PF. Any control commands from the VF driver are sent to the PF driver through this communication channel. PF driver validates the commands before sending them to the adapter. Similarly PF driver forwards any control command responses to the VF driver through this communication channel. Adapter sends message pending event to VF or PF when there is an outstanding response or a command for VF or PF respectively. When a command or a response is sent over a channel VF or PF cannot send another command or a response until adapter sends a channel free event. Adapter allocates 1K area to VF and PF each for this communication. o Commands and responses are encapsulated in a header. Header determines sequence id, number of fragments, fragment number etc. Signed-off-by:
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Rajesh Borundia authored
o VF will use shared MSI-X interrupt vector for Tx and Rx. o When QLCNIC_INTR_SHARED flag is set Tx and Rx will share MSI-X interrupt vector. Tx will use a separate MSI-X interrupt vector from Rx otherwise. Signed-off-by:
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Rajesh Borundia authored
o Add PCI device entry for VF. o Add HW operations for VF. Signed-off-by:
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Rajesh Borundia authored
o Add QLCNIC_SRIOV to Kconfig. o Provide PCI sysfs hooks to enable and disable SR-IOV. o Allow enabling only when CONFIG_QLCNIC_SRIOV is defined. o qlcnic_sriov_pf.c has all the PF related SR-IOV functionality. o qlcnic_sriov_common.c has VF functionality and SR-IOV functionality which is common between VF and PF. o qlcnic_sriov.h is a common header file for SR-IOV defines. Signed-off-by:
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Paul Bolle authored
The CONFIG_ARCH_IXDP2X01 and CONFIG_MACH_IXDP2351 Kconfig macros are unused since the ixp23xx and ixp2000 platforms were removed in v3.5. So remove the last code still depending on these macros. And since CS89x0_NONISA_IRQ was only set if either of these two macros was defined we can also remove that macro and the code depending on it. Signed-off-by:
Paul Bolle <pebolle@tiscali.nl> Signed-off-by:
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Sergei Shtylyov authored
Commit d0418bb7 (net: sh_eth: Add eth support for R8A7779 device) was a failed attempt to add support for one of members of the R-Car SoC family. That's for three reasons: it treated R8A7779 the same as SH7724 except including quite dirty hack adding ECMR_ELB bit to the mask in sh_eth_set_rate() while not removing ECMR_RTM bit (despite it's reserved in R-Car Ether), and it didn't add a new register offset array despite the closest SH_ETH_REG_FAST_SH4 mapping differs by 0x200 to the offsets all the R-Car Ether registers have, and also some of the registers in this old mapping don't exist on R-Car Ether (due to this, SH7724's 'sh_eth_my_cpu_data' structure is not adequeate for R-Car too). Fix all these shortcomings, restoring the SH7724 related section to its pristine state... Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by:
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Sergei Shtylyov authored
The driver's header file contains initialized register offset tables which (as any data definitions), of course, have no business being there. Move them to the driver's body, somewhat beautifying the initializers, while at it... Signed-off-by:
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John Fastabend authored
In rtnl_fdb_dump() when the fdb_dump ndo op is not populated we never set the idx value so that cb->arg[0] is always 0. Resulting in a endless loop of messages. Introduced with this commit, commit 090096bf Author: Vlad Yasevich <vyasevic@redhat.com> Date: Wed Mar 6 15:39:42 2013 +0000 net: generic fdb support for drivers without ndo_fdb_<op> CC: Vlad Yasevich <vyasevic@redhat.com> Signed-off-by:
John Fastabend <john.r.fastabend@intel.com> Signed-off-by:
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Pravin B Shelar authored
As Ben pointed out following patch fixes bug in checking device name length limits while forming tunnel device name. CC: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by:
Pravin B Shelar <pshelar@nicira.com> Signed-off-by:
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Li RongQing authored
replace per_cpu with per_cpu_ptr to save conversion between address and pointer Signed-off-by:
Li RongQing <roy.qing.li@gmail.com> Signed-off-by:
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Hong zhi guo authored
Signed-off-by:
Hong Zhiguo <honkiko@gmail.com> Signed-off-by:
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- 28 Mar, 2013 25 commits
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Alexandru Copot authored
Commit 94191213 replaced the macros NLMSG_NEXT with calls to nlmsg_next which produces this warning: kernel/audit.c: In function ‘audit_receive_skb’: kernel/audit.c:928:3: warning: passing argument 2 of ‘nlmsg_next’ makes pointer from integer without a cast In file included from include/net/rtnetlink.h:5:0, from include/net/neighbour.h:28, from include/net/dst.h:17, from include/net/sock.h:68, from kernel/audit.c:55: include/net/netlink.h:359:1: note: expected ‘int *’ but argument is of type ‘int’ Fix this by sending the intended pointer. Signed-off-by:
Alexandru Copot <alex.mihai.c@gmail.com> Signed-off-by:
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Hong zhi guo authored
Signed-off-by:
Stephen Hemminger <stephen@networkplumber.org> Signed-off-by:
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Steffen Trumtrar authored
Use clk_prepare_enable/clk_disable_unprepare to be safe on SMP systems. Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Fabio Estevam <festevam@gmail.com> Signed-off-by:
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Steffen Trumtrar authored
The core has a bit for swapping packet data endianism. Reset default from Cadence is off. Xilinx however, who uses this core on the Zynq SoCs, opted for on. Force it to off. This shouldn't change the behaviour for current users of the macb, but enables usage on Zynq devices. Signed-off-by:
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Steffen Trumtrar authored
At least in the cadence IP core on the Xilinx Zynq SoC the TCOMP/RCOMP flags are not auto-cleaned. As these flags are evaluated, they need to be cleaned. Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-nextDavid S. Miller authored
Jeff Kirsher says: ==================== This series contains updates to e1000e, ixgbe and ixgbevf. Majority of the changes are against e1000e (from Bruce Allan). Bruce adds additional error handling on PHY register access, as well as improve slow performance on 82579 when connected to a 10Mbit hub. In addition, fixes LED blink logic for cathode LED design. Most notable is added EEE support which is enabled by default and the added support for LTR on I217/I218. The ixgbe and ixgbevf from Greg Rose changes the VM so that if a user does not assign a MAC address, the MAC address is set to all zeros instead of a random MAC address. This ensures that we always know when we have a random address and udev won't get upset about it. ==================== Signed-off-by: -
git://git.open-mesh.org/linux-mergeDavid S. Miller authored
Included changes: - A fix for the network coding component which has been added within the last pull request (so it is in linux-3.10). The problem has been spotted thanks to Fengguang Wu's automated daily checks on our tree. - Implementation of the RTNL API for virtual interface creation/deletion and slave manipulation - substitution of seq_printf with seq_puts when possible - minor cleanups Signed-off-by: -
Hong zhi guo authored
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Hong zhi guo authored
Signed-off-by:
Mike Christie <michaelc@cs.wisc.edu> Signed-off-by:
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Hong zhi guo authored
Signed-off-by:
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Hong zhi guo authored
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Hong zhi guo authored
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Hong zhi guo authored
Signed-off-by:
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Greg Rose authored
If the administrator has not assigned a MAC address to the VF via the PF then handle it gracefully by generating a temporary MAC address. This ensures that we always know when we have a random address and udev won't get upset about it. Signed-off-by:
Greg Rose <gregory.v.rose@intel.com> CC: Andy Gospodarek <andy@greyhouse.net> CC: Stefan Assmann <sassmann@kpanic.de> Tested-by:
Sibai Li <sibai.li@intel.com> Signed-off-by:
Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Greg Rose authored
If the user has not assigned a MAC address to a VM, then don't give it a random one. Instead, just give it zeros and let it figure out what to do with them. Signed-off-by:
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Bruce Allan authored
The previous commit ce43a216 (e1000e: cleanup USLEEP_RANGE checkpatch checks) converted a number of delays and sleeps as recommended in ./Documentation/timers/timers-howto.txt. Unfortunately, a few of the udelay() to usleep_range() conversions are in code paths that are in an atomic context in which usleep_range() should not be used. Revert those specific changes. Signed-off-by:
Bruce Allan <bruce.w.allan@intel.com> Tested-by:
Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by:
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Bruce Allan authored
Signed-off-by:
Aaron Brown <aaron.f.brown@intel.com> Signed-off-by:
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Bruce Allan authored
Signed-off-by:
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Bruce Allan authored
Set the Latency Tolerance Reporting (LTR) values for the "PCIe-like" GbE MAC in the Lynx Point PCH based on Rx buffer size and link speed when link is up (which must not exceed the maximum latency supported by the platform), otherwise specify there is no LTR requirement. Unlike true-PCIe devices which set the LTR maximum snoop/no-snoop latencies in the LTR Extended Capability Structure in the PCIe Extended Capability register set, on this device LTR is set by writing the equivalent snoop/no-snoop latencies in the LTRV register in the MAC and set the SEND bit to send an Intel On-chip System Fabric sideband (IOSF-SB) message to the PMC. Signed-off-by:
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Bruce Allan authored
Now that IEEE802.3az-2010 Energy Efficient Ethernet has been approved as standard (September 2010) and the driver can enable and disable it via ethtool, enable the feature by default on parts which support it. Signed-off-by:
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Bruce Allan authored
Devices supported by the driver which support EEE (currently 82579, I217 and I218) are advertising EEE capabilities during auto-negotiation even when EEE has been disabled. In addition to not acting as expected, this also caused the EEE status reported by 'ethtool --show-eee' to be wrong when two of these devices are connected back-to-back and EEE is disabled on one. In addition to fixing this issue, the ability for the user to specify which speeds (100 or 1000 full-duplex) to advertise EEE support has been added. Signed-off-by:
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Bruce Allan authored
When the MAC and PHY are in two different modes (different power levels and interconnect speeds), it could take a long time before a PHY register access timed out using the existing MAC-PHY interconnect configuration coded into the driver for ICH- and PCH-based LOMs. Introduce an I217/I218- specific .setup_physical_interface operation which does not override the interconnect configuration in the NVM. Signed-off-by:
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Bruce Allan authored
When the LEDs are driven by cathode, the bit logic is reversed. Use the LED Invert bit to invert the logic. Cleanup use of a magic number and change the for loop increment to reduce the number of shifts. Signed-off-by:
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Bruce Allan authored
Two 82579 LOMs connected via a 10Mb hub experience extraordinarily low performance. This is because 82579 is excessively aggressive on transmit at 10Mb half-duplex and will not provide sufficient time for the link partner to transmit. When the link partner is also 82579, the result is a lot of collisions (and corresponding re-transmits) that cause the poor performance. To work-around this issue, significantly increase the IPG in the MAC to allow enough gap for the link partner to transmit and reduce the Rx latency in the analog PHY to 0 to reduce the number of collisions. Signed-off-by:
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Bruce Allan authored
PHY reads/writes via the MDIC register could potentially return results from a previous PHY register access. If that happens, the offset in the returned results will be that of the previous access and if that is different from the expected offset, log a debug message and error out. Signed-off-by:
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