- 20 Apr, 2022 32 commits
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Jiri Pirko authored
Introduce an infrastructure allowing users to register a set of operations which are to be called whenever a line card gets active/inactive. Signed-off-by:
Jiri Pirko <jiri@nvidia.com> Signed-off-by:
Vadim Pasternak <vadimp@nvidia.com> Signed-off-by:
Ido Schimmel <idosch@nvidia.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Merge tag 'linux-can-next-for-5.19-20220419' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next Marc Kleine-Budde says: ==================== pull-request: can-next 2022-04-19 this is a pull request of 17 patches for net-next/master. The first 2 patches are by me and target the CAN driver infrastructure. One patch renames a function in the rx_offload helper the other one updates the CAN bitrate calculation to prefer small bit rate pre-scalers over larger ones, which is encouraged by the CAN in Automation. Kris Bahnsen contributes a patch to fix the links to Technologic Systems web resources in the sja1000 driver. Christophe Leroy's patch prepares the mpc5xxx_can driver for upcoming powerpc header cleanup. Minghao Chi's patch converts the flexcan driver to use pm_runtime_resume_and_get(). The next 2 patches target the Xilinx CAN driver. Lukas Bulwahn's patch fixes an entry in the MAINTAINERS file. A patch by me marks the bit timing constants as const. Wolfram Sang's patch documents r8a77961 support on the renesas,rcar-canfd bindings document. The next 2 patches are by me and add support for the mcp251863 chip to the mcp251xfd driver. The last 7 patches are by Pavel Pisa, Martin Jerabek et al. and add the ctucanfd driver for the CTU CAN FD IP Core. ==================== Signed-off-by:
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David S. Miller authored
Boris Sukholitko says: ==================== net/sched: flower: match on the number of vlan tags Our customers in the fiber telecom world have network configurations where they would like to control their traffic according to the number of tags appearing in the packet. For example, TR247 GPON conformance test suite specification mostly talks about untagged, single, double tagged packets and gives lax guidelines on the vlan protocol vs. number of vlan tags. This is different from the common IT networks where 802.1Q and 802.1ad protocols are usually describe single and double tagged packet. GPON configurations that we work with have arbitrary mix the above protocols and number of vlan tags in the packet. The following patch series implement number of vlans flower filter. They add num_of_vlans flower filter as an alternative to vlan ethtype protocol matching. The end result is that the following command becomes possible: tc filter add dev eth1 ingress flower \ num_of_vlans 1 vlan_prio 5 action drop Also, from our logs, we have redirect rules such that: tc filter add dev $GPON ingress flower num_of_vlans $N \ action mirred egress redirect dev $DEV where N can range from 0 to 3 and $DEV is the function of $N. Also there are rules setting skb mark based on the number of vlans: tc filter add dev $GPON ingress flower num_of_vlans $N vlan_prio \ $P action skbedit mark $M More about the patch series: - patches 1-2 remove duplicate code by introducing is_key_vlan helper. - patch 3, 4 implement num_of_vlans in the dissector and in the flower. - patch 5 uses the num_of_vlans filter to allow further matching on vlan attributes. Complementary iproute2 patches are being sent separately. Thanks, Boris. - v4: rebased to the latest net-next - v3: - more example commands in patch 3 description (request by Jamal) - patch 5 description made clearer (thanks to Jiri) - v2: - add suitable subject prefixes - more evolved patch 5 description ==================== Signed-off-by: -
Boris Sukholitko authored
Before this patch the existence of vlan filters was conditional on the vlan protocol being matched in the tc rule. For example, the following rule: tc filter add dev eth1 ingress flower vlan_prio 5 was illegal because vlan protocol (e.g. 802.1q) does not appear in the rule. Remove the above restriction by looking at the num_of_vlans filter to allow further matching on vlan attributes. The following rule becomes legal as a result of this commit: tc filter add dev eth1 ingress flower num_of_vlans 1 vlan_prio 5 because having num_of_vlans==1 implies that the packet is single tagged. Change is_vlan_key helper to look at the number of vlans in addition to the vlan ethertype. The outcome of this change is that outer (e.g. vlan_prio) and inner (e.g. cvlan_prio) tag vlan filters require the number of vlan tags to be greater then 0 and 1 accordingly. As a result of is_vlan_key change, the ethertype may be set to 0 when matching on the number of vlans. Update fl_set_key_vlan to avoid setting key, mask vlan_tpid for the 0 ethertype. Signed-off-by:
Boris Sukholitko <boris.sukholitko@broadcom.com> Signed-off-by:
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Boris Sukholitko authored
These are bookkeeping parts of the new num_of_vlans filter. Defines, dump, load and set are being done here. Signed-off-by:
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Boris Sukholitko authored
Our customers in the fiber telecom world have network configurations where they would like to control their traffic according to the number of tags appearing in the packet. For example, TR247 GPON conformance test suite specification mostly talks about untagged, single, double tagged packets and gives lax guidelines on the vlan protocol vs. number of vlan tags. This is different from the common IT networks where 802.1Q and 802.1ad protocols are usually describe single and double tagged packet. GPON configurations that we work with have arbitrary mix the above protocols and number of vlan tags in the packet. The goal is to make the following TC commands possible: tc filter add dev eth1 ingress flower \ num_of_vlans 1 vlan_prio 5 action drop From our logs, we have redirect rules such that: tc filter add dev $GPON ingress flower num_of_vlans $N \ action mirred egress redirect dev $DEV where N can range from 0 to 3 and $DEV is the function of $N. Also there are rules setting skb mark based on the number of vlans: tc filter add dev $GPON ingress flower num_of_vlans $N vlan_prio \ $P action skbedit mark $M This new dissector allows extracting the number of vlan tags existing in the packet. Signed-off-by: -
Boris Sukholitko authored
Whitespace only. Signed-off-by:
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Boris Sukholitko authored
There are somewhat repetitive ethertype checks in fl_set_key. Refactor them into is_vlan_key helper function. To make the changes clearer, avoid touching identation levels. This is the job for the next patch in the series. Signed-off-by:
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Haowen Bai authored
Use kzalloc rather than duplicating its implementation, which makes code simple and easy to understand. Signed-off-by:
Haowen Bai <baihaowen@meizu.com> Signed-off-by:
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Luiz Angelo Daros de Luca authored
There is no need to add new compatible strings for each new supported chip version. The compatible string is used only to select the subdriver (rtl8365mb.c or rtl8366rb.c). Once in the subdriver, it will detect the chip model by itself, ignoring which compatible string was used. Link: https://lore.kernel.org/netdev/20220414014055.m4wbmr7tdz6hsa3m@bang-olufsen.dk/Signed-off-by:
Luiz Angelo Daros de Luca <luizluca@gmail.com> Reviewed-by:
Alvin Šipraga <alsi@bang-olufsen.dk> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Acked-by:
Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by:
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Luiz Angelo Daros de Luca authored
Compatible strings are used to help the driver find the chip ID/version register for each chip family. After that, the driver can setup the switch accordingly. Keep only the first supported model for each family as a compatible string and reference other chip models in the description. The removed compatible strings have never been used in a released kernel. CC: devicetree@vger.kernel.org Link: https://lore.kernel.org/netdev/20220414014055.m4wbmr7tdz6hsa3m@bang-olufsen.dk/Signed-off-by:
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David S. Miller authored
Guangbin Huang says: ==================== net: hns3: updates for -next This series includes some updates for the HNS3 ethernet driver. Change logs: V1 -> V2: - Fix failed to apply to net-next problem. ==================== Signed-off-by: -
Hao Chen authored
Remove unnecessary line wrap for hns3_set_tunable to improve function readability. Signed-off-by:
Hao Chen <chenhao288@hisilicon.com> Signed-off-by:
Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by:
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Peng Li authored
Magic values are not recommended. Signed-off-by: Peng Li<lipeng321@huawei.com> Signed-off-by:
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Peng Li authored
This patch fixes wrong words in comments. Signed-off-by: Peng Li<lipeng321@huawei.com> Signed-off-by:
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Peng Li authored
The param of function hclgevf_get_mbx_resp has been changed but the comments not upodated. This patch updates it. Signed-off-by: Peng Li<lipeng321@huawei.com> Signed-off-by:
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Hao Chen authored
For the active tx spare buffer size maybe changed according to the page size, so add log to notice it. Signed-off-by:
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Jie Wang authored
Currently, There is a low probability that pf mtu configuration fails, but the information in logs is insufficient for problem locating when the VF mtu value is illegally modified. So record the vf index and vf mtu value at the failure scenario. Signed-off-by:
Jie Wang <wangjie125@huawei.com> Signed-off-by:
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Jian Shen authored
The struct hclge_pf_to_vf_msg is used for mailbox message from PF to VF, including both response and request. But its definition can only indicate respone, which makes the message data copy in function hclge_send_mbx_msg() unreadable. So refine it by edding a general message definition into it. Signed-off-by:
Jian Shen <shenjian15@huawei.com> Signed-off-by:
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Hao Chen authored
Use struct hns3_ring_param to replace variable new/old_xxx and add hns3_is_ringparam_changed() to judge them if is changed to improve code readability. Signed-off-by:
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Yufeng Mo authored
For DEVICE_VERSION_V2, the hardware does not support the CQE mode. So add capability bit for coalesce CQE mode and add parameter check for it in ethtool. Signed-off-by:
Yufeng Mo <moyufeng@huawei.com> Signed-off-by:
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David S. Miller authored
[PATCH net-next v5 0/3] net: atlantic: Add XDP support @ 2022-04-17 10:12 Taehee Yoo 2022-04-17 10:12 ` [PATCH net-next v5 1/3] net: atlantic: Implement xdp control plane Taehee Yoo ` (2 more replies) 0 siblings, 3 replies; 4+ messages in thread From: Taehee Yoo @ 2022-04-17 10:12 UTC (permalink / raw) To: davem, kuba, pabeni, netdev, irusskikh, ast, daniel, hawk, john.fastabend, andrii, kafai, songliubraving, yhs, kpsingh, bpf Cc: ap420073 This patchset is to make atlantic to support multi-buffer XDP. The first patch implement control plane of xdp. The aq_xdp(), callback of .xdp_bpf is added. The second patch implements data plane of xdp. XDP_TX, XDP_DROP, and XDP_PASS is supported. __aq_ring_xdp_clean() is added to receive and execute xdp program. aq_nic_xmit_xdpf() is added to send packet by XDP. The third patch implements callback of .ndo_xdp_xmit. aq_xdp_xmit() is added to send redirected packets and it internally calls aq_nic_xmit_xdpf(). Memory model is MEM_TYPE_PAGE_SHARED. Order-2 page allocation is used when XDP is enabled. LRO will be disabled if XDP program doesn't supports multi buffer. AQC chip supports 32 multi-queues and 8 vectors(irq). There are two options. 1. under 8 cores and maximum 4 tx queues per core. 2. under 4 cores and maximum 8 tx queues per core. Like other drivers, these tx queues can be used only for XDP_TX, XDP_REDIRECT queue. If so, no tx_lock is needed. But this patchset doesn't use this strategy because getting hardware tx queue index cost is too high. So, tx_lock is used in the aq_nic_xmit_xdpf(). single-core, single queue, 80% cpu utilization. 32.30% [kernel] [k] aq_get_rxpages_xdp 10.44% [kernel] [k] aq_hw_read_reg <---------- here 9.86% bpf_prog_xxx_xdp_prog_tx [k] bpf_prog_xxx_xdp_prog_tx 5.51% [kernel] [k] aq_ring_rx_clean single-core, 8 queues, 100% cpu utilization, half PPS. 52.03% [kernel] [k] aq_hw_read_reg <---------- here 18.24% [kernel] [k] aq_get_rxpages_xdp 4.30% [kernel] [k] hw_atl_b0_hw_ring_rx_receive 4.24% bpf_prog_xxx_xdp_prog_tx [k] bpf_prog_xxx_xdp_prog_tx 2.79% [kernel] [k] aq_ring_rx_clean Performance result(64 Byte) 1. XDP_TX a. xdp_geieric, single core - 2.5Mpps, 100% cpu b. xdp_driver, single core - 4.5Mpps, 80% cpu c. xdp_generic, 8 core(hyper thread) - 6.3Mpps, 40% cpu d. xdp_driver, 8 core(hyper thread) - 6.3Mpps, 30% cpu 2. XDP_REDIRECT a. xdp_generic, single core - 2.3Mpps b. xdp_driver, single core - 4.5Mpps v5: - Use MEM_TYPE_PAGE_SHARED instead of MEM_TYPE_PAGE_ORDER0 - Use 2K frame size instead of 3K - Use order-2 page allocation instead of order-0 - Rename aq_get_rxpage() to aq_alloc_rxpages() - Add missing PageFree stats for ethtool - Remove aq_unset_rxpage_xdp(), introduced by v2 patch due to change of memory model - Fix wrong last parameter value of xdp_prepare_buff() - Add aq_get_rxpages_xdp() to increase page reference count v4: - Fix compile warning v3: - Change wrong PPS performance result 40% -> 80% in single core(Intel i3-12100) - Separate aq_nic_map_xdp() from aq_nic_map_skb() - Drop multi buffer packets if single buffer XDP is attached - Disable LRO when single buffer XDP is attached - Use xdp_get_{frame/buff}_len() v2: - Do not use inline in C file Taehee Yoo (3): net: atlantic: Implement xdp control plane net: atlantic: Implement xdp data plane net: atlantic: Implement .ndo_xdp_xmit handler .../net/ethernet/aquantia/atlantic/aq_cfg.h | 1 + .../ethernet/aquantia/atlantic/aq_ethtool.c | 9 + .../net/ethernet/aquantia/atlantic/aq_main.c | 87 ++++ .../net/ethernet/aquantia/atlantic/aq_main.h | 2 + .../net/ethernet/aquantia/atlantic/aq_nic.c | 136 ++++++ .../net/ethernet/aquantia/atlantic/aq_nic.h | 5 + .../net/ethernet/aquantia/atlantic/aq_ring.c | 409 ++++++++++++++++-- .../net/ethernet/aquantia/atlantic/aq_ring.h | 21 +- .../net/ethernet/aquantia/atlantic/aq_vec.c | 23 +- .../net/ethernet/aquantia/atlantic/aq_vec.h | 6 + .../aquantia/atlantic/hw_atl/hw_atl_a0.c | 6 +- .../aquantia/atlantic/hw_atl/hw_atl_b0.c | 10 +- 12 files changed, 670 insertions(+), 45 deletions(-) -- 2.17.1 ^ permalink raw reply [flat|nested] 4+ messages in thread * [PATCH net-next v5 1/3] net: atlantic: Implement xdp control plane 2022-04-17 10:12 [PATCH net-next v5 0/3] net: atlantic: Add XDP support Taehee Yoo @ 2022-04-17 10:12 ` Taehee Yoo 2022-04-17 10:12 ` [PATCH net-next v5 2/3] net: atlantic: Implement xdp data plane Taehee Yoo 2022-04-17 10:12 ` [PATCH net-next v5 3/3] net: atlantic: Implement .ndo_xdp_xmit handler Taehee Yoo 2 siblings, 0 replies; 4+ messages in thread From: Taehee Yoo @ 2022-04-17 10:12 UTC (permalink / raw) To: davem, kuba, pabeni, netdev, irusskikh, ast, daniel, hawk, john.fastabend, andrii, kafai, songliubraving, yhs, kpsingh, bpf Cc: ap420073 aq_xdp() is a xdp setup callback function for Atlantic driver. When XDP is attached or detached, the device will be restarted because it uses different headroom, tailroom, and page order value. If XDP enabled, it switches default page order value from 0 to 2. Because the default maximum frame size is still 2K and it needs additional area for headroom and tailroom. The total size(headroom + frame size + tailroom) is 2624. So, 1472Bytes will be always wasted for every frame. But when order-2 is used, these pages can be used 6 times with flip strategy. It means only about 106Bytes per frame will be wasted. Also, It supports xdp fragment feature. MTU can be 16K if xdp prog supports xdp fragment. If not, MTU can not exceed 2K - ETH_HLEN - ETH_FCS. And a static key is added and It will be used to call the xdp_clean handler in ->poll(). data plane implementation will be contained the followed patch. Signed-off-by:Taehee Yoo <ap420073@gmail.com> --- v5: - Use MEM_TYPE_PAGE_SHARED instead of MEM_TYPE_PAGE_ORDER0 - Use 2K frame size instead of 3K - Use order-2 page allocation instead of order-0 - Rename aq_get_rxpage() to aq_alloc_rxpages() v4: - No changed v3: - Disable LRO when single buffer XDP is attached v2: - No changed
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Taehee Yoo authored
aq_xdp_xmit() is the callback function of .ndo_xdp_xmit. It internally calls aq_nic_xmit_xdpf() to send packet. Signed-off-by:
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Taehee Yoo authored
It supports XDP_PASS, XDP_DROP and multi buffer. The new function aq_nic_xmit_xdpf() is used to send packet with xdp_frame and internally it calls aq_nic_map_xdp(). AQC chip supports 32 multi-queues and 8 vectors(irq). there are two option 1. under 8 cores and 4 tx queues per core. 2. under 4 cores and 8 tx queues per core. Like ixgbe, these tx queues can be used only for XDP_TX, XDP_REDIRECT queue. If so, no tx_lock is needed. But this patchset doesn't use this strategy because getting hardware tx queue index cost is too high. So, tx_lock is used in the aq_nic_xmit_xdpf(). single-core, single queue, 80% cpu utilization. 30.75% bpf_prog_xxx_xdp_prog_tx [k] bpf_prog_xxx_xdp_prog_tx 10.35% [kernel] [k] aq_hw_read_reg <---------- here 4.38% [kernel] [k] get_page_from_freelist single-core, 8 queues, 100% cpu utilization, half PPS. 45.56% [kernel] [k] aq_hw_read_reg <---------- here 17.58% bpf_prog_xxx_xdp_prog_tx [k] bpf_prog_xxx_xdp_prog_tx 4.72% [kernel] [k] hw_atl_b0_hw_ring_rx_receive The new function __aq_ring_xdp_clean() is a xdp rx handler and this is called only when XDP is attached. Signed-off-by:
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Taehee Yoo authored
aq_xdp() is a xdp setup callback function for Atlantic driver. When XDP is attached or detached, the device will be restarted because it uses different headroom, tailroom, and page order value. If XDP enabled, it switches default page order value from 0 to 2. Because the default maximum frame size is still 2K and it needs additional area for headroom and tailroom. The total size(headroom + frame size + tailroom) is 2624. So, 1472Bytes will be always wasted for every frame. But when order-2 is used, these pages can be used 6 times with flip strategy. It means only about 106Bytes per frame will be wasted. Also, It supports xdp fragment feature. MTU can be 16K if xdp prog supports xdp fragment. If not, MTU can not exceed 2K - ETH_HLEN - ETH_FCS. And a static key is added and It will be used to call the xdp_clean handler in ->poll(). data plane implementation will be contained the followed patch. Signed-off-by:
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David S. Miller authored
Vladimir Oltean says: ==================== DSA cross-chip notifier cleanups This patch set makes the following improvements: - Cross-chip notifiers pass a switch index, port index, sometimes tree index, all as integers. Sometimes we need to recover the struct dsa_port based on those integers. That recovery involves traversing a list. By passing directly a pointer to the struct dsa_port we can avoid that, and the indices passed previously can still be obtained from the passed struct dsa_port. - Resetting VLAN filtering on a switch has explicit code to make it run on a single switch, so it has no place to stay in the cross-chip notifier code. Move it out. - Changing the MTU on a user port affects only that single port, yet the code passes through the cross-chip notifier layer where all switches are notified. Avoid that. - Other related cosmetic changes in the MTU changing procedure. Apart from the slight improvement in performance given by (a) doing less work in cross-chip notifiers (b) emitting less cross-chip notifiers we also end up with about 100 less lines of code. ==================== Signed-off-by: -
Vladimir Oltean authored
A cross-chip notifier with "targeted_match=true" is one that matches only the local port of the switch that emitted it. In other words, passing through the cross-chip notifier layer serves no purpose. Eliminate this concept by calling directly ds->ops->port_change_mtu instead of emitting a targeted cross-chip notifier. This leaves the DSA_NOTIFIER_MTU event being emitted only for MTU updates on the CPU port, which need to be reflected also across all DSA links. Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by:
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Vladimir Oltean authored
We can get a hold of the "ds" pointer directly from "dp", no need for the dsa_slave_priv. Signed-off-by:
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Vladimir Oltean authored
We could retrieve the cpu_dp pointer directly from the "dp" we already have, no need to resort to dsa_to_port(ds, port). This change also removes the need for an "int port", so that is also deleted. Signed-off-by:
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Vladimir Oltean authored
Use the more conventional iterator over user ports instead of explicitly ignoring them, and use the more conventional name "other_dp" instead of "dp_iter", for readability. Signed-off-by:
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Vladimir Oltean authored
To determine whether a given port should react to the port targeted by the notifier, dsa_port_host_vlan_match() and dsa_port_host_address_match() look at the positioning of the switch port currently executing the notifier relative to the switch port for which the notifier was emitted. To maintain stylistic compatibility with the other match functions from switch.c, the host address and host VLAN match functions take the notifier information about targeted port, switch and tree indices as argument. However, these functions only use that information to retrieve the struct dsa_port *targeted_dp, which is an invariant for the outer loop that calls them. So it makes more sense to calculate the targeted dp only once, and pass it to them as argument. But furthermore, the targeted dp is actually known at the time the call to dsa_port_notify() is made. It is just that we decide to only save the indices of the port, switch and tree in the notifier structure, just to retrace our steps and find the dp again using dsa_switch_find() and dsa_to_port(). But both the above functions are relatively expensive, since they need to iterate through lists. It appears more straightforward to make all notifiers just pass the targeted dp inside their info structure, and have the code that needs the indices to look at info->dp->index instead of info->port, or info->dp->ds->index instead of info->sw_index, or info->dp->ds->dst->index instead of info->tree_index. For the sake of consistency, all cross-chip notifiers are converted to pass the "dp" directly. Signed-off-by:
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Vladimir Oltean authored
In dsa_port_switchdev_unsync_attrs() there is a comment that resetting the VLAN filtering isn't done where it is expected. And since commit 108dc874 ("net: dsa: Avoid cross-chip syncing of VLAN filtering"), there is no reason to handle this in switch.c either. Therefore, move the logic to port.c, and adapt it slightly to the data structures and naming conventions from there. Signed-off-by:
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- 19 Apr, 2022 8 commits
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Pavel Pisa authored
This patch adds an entry for the CTU CAN FD IP to the maintainers file. Link: https://lore.kernel.org/all/2cc77e2999d9688bed155e4c7f7807e46d1bf9e3.1647904780.git.pisa@cmp.felk.cvut.czSigned-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de>
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Pavel Pisa authored
CTU CAN FD IP core documentation based on Martin Jeřábek's diploma theses Open-source and Open-hardware CAN FD Protocol Support https://dspace.cvut.cz/handle/10467/80366 . Link: https://lore.kernel.org/all/692b965999ff6c272239df0fe1c76b68d02b134d.1647932262.git.pisa@cmp.felk.cvut.czSigned-off-by:
Martin Jerabek <martin.jerabek01@gmail.com> Signed-off-by:
Ondrej Ille <ondrej.ille@gmail.com> Signed-off-by:
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Pavel Pisa authored
Platform bus adaptation for CTU CAN FD open-source IP core. The core has been tested together with OpenCores SJA1000 modified to be CAN FD frames tolerant on MicroZed Zynq based MZ_APO education kits designed by Petr Porazil from PiKRON.com company. FPGA design https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top. The kit description at the Computer Architectures course pages https://cw.fel.cvut.cz/wiki/courses/b35apo/documentation/mz_apo/start . Kit carrier board and mechanics design source files https://gitlab.com/pikron/projects/mz_apo/microzed_apo The work is documented in Martin Jeřábek's diploma theses Open-source and Open-hardware CAN FD Protocol Support https://dspace.cvut.cz/handle/10467/80366 . Link: https://lore.kernel.org/all/4d5c53499bafe7717815f948801bd5aedaa05c12.1647904780.git.pisa@cmp.felk.cvut.czSigned-off-by:
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Pavel Pisa authored
PCI bus adaptation for CTU CAN FD open-source IP core. The project providing FPGA design for Intel EP4CGX15 based DB4CGX15 PCIe board with PiKRON.com designed transceiver riser shield is available at https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd . Link: https://lore.kernel.org/all/a81333e206a9bcf9434797f6f54d8664775542e2.1647904780.git.pisa@cmp.felk.cvut.czSigned-off-by:
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Martin Jerabek authored
This driver adds support for the CTU CAN FD open-source IP core. More documentation and core sources at project page (https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core). The core integration to Xilinx Zynq system as platform driver is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top). Implementation on Intel FPGA based PCI Express board is available from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd). More about CAN bus related projects used and developed at CTU FEE at https://canbus.pages.fel.cvut.cz/ . Link: https://lore.kernel.org/all/1906e4941560ae2ce4b8d181131fd4963aa31611.1647904780.git.pisa@cmp.felk.cvut.czSigned-off-by:
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Pavel Pisa authored
The device-tree bindings for open-source/open-hardware CAN FD IP core designed at the Czech Technical University in Prague. CTU CAN FD IP core and other CTU CAN bus related projects listing and documentation page http://canbus.pages.fel.cvut.cz/ Link: https://lore.kernel.org/all/c5a37fc470ae065b21e79caa65863539393c0d7c.1647904780.git.pisa@cmp.felk.cvut.czSigned-off-by:
Rob Herring <robh@kernel.org> Acked-by:
Pavel Machek <pavel@ucw.cz> Signed-off-by:
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Pavel Pisa authored
The Czech Technical University in Prague (CTU) is one of the biggest and oldest (founded 1707) technical universities in Europe. The abbreviation in Czech language is ČVUT according to official name in Czech language České vysoké učení technické v Praze The English translation The Czech Technical University in Prague The university pages in English https://www.cvut.cz/en Link: https://lore.kernel.org/all/ff3a7216114fcd83530e70b994ef0e4277ddf000.1647904780.git.pisa@cmp.felk.cvut.czSigned-off-by:
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Marc Kleine-Budde authored
The MCP251863 device is a CAN-FD controller (MCP2518FD) with an integrated transceiver (ATA6563). This patch add support for the new device. Link: https://lore.kernel.org/all/20220419072805.2840340-3-mkl@pengutronix.de Cc: Thomas Kopp <thomas.kopp@microchip.com> Signed-off-by:
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