- 11 Nov, 2019 40 commits
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Vignesh Raghavendra authored
It is possible that platform_get_resource() might return NULL and therefore code needs to check for this condition before de-referencing the pointer. Therefore move the de-referencing of 'res' pointer after devm_ioremap_resource() which would have checked the validity of the pointer. Reported-by:
Dan Murphy <dmurphy@ti.com> Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Matti Vaittinen authored
Make bit definitions static to reduce the scope. Signed-off-by:
Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Lee Jones authored
Until now, MFD has assumed all child devices passed to it (via mfd_cells) are to be registered. It does not take into account requests from Device Tree and the like to disable child devices on a per-platform basis. Well now it does. Link: https://www.spinics.net/lists/arm-kernel/msg366309.html Link: https://lkml.org/lkml/2019/8/22/1350Reported-by:
Barry Song <Baohua.Song@csr.com> Reported-by:
Stephan Gerhold <stephan@gerhold.net> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org> Reviewed-by:
Mark Brown <broonie@kernel.org> Tested-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Matti Vaittinen authored
Add missing curly brace to charger node example. Signed-off-by:
Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reviewed-by:
Krzysztof Kozlowski <krzk@kernel.org> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Andy Shevchenko authored
Intel Comet Lake PCH-H has the same LPSS than Intel Cannon Lake. Add the new IDs to the list of supported devices. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Linus Walleij authored
There is a distinct version of the Ux500 U8420 variant with "sysclk", as can be seen from the vendor code that didn't make it upstream, this firmware lacks the ULPPLL (ultra-low power phase locked loop) which in effect means that the timer clock is instead wired to the 32768 Hz always-on clock. This has some repercussions when enabling the timer clock as the code as it stands will disable the timer clock on these platforms (lacking the so-called "doze mode") and obtaining the wrong rate of the timer clock. The timer frequency is of course needed very early in the boot, and as a consequence, we need to shuffle around the early PRCMU init code: whereas in the past we did not need to look up the PRCMU firmware version in the early init, but now we need to know the version before the core system timers are registered so we restructure the platform callbacks to the PRCMU so as not to take any arguments and instead look up the resources it needs directly from the device tree when initializing. As we do not yet support any platforms using this firmware it is not a regression, but as PostmarketOS is starting to support products with this firmware we need to fix this up. The low rate of 32kHz also makes the MTU timer unsuitable as delay timer but this needs to be fixed in a separate patch. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
Stephan Gerhold <stephan@gerhold.net> Acked-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Bartosz Golaszewski authored
Convert the binding document for MAX77650 core MFD module to YAML. Signed-off-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Lee Jones authored
Most of the complexity of mfd_platform_add_cell() has been removed. The only functionality left duplicates cell memory into the child's platform device. Since it's only a few lines, moving it to the main thread and removing the superfluous function makes sense. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org> Reviewed-by:
Mark Brown <broonie@kernel.org>
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Lee Jones authored
The MFD implementation for reference counting was complex and unnecessary. There was only one bona fide user which has now been converted to handle the process in a different way. Any future resource protection, shared enablement functions should be handed by the parent device, rather than through the MFD subsystem API. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org> Reviewed-by:
Mark Brown <broonie@kernel.org>
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Lee Jones authored
IO regions are now requested and released by this device's parent. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org>
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Lee Jones authored
IO regions are now requested and released by this device's parent. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org>
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Lee Jones authored
Providing a subsystem-level API helper seems over-kill just to save a few lines of C-code. Previous commits saw us convert mfd_clone_cell()'s only user over to use a more traditional style of MFD child-device registration. Now we can remove the superfluous helper from the MFD API. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org>
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Lee Jones authored
If a child device calls mfd_cell_{en,dis}able() without an appropriate call-back being set, we are likely to encounter a panic. Avoid this by adding suitable checking. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org> Reviewed-by:
Mark Brown <broonie@kernel.org>
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Lee Jones authored
CS5535 is the only user of mfd_clone_cell(). It makes more sense to register child devices in the traditional way and remove the quite bespoke mfd_clone_cell() call from the MFD API. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org>
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Lee Jones authored
Prior to this patch, IO regions were requested via an MFD subsytem-level .enable() call-back and similarly released by a .disable() call-back. Double requests/releases were avoided by a centrally handled usage count mechanism. This complexity can all be avoided by handling IO regions only once during .probe() and .remove() of the parent device. Since this is the only legitimate user of the aforementioned usage count mechanism, this patch will allow it to be removed from MFD core in subsequent steps. Suggested-by:
Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org>
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Lee Jones authored
The current implementation abuses the platform 'id' mfd_cell member to index into the correct resources entry. Seeing as enough resource slots are already available, let's just loop through all available bars and allocate them to their appropriate slot, even if they happen to be zero. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org>
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Lee Jones authored
In most contexts '-1' doesn't really mean much to the casual observer. In almost all cases, it's better to use a human readable define. In this case PLATFORM_DEVID_* defines have already been provided for this purpose. While we're here, let's be specific about the 'MFD devices' which failed. It will help when trying to distinguish which of the 2 sets of sub-devices we actually failed to register. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org>
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Hans de Goede authored
Add a "cht_crystal_cove_pmic" cell to the cells for the Cherry Trail variant of the Crystal Cove PMIC. Adding this cell enables / hooks-up the new Cherry Trail Crystal Cove PMIC OpRegion driver. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Reviewed-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Charles Keepax authored
Add the ability to get the clock for each clock input pin of the chip and enable MCLK2 since that is expected to be a permanently enabled 32kHz clock. Signed-off-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Charles Keepax authored
Add the 3 input clock sources for the chip into the device tree binding document. Signed-off-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Charles Keepax authored
Save a few bytes by removing some registers from the driver that are not currently used and not intended to be used at any point in the future. Signed-off-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Fabien Parent authored
Use the correct macro when adding the MFD devices instead of using directly '-1' value. Signed-off-by:
Fabien Parent <fparent@baylibre.com> Reviewed-by:
Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Jonathan Cameron authored
Use a local variable to ensure correct endian types for intermediate results. Identified by sparse when building the IIO driver. Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Frank Wunderlich authored
Part 3 from this series [1] was not merged due to wrong splitting and breaks mt6323 pmic on bananapi-r2 dmesg prints this line and at least switch is not initialized on bananapi-r2 mt6397 1000d000.pwrap:mt6323: unsupported chip: 0x0 this patch contains only the probe-changes and chip_data structs from original part 3 by Hsin-Hsiung Wang [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=164155 Fixes: a4872e80 ("mfd: mt6397: Extract IRQ related code from core driver") Signed-off-by:
Frank Wunderlich <frank-w@public-files.de> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Dmitry Torokhov authored
Now that gpiolib recognizes wlf,reset legacy GPIO and will handle it even if DTS uses it without -gpio[s] suffix, we can switch to more standard devm_gpiod_get() and later remove devm_gpiod_get_from_of_node(). Note that we will lose "arizona /RESET" custom GPIO label, but since we do not set such custom label when using the modern binding, I opted to not having it here either. Signed-off-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Thierry Reding authored
regmap_add_irq_chip() will try to allocate all of the IRQ descriptors upfront if passed a non-zero irq_base parameter. However, the intention is to allocate IRQ descriptors on an as-needed basis if possible. Pass 0 instead of -1 to fix that use-case. Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Angelo G. Del Regno authored
Add the subtype and compatible strings for PM8950 and PMI8950, found in various SoCs, including MSM8953, MSM8956, MSM8976 and APQ variants. Signed-off-by:
Angelo G. Del Regno <kholk11@gmail.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Lee Jones authored
... with and without 'resources'. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Acked-by:
Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
... with and without platform ID. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Acked-by:
Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
Signed-off-by:
Lee Jones <lee.jones@linaro.org> Acked-by:
Laxman Dewangan <ldewangan@nvidia.com> Tested-by:
Laxman Dewangan <ldewangan@nvidia.com>
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Markus Elfring authored
Simplify this function implementation by using a known wrapper function. This issue was detected by using the Coccinelle software. Signed-off-by:
Markus Elfring <elfring@users.sourceforge.net> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Heiko Stuebner authored
Do not open code the definition, instead use the nice DEFINE_RES_IRQ macro for it. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Heiko Stuebner authored
All other rk8xx operate with the polarity on low and even the old submitted devicetree snippet for the px30-evb declared the irq as low. So bring the rk817 preset in line with this, as there is really no reason for it to be the only with with a high polarity. The rk809/rk817 hasn't been added to any devicetrees so far, so this won't break anything. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Heiko Stuebner authored
The pwrkey integration seems to stem from the vendor kernel, as the compatible is wrong and also the order of key-irqs is swapped. So fix these issues to make the pwrkey on rk817 actually work. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Daniel Schultz authored
The Rockchip PMIC driver can automatically detect connected component versions by reading the ID_MSB and ID_LSB registers. The probe function will always fail with RK818 PMICs because the ID_MSK is 0xFFF0 and the RK818 template ID is 0x8181. This patch changes this value to 0x8180. Fixes: 9d6105e1 ("mfd: rk808: Fix up the chip id get failed") Cc: stable@vger.kernel.org Cc: Elaine Zhang <zhangqing@rock-chips.com> Cc: Joseph Chen <chenjh@rock-chips.com> Signed-off-by:
Daniel Schultz <d.schultz@phytec.de> Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Jarkko Nikula authored
It turned out Intel Gemini Lake doesn't use the same I2C timing parameters as Broxton. I got confirmation from the Windows team that Gemini Lake systems should use updated timing parameters that differ from those used in Broxton based systems. Fixes: f80e78aa ("mfd: intel-lpss: Add Intel Gemini Lake PCI IDs") Tested-by:
Chris Chiu <chiu@endlessm.com> Signed-off-by:
Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Lee Jones authored
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Tuowen Zhao authored
Signed-off-by:
Tuowen Zhao <ztuowen@gmail.com> Acked-by:
Luis Chamberlain <mcgrof@kernel.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Tuowen Zhao authored
Some BIOS erroneously specifies write-combining BAR for intel-lpss-pci in MTRR. This will cause the system to hang during boot. If possible, this bug could be corrected with a firmware update. This patch use devm_ioremap_uc to overwrite/ignore the MTRR settings by forcing the use of strongly uncachable pages for intel-lpss. The BIOS bug is present on Dell XPS 13 7390 2-in-1: [ 0.001734] 5 base 4000000000 mask 6000000000 write-combining 4000000000-7fffffffff : PCI Bus 0000:00 4000000000-400fffffff : 0000:00:02.0 (i915) 4010000000-4010000fff : 0000:00:15.0 (intel-lpss-pci) Link: https://bugzilla.kernel.org/show_bug.cgi?id=203485 Cc: <stable@vger.kernel.org> # v4.19+ Tested-by:
AceLan Kao <acelan.kao@canonical.com> Signed-off-by:
Tuowen Zhao <ztuowen@gmail.com> Acked-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by:
Roman Gilg <subdiff@gmail.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Tuowen Zhao authored
Implement a resource managed strongly uncachable ioremap function. Cc: <stable@vger.kernel.org> # v4.19+ Tested-by:
AceLan Kao <acelan.kao@canonical.com> Signed-off-by:
Tuowen Zhao <ztuowen@gmail.com> Acked-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Luis Chamberlain <mcgrof@kernel.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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