- 24 Jan, 2014 40 commits
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James Hogan authored
When KVM is enabled and TLB invalidation is supported, kvm_mips_flush_host_tlb() can cause a machine check exception due to multiple matching TLB entries. This can occur on shutdown even when KVM hasn't been actively used. Commit adb78de9eae8 (MIPS: mm: Move UNIQUE_ENTRYHI macro to a header file) created a common UNIQUE_ENTRYHI in asm/tlb.h but it didn't update the copy of UNIQUE_ENTRYHI in kvm_tlb.c to use it. Commit 36b175451399 (MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLB) later added TLB invalidation (EHINV) support to the common UNIQUE_ENTRYHI. Therefore make kvm_tlb.c use the EHINV aware UNIQUE_ENTRYHI implementation in asm/tlb.h too. Signed-off-by:
James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: Gleb Natapov <gleb@redhat.com> Cc: kvm@vger.kernel.org Cc: Sanjay Lal <sanjayl@kymasys.com> Reviewed-by:
Markos Chandras <markos.chandras@imgtec.com> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6383/
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Sebastian Andrzej Siewior authored
If this is not done then the new just read data which remains in dcache will not make it into icache on time. Thus the CPU loads invalid data and executes crap. The result is that the user is not able to execute anything from its IDE based media while reading plain data is still working well. This problem has been reported as Debian #404951 http://bugs.debian.org/404951 http://comments.gmane.org/gmane.linux.ide/45092Signed-off-by:
Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by:
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Hauke Mehrtens authored
The disabling of cpu_wait was done too early, before the detection was done. This moves the code to a position where it actually works. Signed-off-by:
Hauke Mehrtens <hauke@hauke-m.de> Acked-by:
Rafał Miłecki <zajec5@gmail.com> Signed-off-by:
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Florian Fainelli authored
Broadcom BCM63xx DSL SoCs have a L1-cache line size of 16 bytes (shift value of 4) instead of the currently configured 32 bytes L1-cache line size. Reported-by:
Daniel Gonzalez <dgcbueu@gmail.com> Signed-off-by:
Florian Fainelli <florian@openwrt.org>
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Florian Fainelli authored
All platforms that require a special MIPS_L1_CACHE_SHIFT value have been updated, such that we can now make MIPS_L1_CACHE_SHIFT default to the appropriate integer value based on the select MIPS_L1_CACHE_SHIFT_<N> variable. Signed-off-by: -
Florian Fainelli authored
In order to avoid keeping an ever growing list of chips which need to select a specific MIPS_L1_CACHE_SHIFT value introduce multiple internal and non-exposed Kconfig symbols for the various MIPS_L1_CACHE_SHIFT values out there and update the relevant Kconfig symbols to select them. Signed-off-by: -
Antony Pavlov authored
In the worst case this adds less then 128 bytes of code but on the other hand this makes code organization more clear. Signed-off-by:
Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Crispin <blogic@openwrt.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Wolfram Sang authored
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by:
Wolfram Sang <wsa@the-dreams.de> Signed-off-by:
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Wolfram Sang authored
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by:
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Rafał Miłecki authored
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Rafał Miłecki authored
Signed-off-by:
Michael Buesch <m@bues.ch> Signed-off-by:
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Hauke Mehrtens authored
This fixes the following sparse warnings: arch/mips/bcm47xx/board.c:39:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:46:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:53:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:78:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:99:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:109:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:124:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:155:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:177:16: warning: Using plain integer as NULL pointer arch/mips/bcm47xx/board.c:189:16: warning: Using plain integer as NULL pointer Signed-off-by:
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Hauke Mehrtens authored
This adds board detection for Linksys WRT54GS V1. Signed-off-by:
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Hauke Mehrtens authored
When a nvram reset was performed from CFE, it sometimes does not contain the productid value in nvram, but it still contains hardware_version. Signed-off-by:
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Rafał Miłecki authored
This is supported since implementing IRQ domain in ssb. Signed-off-by:
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Rafał Miłecki authored
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Rafał Miłecki authored
Some devices have power LED as well as status LED. The second one is used to show the firmware is up and running. Set "timer" trigger for such LEDs. Signed-off-by:
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Hauke Mehrtens authored
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Hauke Mehrtens authored
With this patch we prevent the irq from being fired when it is registered. The Hardware fires an IRQ when input signal XOR polarity AND gpio mask is 1. Now we are setting polarity to a vlaue so that is is 0 when we register it. In addition we also set the irq mask register to 0 when the irq handler is initialized, so all gpio irqs are masked and there will be no unexpected irq. Signed-off-by:
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Markos Chandras authored
BUG() can be a noop if CONFIG_BUG is not selected, leading to the following build problem on a randconfig: arch/mips/bcm63xx/cpu.c: In function 'detect_cpu_clock': arch/mips/bcm63xx/cpu.c:254:1: error: control reaches end of non-void function [-Werror=return-type] We fix this problem by replacing BUG() with panic() since it's best to handle the case of an unknown board instead of silently returning a random clock frequency. Signed-off-by:
Steven J. Hill <Steven.Hill@imgtec.com> Acked-by:
Jonas Gorski <jogo@openwrt.org> Signed-off-by:
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Rafał Miłecki authored
This old wgt634u.c was trying to implement a bit ugly support for Netgear WGT634U. It provided info about LED, flash mapping & layout and was trying to handle reset button. This is not needed anymore as we have replacement for all this stuff. Signed-off-by:
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Rafał Miłecki authored
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Rafał Miłecki authored
This includes all devices from OpenWrt's "diag" that we support in arch code (we have entries for in enum bcm47xx_board). Signed-off-by:
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Rafał Miłecki authored
So far this adds support for one Netgear model only, but it's designed and ready to add many more device. We could hopefully import database from OpenWrt. Support for SSB is currently disabled, because SSB doesn't implement IRQ domain yet. Signed-off-by:
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Rafał Miłecki authored
So far this is mostly just a proof of concept, database consists of a single device. Creating a nice iterateable array wasn't an option because devices have different amount of LEDs. And we don't want to waste memory just because of support for a device with dozens on LEDs. Signed-off-by:
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Hauke Mehrtens authored
The BCM4706 has a problem with the CPU wait instruction. When r4k_wait or r4k_wait_irqoff is used will just hang and not return from a msleep(). Removing the cpu_wait functionality is a workaround for this problem. The BCM4716 does not have this problem. The BCM4706 SoC uses a MIPS 74K V4.9 CPU. Signed-off-by:
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Hauke Mehrtens authored
This will add the board name to the machine entry in /proc/cpuinfo. Signed-off-by:
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Jayachandran C authored
Move wakeup to after early console. This will allow us to display error messages when cores are not woken up. Also reduce the wait time for core to come up. Signed-off-by:
Jayachandran C <jchandra@broadcom.com> Signed-off-by:
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Jayachandran C authored
The early serial code is not needed because we already have early printk support provided by common/earlycons.c This change also fixes the following build error that occurs when CONFIG_SERIAL_8250 is not configured for Netlogic XLR boards: arch/mips/built-in.o: In function `nlm_early_serial_setup': setup.c:(.init.text+0x274): undefined reference to `early_serial_setup' make: *** [vmlinux] Error 1 Reported-by:
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Jayachandran C authored
Add a default device tree fie for XLP9XX boards, and add code to use this device tree if no DTB is passed to the kernel. Signed-off-by:
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Jayachandran C authored
Support for adding legacy IRQ domain for XLP9XX. The node id of the PIC has to be calulated differently for XLP9XX. Signed-off-by:
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Ganesan Ramalingam authored
XLP9XX has a USB 3.0 controller on-chip with 2 xHCI ports. The USB block is similar to the one on XLP2XX, so update usb-init-xlp2.c to handle XLP9XX as well. Signed-off-by:
Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by:
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Jayachandran C authored
Add PCI support for Netlogic XLP9XX. The PCI registers and SoC bus numbers have changed in XLP9XX. Also skip a few (bus,dev,fn) combinations which have issues when read. Signed-off-by:
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Jayachandran C authored
XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX. Update code that calculates node id from cpu id to handle this. Signed-off-by:
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Jayachandran C authored
Update bridge code. Add code to the XLP9XX registers for DRAM size, limit and node when running on XLPXX Signed-off-by:
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Jayachandran C authored
Update IO offset of the early console UART. Signed-off-by:
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Jayachandran C authored
Add the SYS block registers for XLP9XX, most of them have changed. The wakeup sequence has been updated to set the coherent mode from the main thread rather than the woken up thread. Signed-off-by:
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Jayachandran C authored
Functions for the XLP9XX interrupt table entry format and other PIC register changes. Signed-off-by:
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Jayachandran C authored
Most IO block offsets have changed in XLP9XX. Update iomap.h to add the new addresses of different SoC blocks like PIC, SYS, UART etc. that are needed by the base code. On XLP9xx, the SoC blocks of other nodes are seen on a PCI bus corresponding to the node. Update iomap code to reflect this. Signed-off-by:
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Jayachandran C authored
Adds processor ID of XLP 9XX to asm/cpu.h. Update netlogic/xlp-hal/xlp.h to add cpu_is_xlp9xx() and to update cpu_is_xlpii() to support XLP 9XX. Signed-off-by:
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