- 24 May, 2019 36 commits
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Jose Abreu authored
We don't need to disable the whole RX when dma_stop_rx() is called because there may be the need of just disabling 1 DMA channel. This is also needed for stmmac Flow Control selftest. Signed-off-by:
Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Jose Abreu authored
We don't need to disable the whole RX when dma_stop_rx() is called because there may be the need of just disabling 1 DMA channel. This is also needed for stmmac Flow Control selftest. Signed-off-by:
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Jose Abreu authored
In order for hash filter to work we need to set the HPF bit. Fout out while running stmmac selftests Signed-off-by:
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Jose Abreu authored
In case we don't use a given address entry we need to clear it because it could contain previous values that are no longer valid. Found out while running stmmac selftests. Signed-off-by:
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Jose Abreu authored
In order for hash filter to work we need to set the HPF bit. Found out while running stmmac selftests. Signed-off-by:
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Jose Abreu authored
We add support for selftests on stmmac driver with 9 basic sanity checks for now: - MAC Loopback - PHY Loopback - MMC Counters - EEE - Hash Filter Multicast - Perfect Filter Unicast - Multicast Filter All - Unicast Filter All - Flow Control This allows for fast tracking of regressions in the driver and helps in spotting mis-configuration of HW. Changes from v1: - Fix build error as module (David) - Check for link status before running tests Changes from RFC v2: - Return proper error code in stmmac_test_mmc (Corentin) - Use only 1 MMC counter in stmmac_test_mmc (Alexandre) Changes from RFC v1: - Change test_loopback to test_mac_loopback (Andrew) - Change timeout to retries (Andrew) - Add MC/UC filter tests (Andrew) - Only test in offline mode (Andrew) - Do not call phy_loopback twice (Alexandre) Signed-off-by:
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Jose Abreu authored
In order for the selftests to run the Flow Control selftest we need to also pass pause frames to the stack. Pass this type of frames while in promiscuous mode. Signed-off-by:
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Jose Abreu authored
In order for the selftests to run the Flow Control selftest we need to also pass pause frames to the stack. Pass this type of frames while in promiscuous mode. Signed-off-by:
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Jose Abreu authored
In order for the selftests to run the Flow Control selftest we need to also pass pause frames to the stack. Pass this type of frames while in promiscuous mode. Signed-off-by:
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Jose Abreu authored
XGMAC has a different MMC module. Lets use HWIF callbacks for MMC module so that correct callbacks are automatically selected. Signed-off-by:
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Corentin Labbe authored
This patch enable use of set_mac_loopback in dwmac-sun8i Signed-off-by:
Corentin Labbe <clabbe@baylibre.com> Signed-off-by:
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Jose Abreu authored
In preparation for the addition of stmmac selftests we implement the MAC loopback callback in dwxgmac2 core. Signed-off-by:
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Jose Abreu authored
In preparation for the addition of stmmac selftests we implement the MAC loopback callback in dwmac4/5 cores. Signed-off-by:
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Jose Abreu authored
In preparation for the addition of stmmac selftests we implement the MAC loopback callback in dwmac1000 core. Signed-off-by:
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Jose Abreu authored
In preparation for the addition of stmmac selftests we implement the MAC loopback callback in dwmac100 core. Signed-off-by:
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Jose Abreu authored
In preparation for the addition of selftests support for stmmac we add a new callback to HWIF that can be used to set the controller in loopback mode. Signed-off-by:
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David S. Miller authored
Heiner Kallweit says: ==================== net: phy: add interface mode PHY_INTERFACE_MODE_USXGMII Add support for interface mode USXGMII. On Freescale boards LS1043A and LS1046A a warning may pop up now because mode xgmii should be changed to usxgmii (as the used Aquantia PHY doesn't support XGMII). ==================== Signed-off-by: -
Heiner Kallweit authored
So far we didn't support mode USXGMII, and in order to not break few boards mode XGMII was accepted for the AQR107 family even though it doesn't support XGMII. Add USXGMII support to the Aquantia PHY driver and warn if XGMII mode is set. v2: - add warning if XGMII mode is set Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Heiner Kallweit authored
Add new interface mode USXGMII to binding documentation. Signed-off-by:
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Heiner Kallweit authored
Add support for interface mode PHY_INTERFACE_MODE_USXGMII. Signed-off-by:
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Willem de Bruijn authored
The SO_TXTIME API enables packet tranmission with delayed delivery. This is currently supported by the ETF and FQ packet schedulers. Evaluate the interface with both schedulers. Install the scheduler and send a variety of packets streams: without delay, with one delayed packet, with multiple ordered delays and with reordering. Verify that packets are released by the scheduler in expected order. The ETF qdisc requires a timestamp in the future on every packet. It needs a delay on the qdisc else the packet is dropped on dequeue for having a delivery time in the past. The test value is experimentally derived. ETF requires clock_id CLOCK_TAI. It checks this base and drops for non-conformance. The FQ qdisc expects clock_id CLOCK_MONOTONIC, the base used by TCP as of commit fb420d5d ("tcp/fq: move back to CLOCK_MONOTONIC"). Within a flow there is an expecation of ordered delivery, as shown by delivery times of test 4. The FQ qdisc does not require all packets to have timestamps and does not drop for non-conformance. The large (msec) delays are chosen to avoid flakiness. Output: SO_TXTIME ipv6 clock monotonic payload:a delay:28 expected:0 (us) SO_TXTIME ipv4 clock monotonic payload:a delay:38 expected:0 (us) SO_TXTIME ipv6 clock monotonic payload:a delay:40 expected:0 (us) SO_TXTIME ipv4 clock monotonic payload:a delay:33 expected:0 (us) SO_TXTIME ipv6 clock monotonic payload:a delay:10120 expected:10000 (us) SO_TXTIME ipv4 clock monotonic payload:a delay:10102 expected:10000 (us) [.. etc ..] OK. All tests passed Changes v1->v2: update commit message output Signed-off-by:
Willem de Bruijn <willemb@google.com> Acked-by:
Eric Dumazet <edumazet@google.com> Acked-by:
Vinicius Costa Gomes <vinicius.gomes@intel.com> Signed-off-by:
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David S. Miller authored
David Ahern says: ==================== ipv6: Move exceptions to fib6_nh and make it optional in a fib6_info Patches 1 and 4 move pcpu and exception caches from fib6_info to fib6_nh. With respect to the current FIB entries this is only a movement from one struct to another contained within the first. Patch 2 refactors the core logic of fib6_drop_pcpu_from into a helper that is invoked per fib6_nh. Patch 3 refactors exception handling in a similar way - creating a bunch of helpers that can be invoked per fib6_nh with the goal of making patch 4 easier to review as well as creating the code needed for nexthop objects. Patch 5 makes a fib6_nh at the end of a fib6_info an array similar to IPv4 and its fib_info. For the current fib entry model, all fib6_info will have a fib6_nh allocated for it. Patch 6 refactors ip6_route_del moving the code for deleting an exception entry into a new function. Patch 7 adds tests for redirect route exceptions. The new test was written against 5.1 (before any of the nexthop refactoring). It and the pmtu.sh selftest exercise the exception code paths - from creating exceptions to cleaning them up on device delete. All tests pass without any rcu locking or memleak warnings. ==================== Signed-off-by: -
David Ahern authored
Add test for ICMP redirects and exception processing. Test is setup for later addition of tests using nexthop objects for routing. Signed-off-by:
David Ahern <dsahern@gmail.com> Signed-off-by:
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David Ahern authored
Move the removal of cached routes to a helper, ip6_del_cached_rt, that can be invoked per nexthop. Rename the existig ip6_del_cached_rt to __ip6_del_cached_rt since it is called by ip6_del_cached_rt. Signed-off-by:
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David Ahern authored
Move fib6_nh to the end of fib6_info and make it an array of size 0. Pass a flag to fib6_info_alloc indicating if the allocation needs to add space for a fib6_nh. The current code path always has a fib6_nh allocated with a fib6_info; with nexthop objects they will be separate. Signed-off-by:
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David Ahern authored
Similar to the pcpu routes exceptions are really per nexthop, so move rt6i_exception_bucket from fib6_info to fib6_nh. To avoid additional increases to the size of fib6_nh for a 1-bit flag, use the lowest bit in the allocated memory pointer for the flushed flag. Add helpers for retrieving the bucket pointer to mask off the flag. The cleanup of the exception bucket is moved to fib6_nh_release. fib6_nh_flush_exceptions can now be called from 2 contexts: 1. deleting a fib entry 2. deleting a fib6_nh For 1., fib6_nh_flush_exceptions is called for a specific fib6_info that is getting deleted. All exceptions in the cache using the entry are deleted. For 2, the fib6_nh itself is getting destroyed so fib6_nh_flush_exceptions is called for a NULL fib6_info which means flush all entries. The pmtu.sh selftest exercises the affected code paths - from creating exceptions to cleaning them up on device delete. All tests pass without any rcu locking or memleak warnings. Signed-off-by:
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David Ahern authored
Before moving exception bucket from fib6_info to fib6_nh, refactor rt6_flush_exceptions, rt6_remove_exception_rt, rt6_mtu_change_route, and rt6_update_exception_stamp_rt. In all 3 cases, move the primary logic into a new helper that starts with fib6_nh_. The latter 3 functions still take a fib6_info; this will be changed to fib6_nh in the next patch. In the case of rt6_mtu_change_route, move the fib6_metric_locked out as a standalone check - no need to call the new function if the fib entry has the mtu locked. Also, add fib6_info to rt6_mtu_change_arg as a way of passing the fib entry to the new helper. No functional change intended. The goal here is to make the next patch easier to review by moving existing lookup logic for each to new helpers. Signed-off-by:
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David Ahern authored
Move the existing pcpu walk in fib6_drop_pcpu_from to a new helper, __fib6_drop_pcpu_from, that can be invoked per fib6_nh with a reference to the from entries that need to be evicted. If the passed in 'from' is non-NULL then only entries associated with that fib6_info are removed (e.g., case where fib entry is deleted); if the 'from' is NULL are entries are flushed (e.g., fib6_nh is deleted). For fib6_info entries with builtin fib6_nh (ie., current code) there is no change in behavior. Signed-off-by:
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David Ahern authored
rt6_info are specific instances of a fib entry and are tied to a device and gateway - ie., a nexthop. Before nexthop objects, IPv6 fib entries have separate fib6_info for each nexthop in a multipath route, so the location of the pcpu cache in the fib6_info struct worked. However, with nexthop objects a fib6_info can point to a set of nexthops (yet another alignment of ipv6 with ipv4). Accordingly, the pcpu cache needs to be moved to the fib6_nh struct so the cached entries are local to the nexthop specification used to create the rt6_info. Initialization and free of the pcpu entries moved to fib6_nh_init and fib6_nh_release. Change in location only, from fib6_info down to fib6_nh; no other functional change intended. Signed-off-by:
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David S. Miller authored
Y.b. Lu says: ==================== ENETC: support hardware timestamping This patch-set is to support hardware timestamping for ENETC and also to add ENETC 1588 timer device tree node for ls1028a. Because the ENETC RX BD ring dynamic allocation has not been supported and it is too expensive to use extended RX BDs if timestamping is not used, a Kconfig option is used to enable extended RX BDs in order to support hardware timestamping. This option will be removed once RX BD ring dynamic allocation is implemented. ==================== Signed-off-by: -
Y.b. Lu authored
Add ENETC 1588 timer node which is ENETC PF 4 (Physiscal Function 4). Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by:
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Y.b. Lu authored
Add a new compatible for ENETC PTP. Signed-off-by:
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Y.b. Lu authored
This patch is to add get_ts_info interface for ethtool to support getting timestamping capability. Signed-off-by:
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Y.b. Lu authored
This patch is to add hardware timestamping support for ENETC. On Rx, timestamping is enabled for all frames. On Tx, we only instruct the hardware to timestamp the frames marked accordingly by the stack. Because the RX BD ring dynamic allocation has not been supported and it is too expensive to use extended RX BDs if timestamping is not used, a Kconfig option is used to enable extended RX BDs in order to support hardware timestamping. This option will be removed once RX BD ring dynamic allocation is implemented. Signed-off-by:
Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by:
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Esben Haabendal authored
Fixes: 1b3fa5cf ("net: ll_temac: Cleanup multicast filter on change") Signed-off-by:
Esben Haabendal <esben@geanix.com> Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queueDavid S. Miller authored
Jeff Kirsher says: ==================== 100GbE Intel Wired LAN Driver Updates 2019-05-23 This series contains updates to ice driver only. Anirudh cleans up white space issues and other code formatting issues in the driver. Also implemented LLDP persistence across reboots and start/stop of the LLDP agent. Updated print statements for driver capabilities to include if it is a device or function capability. Bruce cleaned up variable declarations by removing unneeded assignment. Dave fixes a potential hang due to a couple of flows that recursively acquire the RTNL lock which results in a deadlock. Tony updates the driver to advertise what link modes we are capable of when the user does not request a specific link mode. Usha fixes up the LLDP MIB change event handling by cleaning up workarounds and print the DCB configuration changes detected. Brett fixes the driver to handle failures in the VF reset path, which was failing to free resources upon an error. Richard fixed the reported of stats via ethtool to align with our other Intel drivers. Jesse optimizes the transmit buffer and ring structures to have more efficient ordering to get hot cache lines to have packed data. Also optimized the VF structure to use less memory, since it is used hundreds of times throughout the driver. ==================== Signed-off-by:
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- 23 May, 2019 4 commits
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Bruce Allan authored
Recent versions of sparse warn about casting pointers to/from restricted endian types in the Linux driver. Silence those with the compiler attribute __force macro from the Linux kernel to force casts to/from restricted endian types. Signed-off-by:
Bruce Allan <bruce.w.allan@intel.com> Signed-off-by:
Anirudh Venkataramanan <anirudh.venkataramanan@intel.com> Tested-by:
Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by:
Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Brett Creeley authored
Currently the driver is calling ice_napi_del() and then unregister_netdev(). The call to unregister_netdev() will result in a call to ice_stop() and then ice_vsi_close(). This is where we call napi_disable() for all the MSI-X vectors. This flow is reversed so make the changes to ensure napi_disable() happens prior to napi_del(). Before calling napi_del() and free_netdev() make sure unregister_netdev() was called. This is done by making sure the __ICE_DOWN bit is set in the vsi->state for the interested VSI. Signed-off-by:
Brett Creeley <brett.creeley@intel.com> Signed-off-by:
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Jesse Brandeburg authored
The ice_vf struct can be used hundreds of times in our driver so it pays to use less memory per struct. ice_vf prior to this commit: /* size: 112, cachelines: 2, members: 25 */ /* sum members: 101, holes: 4, sum holes: 8 */ /* bit holes: 2, sum bit holes: 11 bits */ /* padding: 3 */ /* last cacheline: 48 bytes */ ice_vf after this commit: /* size: 104, cachelines: 2, members: 25 */ /* sum members: 100, holes: 3, sum holes: 4 */ /* bit holes: 1, sum bit holes: 3 bits */ /* last cacheline: 40 bytes */ Signed-off-by:
Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by:
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Jesse Brandeburg authored
We can use bit fields to store boolean values and when the bit fields are next to each other, the compiler will combine them (as long as the size holds enough). Signed-off-by:
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