1. 30 Aug, 2013 7 commits
    • Alex Deucher's avatar
      drm/radeon: default to 1024M gart size on rv770+ · edcd26e8
      Alex Deucher authored
      Newer asics have a lot of vram so it's less of an
      issue to waste a little more space for the gart
      page table.  This gives us some additional gart space
      before having to migrate to non-gart system ram
      for games, etc. where we use up most of vram.
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      edcd26e8
    • Alex Deucher's avatar
      drm/radeon/dpm: rework thermal state handling · 60320347
      Alex Deucher authored
      1. Handle the the thermal state directly in the work handler.
      Remove the state selection function since nothing else uses it now.
      2. On some asics there is no thermal state, so we just use a regular
      state and force the low performance state.
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      60320347
    • Alex Deucher's avatar
      drm/radeon/dpm: use multiple UVD power states (v3) · ce3537d5
      Alex Deucher authored
      Use the UVD handle information to determine which
      which power states to select when using UVD.  For
      example, decoding a single SD stream requires much
      lower clocks than multiple HD streams.
      
      v2: switch to a cleaner dpm/uvd interface
      v3: change the uvd power state while streams
      are active if need be
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      ce3537d5
    • Alex Deucher's avatar
      drm/radeon: add UVD->DPM helper function (v5) · 85a129ca
      Alex Deucher authored
      Add a helper function for counting the number of open stream handles.
      
      v2: fix copy-pasta in comments and whitespace error
      v3: make function static since it's only used in radeon_uvd.c
      at the moment
      v4: make non-static again for future changes
      v5: make static again for new rework of dpm uvd changes
      Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      85a129ca
    • Alex Deucher's avatar
      drm/radeon/kms: remove r6xx+ blit copy routines · 4f862967
      Alex Deucher authored
      No longer used now that we use the async dma engines or
      CP DMA for bo copies.
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      4f862967
    • Alex Deucher's avatar
      drm/radeon: switch r6xx+ to using CP DMA for the blit copy callback · 8dddb993
      Alex Deucher authored
      CP DMA is lighter weight than using the 3D engine.
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      8dddb993
    • Alex Deucher's avatar
      drm/edid: add quirk for Medion MD30217PG · 118bdbd8
      Alex Deucher authored
      This LCD monitor (1280x1024 native) has a completely
      bogus detailed timing (640x350@70hz).  User reports that
      1280x1024@60 has waves so prefer 1280x1024@75.
      
      Manufacturer: MED  Model: 7b8  Serial#: 99188
      Year: 2005  Week: 5
      EDID Version: 1.3
      Analog Display Input,  Input Voltage Level: 0.700/0.700 V
      Sync:  Separate
      Max Image Size [cm]: horiz.: 34  vert.: 27
      Gamma: 2.50
      DPMS capabilities: Off; RGB/Color Display
      First detailed timing is preferred mode
      redX: 0.645 redY: 0.348   greenX: 0.280 greenY: 0.605
      blueX: 0.142 blueY: 0.071   whiteX: 0.313 whiteY: 0.329
      Supported established timings:
      720x400@70Hz
      640x480@60Hz
      640x480@72Hz
      640x480@75Hz
      800x600@56Hz
      800x600@60Hz
      800x600@72Hz
      800x600@75Hz
      1024x768@60Hz
      1024x768@70Hz
      1024x768@75Hz
      1280x1024@75Hz
      Manufacturer's mask: 0
      Supported standard timings:
      Supported detailed timing:
      clock: 25.2 MHz   Image Size:  337 x 270 mm
      h_active: 640  h_sync: 688  h_sync_end 784 h_blank_end 800 h_border: 0
      v_active: 350  v_sync: 350  v_sync_end 352 v_blanking: 449 v_border: 0
      Monitor name: MD30217PG
      Ranges: V min: 56 V max: 76 Hz, H min: 30 H max: 83 kHz, PixClock max 145 MHz
      Serial No: 501099188
      EDID (in hex):
                00ffffffffffff0034a4b80774830100
                050f010368221b962a0c55a559479b24
                125054afcf00310a0101010101018180
                000000000000d60980a0205e63103060
                0200510e1100001e000000fc004d4433
                3032313750470a202020000000fd0038
                4c1e530e000a202020202020000000ff
                003530313039393138380a2020200078
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      Reported-by: friedrich@mailstation.de
      Cc: stable@vger.kernel.org
      118bdbd8
  2. 29 Aug, 2013 3 commits
  3. 26 Aug, 2013 1 commit
  4. 25 Aug, 2013 4 commits
  5. 24 Aug, 2013 8 commits
  6. 23 Aug, 2013 17 commits