- 19 Jun, 2021 40 commits
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Ryder Lee authored
Fix wrong offset for pre-calibration data. Fixes: 495184ac ("mt76: mt7915: add support for applying pre-calibration data") Signed-off-by:
Ryder Lee <ryder.lee@mediatek.com> Signed-off-by:
Felix Fietkau <nbd@nbd.name>
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Ryder Lee authored
Patch radar parameters to match the SDK to avoid possible false alarms. Signed-off-by:
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Ryder Lee authored
This is a prerequisite for MU functionality. Tested-by:
Evelyn Tsai <evelyn.tsai@mediatek.com> Signed-off-by:
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Deren Wu authored
Enable src address randomization during scheduled scanning Co-developed-by:
Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by:
Deren Wu <deren.wu@mediatek.com> Signed-off-by:
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Lorenzo Bianconi authored
Since now the fw reports tx rate events without polling, mt7921_get_wtbl_info and related structures are no longer used. Signed-off-by:
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Lorenzo Bianconi authored
Enable wep key hw offloading for sta mode. This patch fixes WoW support for wep connections. Tested-by:
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Shayne Chen authored
If efuse mode is used, read all values from fw during eeprom init, which makes it more convinient to check if rf values in efuse are properly burned. Signed-off-by:
Shayne Chen <shayne.chen@mediatek.com> Signed-off-by:
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Ryder Lee authored
Firmware functions (SCS, MU ...) also require read-clear phy counters, hence firmware prepares a global task to read shared fields out to a shared pool to avoid concurrency. Switch to event format accordingly. Signed-off-by:
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Lorenzo Bianconi authored
Set MT76_RESET during mt7921_mac_reset in order to avoid packet transmissions. Move tx scheduling at the end of reset routine. Signed-off-by:
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Felix Fietkau authored
- Remove no-op code for queue lock/unlock, which is no longer needed - Set a missing DMA flag - Wait for full completion of error recovery before restarting tx - Schedule IRQ tasklet to ensure that IRQ mask gets written Signed-off-by: -
Lorenzo Bianconi authored
Move wiphy interface_modes configuration in mt76_alloc_device and mt76_alloc_phy in order to be overwritten by hw specific code since some drivers do not support all operating modes (mt7921 supports sta only in the current codebase) Signed-off-by:
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Deren Wu authored
wakeup chip every 250ms may cause huge power consumption try to update statistic counter only if in active status only, and it would lead fewer power cost Signed-off-by:
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Deren Wu authored
Instead of read tx status from mac table, add new mechanisam to hanele tx done event for data frame, every 250ms This event indicate the real tx status of this pkt in mac layer and would help mac80211 correct status more frequently Signed-off-by:
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Ryder Lee authored
Fix the following static checker warning: error: undefined (user controlled) shift '(((1))) << (c->omac_idx)' Fixes: 402a695b ("mt76: mt7615: fix CSA notification for DBDC") Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Lorenzo Bianconi authored
Get rid of an undefined behaviour in mt76_testmode_alloc_skb routine allocating skb frames Fixes: 2601dda8 ("mt76: testmode: add support to send larger packet") Signed-off-by:
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Lorenzo Bianconi authored
Get rid of unnecessary function calls in mt76_testmode_free_skb routine since they are already managed by dev_kfree_skb Signed-off-by:
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Lorenzo Bianconi authored
Free all pending frames in case of failure in mt76_testmode_alloc_skb routine Fixes: 2601dda8 ("mt76: testmode: add support to send larger packet") Signed-off-by:
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Lorenzo Bianconi authored
Get rid of unnecessary if condition in mt7615_add_interface routine Signed-off-by:
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Shayne Chen authored
Get per-rate txpower with mcu command. This is the preparation of co-driver for the next chipset, which has different tmac power registers but can share this same command. Signed-off-by:
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Ryder Lee authored
It's much more accurate than .get_tsf + .set_tsf and switch to use mt76_rmw to operate tsf registers. Signed-off-by:
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Ryder Lee authored
It's much more accurate than .get_tsf + .set_tsf, and switch to use mt76_rmw to operate tsf registers. Tested-by:
Xing Song <xing.song@mediatek.com> Signed-off-by:
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Lorenzo Bianconi authored
This patch fixes a mcu hang during device probe on Marvell ESPRESSObin after a hot reboot. Signed-off-by:
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Lorenzo Bianconi authored
Do not schedule hw full reset if the device is not fully initialized (e.g if the channel has not been configured yet). This patch fixes the kernel crash reported below [ 44.440266] mt7921e 0000:01:00.0: chip reset failed [ 44.527575] Unable to handle kernel paging request at virtual address ffffffc02f3e0000 [ 44.535771] Mem abort info: [ 44.538646] ESR = 0x96000006 [ 44.541792] EC = 0x25: DABT (current EL), IL = 32 bits [ 44.547268] SET = 0, FnV = 0 [ 44.550413] EA = 0, S1PTW = 0 [ 44.553648] Data abort info: [ 44.556613] ISV = 0, ISS = 0x00000006 [ 44.560563] CM = 0, WnR = 0 [ 44.563619] swapper pgtable: 4k pages, 39-bit VAs, pgdp=0000000000955000 [ 44.570530] [ffffffc02f3e0000] pgd=100000003ffff003, p4d=100000003ffff003, pud=100000003ffff003, pmd=0000000000000000 [ 44.581489] Internal error: Oops: 96000006 [#1] SMP [ 44.606406] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 5.13.0-rc1-espressobin-12875-g6dc7f82ebc26 #33 [ 44.617264] Hardware name: Globalscale Marvell ESPRESSOBin Board (DT) [ 44.623905] pstate: 600000c5 (nZCv daIF -PAN -UAO -TCO BTYPE=--) [ 44.630100] pc : __queue_work+0x1f0/0x500 [ 44.634249] lr : __queue_work+0x1e8/0x500 [ 44.638384] sp : ffffffc010003d70 [ 44.641798] x29: ffffffc010003d70 x28: 0000000000000000 x27: ffffff8003989200 [ 44.649166] x26: ffffffc010c08510 x25: 0000000000000002 x24: ffffffc010ad90b0 [ 44.656533] x23: ffffffc010c08508 x22: 0000000000000012 x21: 0000000000000000 [ 44.663899] x20: ffffff8006385238 x19: ffffffc02f3e0000 x18: 00000000000003c9 [ 44.671266] x17: 0000000000000000 x16: 0000000000000000 x15: 000009b1a8a3bf90 [ 44.678632] x14: 0098968000000000 x13: 0000000000000000 x12: 0000000000000325 [ 44.685998] x11: ffffff803fda1928 x10: 0000000000000001 x9 : ffffffc010003e98 [ 44.693365] x8 : 0000000000000032 x7 : fff8000000000000 x6 : 0000000000000035 [ 44.700732] x5 : 0000000000000000 x4 : 0000000000000000 x3 : ffffffc010adf700 [ 44.708098] x2 : ffffff8006385238 x1 : 000000007fffffff x0 : 0000000000000000 [ 44.715465] Call trace: [ 44.717982] __queue_work+0x1f0/0x500 [ 44.721760] delayed_work_timer_fn+0x18/0x20 [ 44.726167] call_timer_fn+0x2c/0x178 [ 44.729947] run_timer_softirq+0x488/0x5c8 [ 44.734172] _stext+0x11c/0x378 [ 44.737411] irq_exit+0x100/0x108 [ 44.740830] __handle_domain_irq+0x60/0xb0 [ 44.745059] gic_handle_irq+0x70/0x2b4 [ 44.748929] el1_irq+0xb8/0x13c [ 44.752167] arch_cpu_idle+0x14/0x30 [ 44.755858] default_idle_call+0x38/0x168 [ 44.759994] do_idle+0x1fc/0x210 [ 44.763325] cpu_startup_entry+0x20/0x58 [ 44.767372] rest_init+0xb8/0xc8 [ 44.770703] arch_call_rest_init+0xc/0x14 [ 44.774841] start_kernel+0x408/0x424 [ 44.778623] Code: aa1403e0 97fff54f aa0003f5 b5fff500 (f9400275) [ 44.784907] ---[ end trace be73c3142d8c36a9 ]--- [ 44.789668] Kernel panic - not syncing: Oops: Fatal exception in interrupt Fixes: 0c1ce988 ("mt76: mt7921: add wifi reset support") Signed-off-by:
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Lorenzo Bianconi authored
Return possible error values in mt7921_mac_init routine Signed-off-by:
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YN Chen authored
Add bss color support for sta mode Signed-off-by:
Jayden.Kuo <jayden.kuo@mediatek.com> Signed-off-by:
YN Chen <yn.chen@mediatek.com> Signed-off-by:
Sean Wang <sean.wang@mediatek.com> Signed-off-by:
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Lorenzo Bianconi authored
mt7921 is mainly used in CE/IoT market so enable runtime-pm by default Signed-off-by:
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Sean Wang authored
OMAC idx have to be same with BSS idx according to firmware usage. Fixes: e0f9fdda ("mt76: mt7921: add ieee80211_ops") Reviewed-by:
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Sean Wang authored
Make sure mt7921_pm_wake_work wouldn't be scheduled after the driver is in suspend mode to fix the following the kernel crash. [ 3515.390012] mt7921e 0000:01:00.0: calling pci_pm_suspend+0x0/0x22c @ 2869, parent: 0000:00:00.0 [ 3515.390015] mt7921e 0000:01:00.0: mt7921_pci_suspend + [ 3515.396395] anx7625 3-0058: anx7625_suspend+0x0/0x6c returned 0 after 0 usecs [ 3515.405965] mt7921e 0000:01:00.0: mt7921_pci_suspend - [ 3515.411336] usb 1-1.4: usb_dev_suspend+0x0/0x2c returned 0 after 1 usecs [ 3515.411513] SError Interrupt on CPU7, code 0xbe000011 -- SError [ 3515.411515] CPU: 7 PID: 2849 Comm: kworker/u16:27 Not tainted 5.4.114 #44 [ 3515.411516] Hardware name: MediaTek Asurada rev1 board (DT) [ 3515.411517] Workqueue: mt76 mt7921_pm_wake_work [mt7921e] [ 3515.411518] pstate: 80c00009 (Nzcv daif +PAN +UAO) [ 3515.411519] pc : mt76_mmio_rr+0x30/0xf0 [mt76] [ 3515.411520] lr : mt7921_rr+0x38/0x44 [mt7921e] [ 3515.411520] sp : ffffffc015813c50 [ 3515.411521] x29: ffffffc015813c50 x28: 0000000000000402 [ 3515.411522] x27: ffffffe5a2012138 x26: ffffffe5a1eea018 [ 3515.411524] x25: 00000000328be505 x24: 00000000000a0002 [ 3515.411525] x23: 0000000000000006 x22: ffffffbd29b7a300 [ 3515.411527] x21: ffffffbd29b7a300 x20: 00000000000e0010 [ 3515.411528] x19: 00000000eac08f43 x18: 0000000000000000 [ 3515.411529] x17: 0000000000000000 x16: ffffffe5a16b2914 [ 3515.411531] x15: 0000000000000010 x14: 0000000000000010 [ 3515.411532] x13: 00000000003dd3a2 x12: 0000000000010000 [ 3515.411533] x11: ffffffe597abec14 x10: 0000000000000010 [ 3515.411535] x9 : ffffffe597abeba8 x8 : ffffffc013ce0010 [ 3515.411536] x7 : 000000b2b5593519 x6 : 0000000000300000 [ 3515.411537] x5 : 0000000000000000 x4 : 0000000000000032 [ 3515.411539] x3 : 0000000000000000 x2 : 0000000000000004 [ 3515.411540] x1 : 00000000000e0010 x0 : ffffffbd29b7a300 [ 3515.411542] Kernel panic - not syncing: Asynchronous SError Interrupt [ 3515.411543] CPU: 7 PID: 2849 Comm: kworker/u16:27 Not tainted 5.4.114 #44 [ 3515.411544] Hardware name: MediaTek Asurada rev1 board (DT) [ 3515.411544] Workqueue: mt76 mt7921_pm_wake_work [mt7921e] [ 3515.411545] Call trace: [ 3515.411546] dump_backtrace+0x0/0x14c [ 3515.411546] show_stack+0x20/0x2c [ 3515.411547] dump_stack+0xa0/0xfc [ 3515.411548] panic+0x154/0x350 [ 3515.411548] panic+0x0/0x350 [ 3515.411549] arm64_serror_panic+0x78/0x84 [ 3515.411550] do_serror+0x0/0x118 [ 3515.411550] do_serror+0xa4/0x118 [ 3515.411551] el1_error+0x84/0xf8 [ 3515.411552] mt76_mmio_rr+0x30/0xf0 [mt76] [ 3515.411552] mt7921_rr+0x38/0x44 [mt7921e] [ 3515.411553] __mt76_poll_msec+0x5c/0x9c [mt76] [ 3515.411554] __mt7921_mcu_drv_pmctrl+0x50/0x94 [mt7921e] [ 3515.411555] mt7921_mcu_drv_pmctrl+0x38/0xb0 [mt7921e] [ 3515.411555] mt7921_pm_wake_work+0x34/0xd4 [mt7921e] [ 3515.411556] process_one_work+0x208/0x3c8 [ 3515.411557] worker_thread+0x23c/0x3e8 [ 3515.411557] kthread+0x144/0x178 [ 3515.411558] ret_from_fork+0x10/0x18 [ 3515.418831] SMP: stopping secondary CPUs [ 3515.418832] Kernel Offset: 0x2590c00000 from 0xffffffc010000000 [ 3515.418832] PHYS_OFFSET: 0xffffffc400000000 [ 3515.418833] CPU features: 0x080026,2a80aa18 [ 3515.418834] Memory Limit: none [DL] 00000000 00000000 010701 Fixes: 1d8efc74 ("mt76: mt7921: introduce Runtime PM support") Co-developed-by:
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Sean Wang authored
Avoid unnecessary consecutive WiFi resets by dropping reset request when reset work is working. Co-developed-by:
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Deren Wu authored
Update BA size used data transimission in the Rx direction to improve Rx throughput. Reviewed-by:
Leon Yen <leon.yen@mediatek.com> Signed-off-by:
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Ryder Lee authored
Similar to mt7915, switching to use standard hwmon sysfs. For reading temperature, cat /sys/class/ieee80211/phy*/hwmon*/temp1_input Signed-off-by:
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Ryder Lee authored
Thermal cooling device support is added to control the temperature by throttling the data transmission for the given duration. Throttling is done by adjusting Tx period by given percentage of time. The thermal device allows user to configure duty cycle. Throttling can be disabled by setting the duty cycle to 0. The cooling device can be found under /sys/class/thermal/cooling_deviceX/. Corresponding soft link to this device can be found under phy folder To set duty cycle as 80%, echo 80 > /sys/class/ieee80211/phy*/cooling_device/cur_state Signed-off-by:
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Ryder Lee authored
This provides userspace with a unified interface, hwmon sysfs, to monitor temperature in the hardware and can be adapted to system monitoring tools. For reading temperature, cat /sys/class/ieee80211/phy*/hwmon*/temp1_input Signed-off-by:
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Sean Wang authored
Hw beacon cmd to the mt7921 firmware doesn't only filter out the beacon, but also performs its own connection monitoring, including periodic keep-alives to the AP and probing the AP on beacon loss. Will indicate the host with the event when the firmware detects the connection is lost. Fixes: 1d8efc74 ("mt76: mt7921: introduce Runtime PM support") Reviewed-by:
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Sean Wang authored
It is possible the RCPI from the certain antenna is an invalid value, especially packets are receiving while the system is frequently entering deep sleep mode, so consider calculating RSSI with the reasonable upper bound to avoid report the wrong value to the mac80211 layer. Fixes: 163f4d22 ("mt76: mt7921: add MAC support") Reviewed-by:
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YN Chen authored
Update MCU command usage to fix WoW configuration with disconnection and bitmap pattern and to avoid magic number. Fixes: ffa1bf97 ("mt76: mt7921: introduce PM support") Reviewed-by:
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Sean Wang authored
To fix possibly the race to access register between the WiFi reset and the other context that is caused by explicitly cancelling ps_work and wake_work to break PM_STATE consistency. Deep sleep would cause the hardware into the inactive state, so we forcely put device drv_own state before we start to reset. The patch also ignore the reset request when the procedure is in progress to avoid the consecutive WiFi resets. localhost ~ # [ 2932.073966] SError Interrupt on CPU7, code 0xbe000011 [ 2932.073967] CPU: 7 PID: 8761 Comm: kworker/u16:2 Not tainted 5.4.112 #30 [ 2932.073968] Hardware name: MediaTek Asurada rev1 board (DT) [ 2932.073968] Workqueue: phy0 ieee80211_reconfig_filter [mac80211] [ 2932.073969] pstate: 80400089 (Nzcv daIf +PAN -UAO) [ 2932.073969] pc : el1_irq+0x78/0x180 [ 2932.073970] lr : mt76_mmio_rmw+0x30/0x5c [mt76] [ 2932.073970] sp : ffffffc01142bad0 [ 2932.073970] x29: ffffffc01142bc00 x28: ffffff8f96fb1e00 [ 2932.073971] x27: ffffffd2cdc12138 x26: ffffffd2cdaeb018 [ 2932.073972] x25: 0000000000000000 x24: ffffff8fa8e14c08 [ 2932.073973] x23: 0000000080c00009 x22: ffffffd2a5603918 [ 2932.073974] x21: ffffffc01142bc10 x20: 0000007fffffffff [ 2932.073975] x19: 0000000000000000 x18: 0000000000000400 [ 2932.073975] x17: 0000000000000400 x16: ffffffd2cd2b87dc [ 2932.073976] x15: 0000000000000000 x14: 0000000000000000 [ 2932.073977] x13: 0000000000000001 x12: 0000000000000001 [ 2932.073978] x11: 0000000000000001 x10: 000000000010e000 [ 2932.073978] x9 : 0000000000000000 x8 : ffffffc013921404 [ 2932.073979] x7 : 000000b2b5593519 x6 : 0000000000300000 [ 2932.073980] x5 : 0000000000000000 x4 : ffffffc01142bbc8 [ 2932.073980] x3 : 00000000000001f0 x2 : 0000000000000000 [ 2932.073981] x1 : 0000000000021404 x0 : ffffff8fa8e12300 [ 2932.073982] Kernel panic - not syncing: Asynchronous SError Interrupt [ 2932.073983] CPU: 7 PID: 8761 Comm: kworker/u16:2 Not tainted 5.4.112 #30 [ 2932.073983] Hardware name: MediaTek Asurada rev1 board (DT) [ 2932.073984] Workqueue: phy0 ieee80211_reconfig_filter [mac80211] [ 2932.073984] Call trace: [ 2932.073985] dump_backtrace+0x0/0x14c [ 2932.073985] show_stack+0x20/0x2c [ 2932.073985] dump_stack+0xa0/0xf8 [ 2932.073986] panic+0x154/0x360 [ 2932.073986] test_taint+0x0/0x44 [ 2932.073986] arm64_serror_panic+0x78/0x84 [ 2932.073987] do_serror+0x0/0x118 [ 2932.073987] do_serror+0xa4/0x118 [ 2932.073987] el1_error+0x84/0xf8 [ 2932.073988] el1_irq+0x78/0x180 [ 2932.073988] mt76_mmio_rr+0x30/0xf0 [mt76] [ 2932.073988] mt76_mmio_rmw+0x30/0x5c [mt76] [ 2932.073989] mt7921_rmw+0x4c/0x5c [mt7921e] [ 2932.073989] mt7921_configure_filter+0x138/0x160 [mt7921e] [ 2932.073990] ieee80211_configure_filter+0x2f0/0x3e0 [mac80211] [ 2932.073990] ieee80211_reconfig_filter+0x1c/0x28 [mac80211] [ 2932.073990] process_one_work+0x208/0x3c8 [ 2932.073991] worker_thread+0x23c/0x3e8 [ 2932.073991] kthread+0x140/0x17c [ 2932.073992] ret_from_fork+0x10/0x18 [ 2932.074071] SMP: stopping secondary CPUs [ 2932.074071] Kernel Offset: 0x12bc800000 from 0xffffffc010000000 [ 2932.074072] PHYS_OFFSET: 0xfffffff180000000 [ 2932.074072] CPU features: 0x080026,2a80aa18 [ 2932.074072] Memory Limit: none Co-developed-by:
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Sean Wang authored
If the device is MMIO-based, we must ensure all TxD/TxP on the host memory all being consumed by the device prior to safely switching to fw_own state. Fixes: ec7bd7b4 ("mt76: connac: check wake refcount in mcu_fw_pmctrl") Reviewed-by:
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Sean Wang authored
Keep Rx path classifier the mt7921 firmware prefers to allow frames pass through MCU. Fixes: 5c14a5f9 ("mt76: mt7921: introduce mt7921e support") Reviewed-by:
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Sean Wang authored
WiFi subsytem reset should control MT_WFSYS_SW_RST_B and then poll the same register until the bit WFSYS_SW_INIT_DONE bit is set. Fixes: 0c1ce988 ("mt76: mt7921: add wifi reset support") Reviewed-by:
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