- 28 Oct, 2022 6 commits
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Iskren Chernev authored
Add initial support for OnePlus Nord N100, based on SM4250. Currently working: - boots - usb - built-in flash storage (UFS) - SD card reader Signed-off-by:
Iskren Chernev <iskren.chernev@gmail.com> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220919180618.1840194-9-iskren.chernev@gmail.com
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Iskren Chernev authored
The SM4250 is a downclocked version of the SM6115. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Iskren Chernev authored
Add support for Qualcomm SM6115 SoC. This includes: - GCC - Pinctrl - RPM (CC+PD) - USB - MMC - UFS Signed-off-by:
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Iskren Chernev authored
oneplus,billie2 (OnePlus Nord N100) is based on QualComm Snapdragon SM4250 SoC. Add support for the same in dt-bindings. Signed-off-by:
Caleb Connolly <caleb@connolly.tech> Signed-off-by:
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Johan Hovold authored
Add the TCSR node which is needed for PCIe configuration. Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
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Nikita Travkin authored
Both a2015 devices use motor drivers controlled with PWM signal. A5 additionally has a fixed regulator that powers the driver and is controlled by enable signal. A3 routes that enable signal to the motor driver itself. To simplify the description, add the motor to the common dtsi and assume a regulator is used for both. Signed-off-by:
Nikita Travkin <nikita@trvn.ru> [Rename the nodes to be reusable in msm8916-sansung-e2015] Signed-off-by:
Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by:
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- 20 Oct, 2022 1 commit
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Bryan O'Donoghue authored
The documented yaml compat string for the apq8016 is "qcom,apq8016-lpass-cpu" not "qcom,lpass-cpu-apq8016". Looking at the other lpass compat strings the general form is "qcom,socnum-lpass-cpu". We need to fix both the driver and dts to match. Signed-off-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by:
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- 18 Oct, 2022 33 commits
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Vladimir Lypak authored
Add the MDSS, MDP and DSI nodes that are found on msm8953 SoC. Signed-off-by:
Vladimir Lypak <vladimir.lypak@gmail.com> Signed-off-by:
Luca Weiss <luca@z3ntu.xyz> Signed-off-by:
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Vladimir Lypak authored
Add the nodes describing the iommu and its context banks that are found on msm8953 SoCs. Signed-off-by:
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Caleb Connolly authored
Some devices have been using hsuart0 as an alias for the bluetooth UART, rename this to serial1 Signed-off-by:
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Dylan Van Assche authored
Add serial1 alias, firmware name and use 4 pin UART pinmux. Signed-off-by:
Dylan Van Assche <me@dylanvanassche.be> Signed-off-by:
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Caleb Connolly authored
The 4-pin configuration for UART6 is used for all or almost all SDM845 devices with built in Bluetooth. Move the pinmux configuration to sdm845.dtsi in preparation to be removed from individual devices in future patches. Suggested-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Luca Weiss authored
The bindings require a SoC-specific compatible to be used next to qcom,cpufreq-epss. Add it to make dtbs_check happy. Signed-off-by:
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Krzysztof Kozlowski authored
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Krzysztof Kozlowski authored
There is no "normal" function, so use "gpio" for backlight button pin configuration. Signed-off-by:
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Krzysztof Kozlowski authored
Qualcomm pinctrl bindings and drivers expect gpio-ranges property. Signed-off-by:
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Luca Weiss authored
This ufs_variant node seems to be a remnant from downstream devicetree. As it doesn't seem to be used by anything upstream, remove it from the dtsi. Signed-off-by:
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Krzysztof Kozlowski authored
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. All nodes for GPIOs must also define the function property. Signed-off-by:
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Krzysztof Kozlowski authored
The I2C8 pins are split into i2c8_a (GPIO30 and GPIO31) and i2c8_b (GPIO44 and GPIO52). Correct the name of function for I2C8 pins. Signed-off-by:
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Krzysztof Kozlowski authored
Configure UART1 and UART2 pins to respective functions in default state, otherwise the pins might stay as GPIOs. Signed-off-by:
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Dmitry Torokhov authored
According to s3fwrn5 driver code the "enable" GPIO line is driven "high" when chip is not in use (mode is S3FWRN5_MODE_COLD), and is driven "low" when chip is in use. s3fwrn5_phy_power_ctrl(): ... gpio_set_value(phy->gpio_en, 1); ... if (mode != S3FWRN5_MODE_COLD) { msleep(S3FWRN5_EN_WAIT_TIME); gpio_set_value(phy->gpio_en, 0); msleep(S3FWRN5_EN_WAIT_TIME); } Therefore the line described by "en-gpios" property should be annotated as "active low". The wakeup gpio appears to have correct polarity (active high). Signed-off-by:Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by:
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Krzysztof Kozlowski authored
Compatibles can come in two formats. Either "vendor,ip-soc" or "vendor,soc-ip". Qualcomm bindings were mixing both of usages, so add a DT schema file documenting preferred policy and enforcing it for all new compatibles, except few existing patterns. Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
New slimbus DT schema expect only SLIMbus bus nodes to be named "slimbus". In case of Qualcomm SLIMbus NGD, the bus node is what was called "ngd". Signed-off-by:
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Krzysztof Kozlowski authored
New slimbus DT schema expect only SLIMbus bus nodes to be named "slimbus". In case of Qualcomm SLIMbus NGD, the bus node is what was called "ngd". Signed-off-by:
Steev Klimaszewski <steev@kali.org> Signed-off-by:
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Krzysztof Kozlowski authored
Bindings document only two DMA channels. Linux driver also does not use remaining rx2/tx2. Signed-off-by:
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Krzysztof Kozlowski authored
Bindings document only two DMA channels. Linux driver also does not use remaining rx2/tx2. Signed-off-by:
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Krzysztof Kozlowski authored
Correct slimbus address/size cells to match bindings. Signed-off-by:
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Krzysztof Kozlowski authored
slimbus uses address-cells=2, so correct children unit addresses. Signed-off-by:
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Krzysztof Kozlowski authored
Drop undocumented reg-names from slimbus node - there is only one address range and Linux implementation does not use it. Signed-off-by:
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Krzysztof Kozlowski authored
Drop properties from slimbus node: unneeded status and downstream-related qcom,apps-ch-pipes/qcom,ea-pc (not documented, not used). Signed-off-by:
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Robert Marko authored
Use "okay" instead of "ok" in USB nodes as "ok" is deprecated. Signed-off-by:
Robert Marko <robimarko@gmail.com> Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
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Robert Marko authored
bootargs-append is a leftover from the vendor SDK, and does not exist in the mainline kernel at all, so remove it. Signed-off-by:
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Robert Marko authored
The ARM timer is usually considered not part of SoC node, just like other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: -
Robert Marko authored
Per schema it should be nand-controller@79b0000 instead of nand@79b0000. Fix it to match nand-controller.yaml requirements. Signed-off-by:
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Dmitry Baryshkov authored
Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by:
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Dmitry Baryshkov authored
Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by:
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Dmitry Baryshkov authored
Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by:
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Dmitry Baryshkov authored
Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by:
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Dmitry Baryshkov authored
Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by:
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Dmitry Baryshkov authored
Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by:
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