- 20 Jun, 2013 2 commits
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git://git.linaro.org/people/shawnguo/linux-2.6Arnd Bergmann authored
This is a dependency for imx/dt Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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git://git.linaro.org/people/shawnguo/linux-2.6Arnd Bergmann authored
From Shawn Guo: mxs device tree changes for 3.11: * A couple of new board support, cfa10055 and cfa10057 * A few updates on cfa10036 device tree source * Some auart pinctrl data addition * Adopt soc bus infrastructure for mach-mxs * tag 'mxs-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs: dt: Add Crystalfontz CFA-10057 device tree ARM: mxs: dt: Add the Crystalfontz CFA-10055 device tree ARM: cfa10049: Switch the chip select pin of the LCD controller ARM: cfa10036: Add USB0 OTG port ARM: dts: apf28dev: Add touchscreen support for APF28dev ARM: mxs: Fix UARTs on M28EVK ARM: cfa10036: dt: Change i2c0 clock frequency ARM: dts: cfa10036: Change the OLED display to SSD1306 ARM: mx28: add auart4 2 pins pinmux to imx28.dtsi ARM: mx28: add auart3 2 pins pinmux to imx28.dtsi ARM: mx28: add auart2 2 pins pinmux to imx28.dtsi ARM: mxs: Use soc bus infrastructure ARM: dts: mx28: Adjust the digctl compatible string ARM: mxs: Remove init_irq declaration in machine description Includes an update to 3.10-rc6 Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- 19 Jun, 2013 1 commit
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git://git.xilinx.com/linux-xlnxArnd Bergmann authored
From Michal Simek: arm: Xilinx Zynq dt changes for v3.11 The branch contains: - DT uart handling cleanup - Support for zc706 and zed board - Removal of board compatible string * tag 'zynq-dt-for-3.11' of git://git.xilinx.com/linux-xlnx: arm: dt: zynq: Add support for the zed platform arm: dt: zynq: Add support for the zc706 platform arm: dt: zynq: Use 'status' property for UART nodes arm: zynq: Remove board specific compatibility string clk: zynq: Remove deprecated clock code arm: zynq: Migrate platform to clock controller clk: zynq: Add clock controller driver clk: zynq: Factor out PLL driver Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- 17 Jun, 2013 37 commits
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Soren Brinkmann authored
Add a DT fragment for the Zed Zynq platform and a corresponding target to the Makefile Signed-off-by:
Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Soren Brinkmann authored
Add a DT fragment for the zc706 Zynq platform and a corresponding target to the Makefile. Signed-off-by:
Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Soren Brinkmann authored
Set the default status for UARTs to disabled in the zynq-7000.dtsi file and let board dts files enable the UARTs on demand. Signed-off-by:
Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Soren Brinkmann authored
It is not necessary to have board specific compatibility strings in the platform code. The board dts files can use the more generic 'xlnx,zynq-7000' string. Signed-off-by:
Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Fabio Estevam authored
Let VF610 SoC support be built by default. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
Enable imx-wm8962 and PM_RUNTIME, essential for WM8962 CODEC driver. Signed-off-by:
Nicolin Chen <b42378@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
WM8962 needs 24MHz clock for its MCLK, so choose PLL4 as the parent of clko1. Signed-off-by:
Nicolin Chen <b42378@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
These options are useful for controlling backlight contrast via PWM. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Markus Pargmann authored
There are ulpi access ops implemented in drivers/usb/phy/phy-ulpi.c. mxc access ops implement the same access operations within mach-imx. This patch removes the mxc ulpi file and uses phy-ulpi instead for imx_otg_ulpi_create. phy-ulpi successfully tested with i.MX27 Phytec phyCARD-S (pca100). Signed-off-by:
Markus Pargmann <mpa@pengutronix.de> Acked-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Jingchang Lu authored
Add initial support for Freescale Vybrid VF610 SoC. Signed-off-by:
Jingchang Lu <b35083@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Jingchang Lu authored
Add clock support for Vybrid VF610. It uses dtc macro support to define all clock IDs in vf610-clock.h to keep clock IDs coherence between kernel and DT. Signed-off-by:
Jingchang Lu <b35083@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Rogerio Pimentel authored
Enable paralell display by default Signed-off-by:
Rogerio Pimentel <rogerio.pimentel@freescale.com> Acked-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
commit 84344b43c (ARM: i.MX5: Allow DT clock providers) introduce the following sparse warning: arch/arm/mach-imx/clk.c:12:43: warning: Using plain integer as NULL pointer There is no need to initialize phandle, so remove it. Cc: Martin Fuzzey <mfuzzey@parkeon.com> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Fix the following sparse warning: arch/arm/mach-imx/irq-common.c:24:5: warning: symbol 'mxc_set_irq_fiq' was not declared. Should it be static? Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Instead of explicitly calling clock initialization functions, we can declare the functions with CLK_OF_DECLARE() and then call common of_clk_init() to have them invoked properly. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
As the fixed rate clocks are defined in device tree, we can just call of_clk_init() to register them. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Let the mx53 TVE driver be built by default. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Dirk Behme authored
The CCM_CBCMR register (address 0x02C4018) has different meaning between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite. Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the i.MX6 Solo/DualLite reuses the gpu2d_core bits for the MLB clock configuration. Signed-off-by:
Dirk Behme <dirk.behme@gmail.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Philipp Zabel authored
This patch adds the S/PDIF clocks for i.MX51 and i.MX53. Tested on i.MX53. The i.MX51 has a second set of spdif_root clock dividers, and on i.MX53 there is an additional input to the spdif_xtal mux. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
Add the eim_slow clock, since the weim needs it. Signed-off-by:
Huang Shijie <b32955@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Jiada Wang authored
MLB PLL should be handled internally in MLB driver, so remove it from pllv3. Signed-off-by:
Jiada Wang <jiada_wang@mentor.com> CC: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Jiada Wang authored
The MLB PLL clock's operation doesn't fit for clock framework and it should be handled internally in MLB driver. Remove initialization of pll8_mlb clock device but leave its declaration in mx6q_clks to avoid affecting imx6q clock numbering. Signed-off-by:
Jiada Wang <jiada_wang@mentor.com> CC: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Add initial support for i.MX6 SoloLite. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Enable low-level debug support for i.MX6 SoloLite by adding the debug port definitions for the SoC. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Add clock support for i.MX6 SoloLite. It uses the dtc marco support to define all clock IDs in imx6sl-clock.h, which will be included by both clock driver and device tree sources, so that the data will stay sync all the time between kernel and DT. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
The mxc_arch_reset_init() uses static mapping and calls clk_get_sys() to get clock. It's suitable for non-DT boot but not for DT boot where dynamic mapping and of_clk_get() should be used instead. Create mxc_arch_reset_init_dt() as the DT variant of mxc_arch_reset_init(), and change DT platforms to use it. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
It's inappropriate to call clk_prepare() in mxc_restart(), because the restart routine could be called in atomic context. Move clk_get() and clk_prepare() into mxc_arch_reset_init() and only have the atomic part clk_enable() be called in mxc_restart(). As a result, mxc_arch_reset_init() needs to be called after clk gets initialized. While there, it also changes printk(KERN_ERR ...) to pr_err() and adds __init annotation for mxc_arch_reset_init(). Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
As IOMEM is referenced in hardware.h, <asm/io.h> should be included there. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Dirk Behme authored
The CCM_CBCMR register (address 0x02C4018) has different meaning between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite. Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the i.MX6 Solo/DualLite doesn't have a gpu3d_shader configuration and moves the gpu2_core configuration at that place. Handle these i.MX6 Quad/Dual vs. i.MX6 Solo/DualLite clock differences by using cpu_is_mx6dl(). Signed-off-by:
Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Dirk Behme authored
To improve the performance and power consumption add an i.MX6 specific L2 cache initialization. This configuration is taken from Freescale's kernel patch "ENGR00153601 [MX6]Adjust L2 cache parameter" [1] with two additional improvements: a) The L2X0_POWER_CTRL has only the two bits we set. So no need to read the register before. Remove the register read done in Freescale's patch. b) In the L2X0_PREFETCH_CTRL register, besides the double linefill (bit[30]), additionally enable the instruction and data prefetch (bit[29-28]). Signed-off-by:
Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> [1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1
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Martin Fuzzey authored
Currently clock providers defined in the DT are not registered on i.MX5 platforms since of_clk_init() is not called. This is not a problem for the SOC's own clocks, which are registered in code, but prevents the DT being used to define clocks for external hardware. Fix this by calling of_clk_init() and actually using the DT to obtain the 4 SOC fixed clocks. These are already defined in the DT but were previously just used to manually obtain the rate. Fall back to the old scheme for non DT platforms. Since the same method may be useful for other i.MX platforms implement the imx_obtain_fixed_clock() function in common code. Actually changing other i.MX platforms to use this should be done later by someone with access to the appropriate hardware. Signed-off-by:
Martin Fuzzey <mfuzzey@parkeon.com> Tested-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Brian Lilly authored
The CFA-10057 is a breakout board for the CFA-10036 that has Ethernet, USB and a 4.3" LCD screen on it. Signed-off-by:
Brian Lilly <brian@crystalfontz.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Brian Lilly authored
The CFA-10055 is yet another breakout board for the CFA-10036, and is basically a CFA-10037, with the screen and LCD controller found on the CFA-10049. Signed-off-by:
Brian Lilly <brian@crystalfontz.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Brian Lilly authored
The early prototypes had the chip select pin for the LCD controller wired on the GPIO 3-23, while the production run of the CFA-10049 have this chip select on the GPIO 3-5. Signed-off-by:
Brian Lilly <brian@crystalfontz.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Maxime Ripard authored
Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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