- 14 Mar, 2010 2 commits
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Ben Skeggs authored
Intended to be used as a workaround in cases where we falsely detect that a TV is connected when it's not. Signed-off-by:Ben Skeggs <bskeggs@redhat.com>
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Francisco Jerez authored
VRAM->system is a synchronous operation: it involves scheduling a VRAM->TT DMA transfer and stalling the CPU until it's finished so that we can unbind the new memory from the translation tables. VRAM->TT can always be performed asynchronously, even if TT is already full and we have to move something out of it. Additionally, allowing VRAM->system behaves badly under heavy memory pressure because once we run out of TT, stuff starts to be moved back and forth between VRAM and system, and the TT contents are hardly renewed. Signed-off-by:
Francisco Jerez <currojerez@riseup.net> Signed-off-by:
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- 10 Mar, 2010 10 commits
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Ben Skeggs authored
The connector table index in the DCB entry for each output type is an index into the connector table, and does *not* necessarily match up with what was previously called "index" in the connector table entries themselves. Not real sure what that index is exactly, renamed to "index2" as we still use it to prevent creating multiple TV connectors. Signed-off-by: -
Maarten Maathuis authored
- This is useful for vram pushbuffers that are write combined. - pre-nv50 has one too (in WRITE_PUT). Signed-off-by:
Maarten Maathuis <madman2003@gmail.com> Signed-off-by:
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Maarten Maathuis authored
- In case of suspend lockups it's nice to know it happened in nouveau. Signed-off-by:
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Francisco Jerez authored
The calculated values were a little bit off (~16 clocks), the only effect it could have had is a slightly offset image with respect to the blob on analog outputs (bug 26790). Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
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Marcin Kościelnicki authored
This makes nouveau recognise and report more kinds of PGRAPH errors, as well as prevent GPU lockups resulting from some of them. Lots of guesswork was involved and some part of this is probably incorrect. Some potential-lockuop situations are handled by just resetting a whole PGRAPH subunit, which doesn't sound like a "proper" solution, but seems to work just fine... for now. Signed-off-by:
Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by:
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Marcin Kościelnicki authored
This will fix races between generated ctxprogs and interrupt handler. Signed-off-by:
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Marcin Kościelnicki authored
NV50 is nice and has a switch that autoaligns stuff for us. Pre-NV50, we need to align input bitmap width manually. Signed-off-by:
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Marcin Kościelnicki authored
11c/004 offset corresponds to PGRAPH reg 0x400828, and is initialised earlier anyway by both our ctxprog generator and blob ctxvals. It's actually incorrect with the generator, since we use different layout on pre-NVA0. Signed-off-by:
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- 25 Feb, 2010 25 commits
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Matt Turner authored
CC: Ben Skeggs <bskeggs@redhat.com> Signed-off-by:
Matt Turner <mattst88@gmail.com> Signed-off-by:
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Ben Skeggs authored
This is in preference to disconnected. If there's no other outputs connected this will cause LVDS to be programmed even with the lid closed rather than having X fail to start because of no available outputs. Signed-off-by: -
Ben Skeggs authored
Not entirely identical to 0x21, the per-encoder table header lacks the third init table pointer. However, our current parsing of the table should work just fine. Signed-off-by: -
Marcin Kościelnicki authored
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Marcin Kościelnicki authored
This removes dependence on external firmware for NV50 generation cards. If the generated ctxprogs don't work for you for some reason, please report it. Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
This makes this code common to both the nv04 and nv50 paths. For the moment, we keep the previous behaviour with HDMI/eDP connectors and report them as DVI-D/DP instead. This will be fixed once the rest of the code has been fixed to deal with those types. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
It's very useful to be able to access this without additional tools for debugging purposes. Signed-off-by: -
Luca Barbieri authored
Found by sparse. Signed-off-by:
Luca Barbieri <luca@luca-barbieri.com> Signed-off-by:
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Marcin Slusarz authored
i2c_entries seems to be the number of i2c entries, so with index equal to this number, we could read invalid data from i2ctable. Fix it. Signed-off-by:
Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by:
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Marcin Slusarz authored
Reported-by:
Dan Carpenter <error27@gmail.com> Signed-off-by:
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Marcin Slusarz authored
get_tmds_index_reg reads some value from stack when mlv happens to be equal to size of pramdac_table array. Fix it. Reported-by:
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Ben Skeggs authored
This commit breaks the userspace interface, and requires a new libdrm for nouveau to operate again. The multiple GEM_PUSHBUF ioctls that were present in 0.0.15 for compatibility purposes are now gone, and replaced with the new ioctl which allows for multiple push buffers to be submitted (necessary for hw index buffers in the nv50 3d driver) and relocations to be applied on any buffer. A number of other ioctls (CARD_INIT, GEM_PIN, GEM_UNPIN) that were needed for userspace modesetting have also been removed. Signed-off-by:
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Ben Skeggs authored
This allows us to submit push buffers from any memtype to the hardware. We'll need this ability for VRAM index buffers at some point. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
PFIFO on G80 and up has a new mode where the main ring buffer is simply a ring of pointers to indirect buffers containing the actual command/data packets. In order to be able to implement index buffers in the 3D driver we need to be able to submit data-only push buffers right after the cmd packet header, which is only possible using the new command submission method. This commit doesn't make it possible to implement index buffers yet, some userspace interface changes will be required, but it does allow for testing/debugging of the hardware-side support in the meantime. Signed-off-by: -
Maarten Maathuis authored
The nv50 pgraph handler (for example) could reenable pgraph fifo access and that would be bad when pgraph context is being unloaded (we need the guarantee a ctxprog isn't running). Signed-off-by:
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- 23 Feb, 2010 3 commits
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Ben Skeggs authored
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Ben Skeggs authored
This also modifies the unused PRAMIN PT entries to be all zeroes, can't really recall why I used 9/0 initially, just that it didn't work for some reason. It was likely masking a bug elsewhere that's since been fixed. Signed-off-by: -
Ben Skeggs authored
This commit changes nouveau to construct PTEs which look very much like the ones the binary driver creates. I presume that filling multiple PTEs identically with length flags and the physical address of the start of a block of VRAM is a hint to the memory controller that it need not perform additional page table lookups for that range of addresses. Signed-off-by:
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