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  1. 03 Sep, 2013 6 commits
    • Markos Chandras's avatar
      MIPS: powertv: Drop BOOTLOADER_DRIVER Kconfig symbol · f7c1285f
      Markos Chandras authored 
      The kbldr.h header file required for this was neither committed in the
original submission in a3a0f8c8
"MIPS: PowerTV: Base files for Cisco PowerTV platform"
nor was it ever present in the git tree so this option never worked.
Fixes the following build problem:
arch/mips/powertv/reset.c:25:36: fatal error: asm/mach-powertv/kbldr.h: No such
file or directory
compilation terminated.

Cc: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Acked-by: default avatarSteven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: David VomLehn <dvomlehn@cisco.com>
Patchwork: https://patchwork.linux-mips.org/patch/5801/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      f7c1285f
    • Markos Chandras's avatar
      MIPS: Kconfig: Drop obsolete NR_CPUS_DEFAULT_{1,2} options · c5eaff3e
      Markos Chandras authored 
      The NR_CPUS_DEFAULT_1 introduced as an aid for the QEMU
platform in 72ede9b1
"[MIPS] Qemu: Fix Symmetric Uniprocessor support"
which was later removed in
302922e5
"[MIPS] Qemu: Remove platform."

On certain randconfigs it may happen for NR_CPUS to have an
empty value because not all SMP platforms select a suitable
NR_CPUS_DEFAULT_* value. We fix this by restoring the range
of NR_CPUS to 2..64 and drop the NR_CPUS_DEFAULT_{1,2} symbols.
The first one is no longer used and the latter is not needed since
NR_CPUS=2 is now the default value.

Fixes the following problem on a randconfig:
.config:164:warning: symbol value '' invalid for NR_CPUS
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Acked-by: default avatarSteven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5747/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      c5eaff3e
    • Markos Chandras's avatar
      MIPS: TXx9: Fix build error if CONFIG_TOSHIBA_JMR3927 is not selected · c8acd40d
      Markos Chandras authored 
      The jmr3927_vec txx9_board_vec struct is defined in
txx9/jmr3927/setup.c which is only built if
CONFIG_TOSHIBA_JMR3927 is selected. This patch fixes the following
build problem:

arch/mips/txx9/generic/setup.c: In function 'select_board':
arch/mips/txx9/generic/setup.c:354:20: error:
'jmr3927_vec' undeclared (first use in this function)
arch/mips/txx9/generic/setup.c:354:20: note: each undeclared
identifier is reported only once for each function it appears in
make[3]: *** [arch/mips/txx9/generic/setup.o] Error 1
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Acked-by: default avatarSteven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5713/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      c8acd40d
    • Markos Chandras's avatar
      MIPS: Loongson: Hide the pci code behind CONFIG_PCI · 8510376e
      Markos Chandras authored 
      The pci.c code depends on symbols which are only visible
if CONFIG_PCI is selected.

Also fixes the following problem on loongson allnoconfig:
arch/mips/built-in.o: In function `pcibios_init':
pci.c:(.init.text+0x528):
undefined reference to `register_pci_controller'
arch/mips/built-in.o:(.data+0xc):
undefined reference to `loongson_pci_ops'
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Acked-by: default avatarSteven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5584/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      8510376e
    • Corey Minyard's avatar
      MIPS: Ftrace: Fix function tracing return address to match · 05f22639
      Corey Minyard authored 
      Dynamic function tracing was not working on MIPS.  When doing dynamic
tracing, the tracer attempts to match up the passed in address with
the one the compiler creates in the mcount tables.  The MIPS code was
passing in the return address from the tracing function call, but the
compiler tables were the address of the function call.  So they
wouldn't match.

Just subtracting 8 from the return address will give the address of
the function call.  Easy enough.
Signed-off-by: default avatarCorey Minyard <cminyard@mvista.com>
[david.daney@cavium.com: Adjusted code comment and patch Subject.]
Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/5592/
      05f22639
    • Maciej W. Rozycki's avatar
      MIPS: R4k clock source initialization bug fix · afddce0c
      Maciej W. Rozycki authored 
      This is a fix for a bug introduced with commit
447cdf26, submitted as archived here:
http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20080312235002.c717dde3.yoichi_yuasa%40tripeaks.co.jp
regrettably with no further explanation.

The issue is with the CP0 Count register read erratum present on R4000 and
some R4400 processors.  If this erratum is present, then a read from this
register that happens around the time it reaches the value stored in the
CP0 Compare register causes a CP0 timer interrupt that is supposed to
happen when the values in the two registers match to be missed.  The
implication for the chips affected is the CP0 timer can be used either as
a source of a timer interrupt (a clock event) or as a source of a
high-resolution counter (a clock source), but not both at a time.

The erratum does not affect timer interrupt operation itself, because in
this case the CP0 Count register is only read while the timer interrupt
has already been raised, while high-resolution counter references happen
at random times.

Additionally some systems apparently have issues with the timer interrupt
line being routed externally and not following the usual CP0 Count/Compare
semantics.  In this case we don't want to use the R4k clock event.

We've meant to address the erratum and the timer interrupt routing issue
in time_init, however the commit referred to above broke our solution.
What we currently have is we enable the R4k clock source if the R4k clock
event initialization has succeeded (the timer is present and has no timer
interrupt routing issue) or there is no CP0 Count register read erratum.
Which gives the following boolean matrix:

clock event | count erratum => clock source
------------+---------------+--------------
     0      |       0       |      1 (OK)
     0      |       1       |      0 (bug!) -> no interference, could use
     1      |       0       |      1 (OK)
     1      |       1       |      1 (bug!) -> can't use, interference

What we want instead is to enable the R4k clock source if there is no CP0
Count register read erratum (obviously) or the R4k clock event
initialization has *failed* -- because in the latter case we won't be
using the timer interrupt anyway, so we don't care about any interference
CP0 Count reads might cause with the interrupt.  This corresponds to the
following boolean matrix:

clock event | count erratum => clock source
------------+---------------+--------------
     0      |       0       |      1
     0      |       1       |      1
     1      |       0       |      1
     1      |       1       |      0

This is implemented here, effectively reverting the problematic commit,
and a short explanation is given next to code modified so that the
rationale is known to future readers and confusion is prevented from
happening here again.

It is worth noting that mips_clockevent_init returns 0 upon success while
cpu_has_mfc0_count_bug returns 0 upon failure.  This is because the former
function returns an error code while the latter returns a boolean value.
To signify the difference I have therefore chosen to compare the result of
the former call explicitly against 0.
Signed-off-by: default avatarMaciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5799/
      afddce0c
  3. 26 Aug, 2013 2 commits
  5. 25 Aug, 2013 4 commits
  7. 24 Aug, 2013 8 commits
  9. 23 Aug, 2013 17 commits
  11. 22 Aug, 2013 3 commits
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