1. 27 May, 2020 38 commits
  2. 26 May, 2020 2 commits
    • David S. Miller's avatar
      Merge branch 'net-phy-mscc-miim-reduce-waiting-time-between-MDIO-transactions' · 0e348119
      David S. Miller authored
      Antoine Tenart says:
      
      ====================
      net: phy: mscc-miim: reduce waiting time between MDIO transactions
      
      This series aims at reducing the waiting time between MDIO transactions
      when using the MSCC MIIM MDIO controller.
      
      I'm not sure we need patch 4/4 and we could reasonably drop it from the
      series. I'm including the patch as it could help to ensure the system
      is functional with a non optimal configuration.
      
      We needed to improve the driver's performances as when using a PHY
      requiring lots of registers accesses (such as the VSC85xx family),
      delays would add up and ended up to be quite large which would cause
      issues such as: a slow initialization of the PHY, and issues when using
      timestamping operations (this feature will be sent quite soon to the
      mailing lists).
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0e348119
    • Antoine Tenart's avatar
      net: phy: mscc-miim: read poll when high resolution timers are disabled · a021ada2
      Antoine Tenart authored
      The driver uses a read polling mechanism to check the status of the MDIO
      bus, to know if it is ready to accept next commands. This polling
      mechanism uses usleep_delay() under the hood between reads which is fine
      as long as high resolution timers are enabled. Otherwise the delays will
      end up to be much longer than expected.
      
      This patch fixes this by using udelay() under the hood when
      CONFIG_HIGH_RES_TIMERS isn't enabled. This increases CPU usage.
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a021ada2