1. 10 Sep, 2022 12 commits
  2. 09 Sep, 2022 10 commits
  3. 08 Sep, 2022 4 commits
    • Imre Deak's avatar
      drm/dp_mst: Avoid deleting payloads for connectors staying enabled · 5d832b66
      Imre Deak authored
      When an MST connector stays enabled during a commit the connector's MST
      state needs to be added to the atomic state, but the corresponding MST
      payload allocation shouldn't be set for deletion; fix such modesets by
      ensuring the above even if the connector was already enabled before the
      modeset.
      
      The issue led to the following:
      [  761.992923] i915 0000:00:02.0: drm_WARN_ON(payload->delete)
      [  761.992949] WARNING: CPU: 6 PID: 1401 at drivers/gpu/drm/display/drm_dp_mst_topology.c:4221 drm_dp_atomic_find_time_slots+0x236/0x280 [drm_display_helper]
      [  761.992955] Modules linked in: snd_hda_intel i915 drm_buddy drm_display_helper drm_kms_helper ttm drm snd_hda_codec_hdmi snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core snd_pcm prime_numbers i2c_algo_bit syscopyarea sysfillrect sysimgblt fb_sys_fops x86_pkg_temp_thermal cdc_ether coretemp crct10dif_pclmul usbnet crc32_pclmul mii ghash_clmulni_intel e1000e mei_me ptp i2c_i801 pps_core mei i2c_smbus intel_lpss_pci fuse [last unloaded: drm]
      [  761.992986] CPU: 6 PID: 1401 Comm: testdisplay Tainted: G     U             6.0.0-rc4-imre+ #565
      [  761.992989] Hardware name: Intel Corporation Alder Lake Client Platform/AlderLake-P DDR5 RVP, BIOS ADLPFWI1.R00.3135.A00.2203251419 03/25/2022
      [  761.992990] RIP: 0010:drm_dp_atomic_find_time_slots+0x236/0x280 [drm_display_helper]
      [  761.992994] Code: 4c 8b 67 50 4d 85 e4 75 03 4c 8b 27 e8 03 28 4e e1 48 c7 c1 8b 26 2c a0 4c 89 e2 48 c7 c7 a8 26 2c a0 48 89 c6 e8 31 d5 88 e1 <0f> 0b 49 8b 85 d0 00 00 00 4c 89 fa 48 c7 c6 a0 41 2c a0 48 8b 78
      [  761.992995] RSP: 0018:ffffc9000177ba60 EFLAGS: 00010286
      [  761.992998] RAX: 0000000000000000 RBX: ffff88810d2f1540 RCX: 0000000000000000
      [  761.992999] RDX: 0000000000000001 RSI: ffffffff82368a25 RDI: 00000000ffffffff
      [  761.993000] RBP: ffff888142299d80 R08: ffff8884adbfdfe8 R09: 00000000ffefffff
      [  761.993001] R10: ffff8884a6bfe000 R11: ffff8884ac443c30 R12: ffff888102972f90
      [  761.993002] R13: ffff8881163e2cf0 R14: 00000000000003ac R15: ffff88810c501000
      [  761.993003] FS:  00007f81e4c459c0(0000) GS:ffff888496500000(0000) knlGS:0000000000000000
      [  761.993004] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [  761.993005] CR2: 0000555dac962a98 CR3: 0000000123a34006 CR4: 0000000000770ee0
      [  761.993006] PKRU: 55555554
      [  761.993007] Call Trace:
      [  761.993009]  <TASK>
      [  761.993012]  intel_dp_mst_compute_config+0x19a/0x350 [i915]
      [  761.993090]  intel_atomic_check+0xf37/0x3180 [i915]
      [  761.993168]  drm_atomic_check_only+0x5d3/0xa60 [drm]
      [  761.993182]  drm_atomic_commit+0x56/0xc0 [drm]
      [  761.993192]  ? drm_plane_get_damage_clips.cold+0x1c/0x1c [drm]
      [  761.993204]  drm_atomic_helper_set_config+0x78/0xc0 [drm_kms_helper]
      [  761.993214]  drm_mode_setcrtc+0x1ed/0x750 [drm]
      [  761.993232]  ? drm_mode_getcrtc+0x180/0x180 [drm]
      [  761.993241]  drm_ioctl_kernel+0xb5/0x150 [drm]
      [  761.993252]  drm_ioctl+0x203/0x3d0 [drm]
      [  761.993261]  ? drm_mode_getcrtc+0x180/0x180 [drm]
      [  761.993276]  __x64_sys_ioctl+0x8a/0xb0
      [  761.993281]  do_syscall_64+0x38/0x90
      [  761.993285]  entry_SYSCALL_64_after_hwframe+0x63/0xcd
      [  761.993287] RIP: 0033:0x7f81e551aaff
      [  761.993288] Code: 00 48 89 44 24 18 31 c0 48 8d 44 24 60 c7 04 24 10 00 00 00 48 89 44 24 08 48 8d 44 24 20 48 89 44 24 10 b8 10 00 00 00 0f 05 <41> 89 c0 3d 00 f0 ff ff 77 1f 48 8b 44 24 18 64 48 2b 04 25 28 00
      [  761.993290] RSP: 002b:00007fff4304af10 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
      [  761.993292] RAX: ffffffffffffffda RBX: 00007fff4304afa0 RCX: 00007f81e551aaff
      [  761.993293] RDX: 00007fff4304afa0 RSI: 00000000c06864a2 RDI: 0000000000000004
      [  761.993294] RBP: 00000000c06864a2 R08: 0000000000000000 R09: 0000555dac8a9c68
      [  761.993294] R10: 0000000000000000 R11: 0000000000000246 R12: 00000000000008c4
      [  761.993295] R13: 0000000000000004 R14: 0000555dac8a9c68 R15: 00007fff4304b098
      [  761.993301]  </TASK>
      
      Fixes: 083351e9 ("drm/display/dp_mst: Fix modeset tracking in drm_dp_atomic_release_vcpi_slots()")
      Testcase: igt@testdisplay
      Cc: Lyude Paul <lyude@redhat.com>
      Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
      Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220907142542.1681994-1-imre.deak@intel.com
      5d832b66
    • Chen-Yu Tsai's avatar
      drm/panel-edp: Add Innolux N120ACA-EA1 panel entry · 758d7b34
      Chen-Yu Tsai authored
      This panel has the same delay timing as N116BCA-EA1 from the same
      company, which is also the same as delay_200_500_e80_d50.
      
      Add an entry for it.
      Signed-off-by: default avatarChen-Yu Tsai <wenst@chromium.org>
      Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
      Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220908085454.1024167-2-wenst@chromium.org
      758d7b34
    • Maxime Ripard's avatar
      drm/sun4i: tv: Merge mode_set into atomic_enable · ec491291
      Maxime Ripard authored
      Our mode_set implementation can be merged into our atomic_enable
      implementation to simplify things, so let's do this.
      Acked-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
      Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-36-459522d653a7@cerno.tech
      ec491291
    • Javier Martinez Canillas's avatar
      drm/ssd130x: Replace simple display helpers with the atomic helpers · 622113b9
      Javier Martinez Canillas authored
      The simple display pipeline is a set of helpers that can be used by DRM
      drivers to avoid dealing with all the needed components and just define
      a few functions to operate a simple display device with one full-screen
      scanout buffer feeding a single output.
      
      But it is arguable that this provides the correct level of abstraction
      for simple drivers, and recently some have been ported from using these
      simple display helpers to use the regular atomic helpers instead.
      
      The rationale for this is that the simple display pipeline helpers don't
      hide that much of the DRM complexity, while adding an indirection layer
      that conflates the concepts of CRTCs and planes. This makes the helpers
      less flexible and harder to be reused among different graphics drivers.
      
      Also, for simple drivers, using the full atomic helpers doesn't require
      a lot of additional code. So adding a simple display pipeline layer may
      not be worth it.
      
      For these reasons, let's follow that trend and make ssd130x a plain DRM
      driver that creates its own primary plane, CRTC, enconder and connector.
      Suggested-by: default avatarThomas Zimmermann <tzimmermann@suse.de>
      Signed-off-by: default avatarJavier Martinez Canillas <javierm@redhat.com>
      Acked-by: default avatarThomas Zimmermann <tzimmermann@suse.de>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220905222759.2597186-1-javierm@redhat.com
      622113b9
  4. 07 Sep, 2022 14 commits