- 01 Feb, 2008 40 commits
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Greg Kroah-Hartman authored
This moves the pci_bus class device to be a real struct device and at the same time, place it in the device tree in the correct location. Note, the old "bridge" symlink is now gone, but this was a non-standard link and no userspace program used it. If you need to determine the device that the bus is on, follow the standard device symlink, or walk up the device tree. Signed-off-by:Greg Kroah-Hartman <gregkh@suse.de>
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Greg Kroah-Hartman authored
Fixes a number of coding style issues in pci.h. It's a tad more readable now... Signed-off-by: -
Greg Kroah-Hartman authored
Fixes a few coding style issues in the internal pci.h file Signed-off-by: -
Shaohua Li authored
PCI Express ASPM defines a protocol for PCI Express components in the D0 state to reduce Link power by placing their Links into a low power state and instructing the other end of the Link to do likewise. This capability allows hardware-autonomous, dynamic Link power reduction beyond what is achievable by software-only controlled power management. However, The device should be configured by software appropriately. Enabling ASPM will save power, but will introduce device latency. This patch adds ASPM support in Linux. It introduces a global policy for ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control it. The interface can be used as a boot option too. Currently we have below setting: -default, BIOS default setting -powersave, highest power saving mode, enable all available ASPM state and clock power management -performance, highest performance, disable ASPM and clock power management By default, the 'default' policy is used currently. In my test, power difference between powersave mode and performance mode is about 1.3w in a system with 3 PCIE links. Signed-off-by:Shaohua Li <shaohua.li@intel.com> Signed-off-by:
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Ian Abbott authored
If the fakephp driver is used to emulate removal of a PCI device by writing text string "0" to the "power" sysfs attribute file, this causes its parent directory and its contents (including the "power" file) to be deleted before the write operation returns. Unfortunately, it ends up in a deadlock waiting for itself to complete. The deadlock is as follows: sysfs_write_file calls flush_write_buffer which calls sysfs_get_active_two before calling power_write_file in pci_hotplug_core.c via the sysfs store operation. The power_write_file function calls disable_slot in fakephp.c via the slot operation. The disable_slot function calls remove_slot which calls pci_hp_deregister (back in pci_hotplug_core.c) which calls fs_remove_slot which calls sysfs_remove_file to remove the "power" file. The sysfs_remove_file function calls sysfs_hash_and_remove which calls sysfs_addrm_finish which calls sysfs_deactivate. The sysfs_deactivate function sees that something has an active reference on the sysfs_dirent (from the previous call to sysfs_get_active_two back up the call stack somewhere) so waits for the active reference to go away, which is of course impossible. The problem has been present since 2.6.21. This patch breaks the deadlock by queuing work queue items on a single- threaded work queue to remove a slot from sysfs, and to rescan the PCI buses. There is also some protection against disabling a slot that is already being removed. Signed-off-by:
Ian Abbott <abbotti@mev.co.uk> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by:
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Shane Huang authored
SB700 SATA MSI bug will be fixed in SB700 revision A21 at hardware level, but the SB700 revision older than A21 will also be found in the market. This patch modify the original quirk commit bc38b411 instead of withdrawing it. The patch also removes quirk to 0x4395 because 0x4395 is SB800 device ID. Signed-off-by:
Shane Huang <shane.huang@amd.com> Signed-off-by:
Tejun Heo <htejun@gmail.com> Signed-off-by:
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Andrew Patterson authored
According to the PCI Firmware Specification Revision 3.0 section 4.5, _OSC should only be called on a root brdige. Here is the relevant passage: "The _OSC interface defined in this section applies only to Host Bridge ACPI devices that originate PCI, PCI-X, or PCI Express hierarchies". Changed the code to find the parent root bridge of the device and call _OSC on that. Signed-off-by:
Andrew Patterson <andrew.patterson@hp.com> Signed-off-by:
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Andrew Patterson authored
AER is only used with PCIe devices so we should only check PCIe devices for _OSC support. Signed-off-by:
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Andrew Patterson authored
The function pci_osc_support_set() traverses every root bridge when checking for _OSC support for a capability. It quits as soon as it finds a device/bridge that doesn't support the requested capability. This won't work for systems that have mixed PCI and PCIe bridges when checking for PCIe features. I split this function into two -- pci_osc_support_set() and pcie_osc_support_set(). The latter is used when only PCIe devices should be traversed. Signed-off-by:
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Jan Engelhardt authored
Signed-off-by:
Jan Engelhardt <jengelh@computergmbh.de> Signed-off-by:
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Mathieu Segaud authored
Change access to inode thru file->f_dentry->d_inode, and add explicit lock/unlock_kernel() calls. Signed-off-by:
Mathieu Segaud <mathieu.segaud@regala.cx> Signed-off-by:
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Kenji Kaneshige authored
Disable Bus Master, SERR# and INTx to ensure that no new Requests will be generated from the device before turning power off, in accordance with the specification. Signed-off-by:
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by:
Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by:
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Kenji Kaneshige authored
Set Bad DLLP Mask bit in Correctable Error Mask Register during turning power off the slot. This is the workaround against Bad DLLP error that sometimes happen during turning power off on the slot which conforms to PCI Express 1.0a spec. The cause of this error seems that PCI Express 1.0a spec doesn't have the following consideration that was added to PCI Express 1.1 spec. "If the port is associated with a hot-pluggable slot (Hot-Plug Capable bit in the Slot Capabilities register set to 1b), and Power Controller Control bit in Slot Control register is 1b(Off), then any transition to DL Inactive must not be considered an error." Signed-off-by: -
Kenji Kaneshige authored
After turning power off, we must wait for at least 1 second *before* LED operation. Signed-off-by:
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Grant Grundler authored
Patch below removes pci_enable_device_bars() from Documentation/pci.txt . Signed-off-by:
Grant Grundler <grundler@parisc-linux.org> Acked-by:
Alan Cox <alan@redhat.com> Signed-off-by:
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Benjamin Herrenschmidt authored
Now that all in-tree users are gone, this removes pci_enable_device_bars() completely. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Benjamin Herrenschmidt authored
This patch converts users of pci_enable_device_bars() to the new pci_enable_device_{io,mem} interface. The new API fits nicely, except maybe for the QLA case where a bit of code re-organization might be a good idea but I prefer sticking to the simple patch as I don't have hardware to test on. I'll also need some feedback on the cs5520 change. Signed-off-by: -
Benjamin Herrenschmidt authored
The pci_enable_device_bars() interface isn't well suited to PCI because you can't actually enable/disable BARs individually on a device. So for example, if a device has 2 memory BARs 0 and 1, and one of them (let's say 1) has not been successfully allocated by the firmware or the kernel, then enabling memory decoding shouldn't be permitted for the entire device since it will decode whatever random address is still in that BAR 1. So a device must be either fully enabled for IO, for Memory, or for both. Not on a per-BAR basis. This provides two new functions, pci_enable_device_io() and pci_enable_device_mem() to replace pci_enable_device_bars(). The implementation internally builds a BAR mask in order to be able to use existing arch infrastructure. Signed-off-by:
Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by:
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Shaohua Li authored
Avoid adding the same type of cap multiple times, otherwise we will see dead loop. Signed-off-by:
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Shaohua Li authored
save_state->cap_nr should be correctly set, otherwise we can't find the saved cap at resume. Signed-off-by:
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Shaohua Li authored
pci_save/store_state has multiple bugs, which will cause cap can't be saved/restored correctly. Below 3 patches fix them. fix the typo in pci_save_pcix_state Signed-off-by:
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bjorn.helgaas@hp.com authored
Convert quirk printks to dev_printk(). Signed-off-by:
Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by:
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bjorn.helgaas@hp.com authored
Convert quirk printks to dev_printk(). I made the MSI disable messages a little more consistent: - always use "disabled", not "deactivated" - specify "device MSI disabled" or "subordinate MSI disabled" when disabling MSI for only a specific device or subordinate bus Signed-off-by: -
bjorn.helgaas@hp.com authored
Instead of printing this: PCI: Calling quirk c023b250 for 0000:00:00.0 we can print this: pci 0000:00:00.0: calling quirk 0xc023b270: quirk_cardbus_legacy+0x0/0x30() The address is superfluous because sprint_symbol() includes the address if the symbol lookup fails, but this is the same style used in do_initcalls() and pnp_fixup_device(). Signed-off-by: -
Ivan Kokshaysky authored
Check that the e100 is in the D0 power state. If it's not, it won't respond to MMIO accesses and we end up with master-abort machine checks on some platforms. Signed-off-by:
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Joe Perches authored
Signed-off-by:
Joe Perches <joe@perches.com> Signed-off-by:
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Adrian Bunk authored
A HOWTO that hasn't been updated for half a dozen years no longer "contains valuable information about which PCI hardware does work under Linux and which doesn't". Signed-off-by:
Adrian Bunk <bunk@kernel.org> Signed-off-by:
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Adrian Bunk authored
This patch fixes the following problem present with older gcc versions: <-- snip --> ... CC drivers/pci/msi.o /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:692: warning: weak declaration of `arch_msi_check_device' after first use results in unspecified behavior /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:704: warning: weak declaration of `arch_setup_msi_irqs' after first use results in unspecified behavior /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:724: warning: weak declaration of `arch_teardown_msi_irqs' after first use results in unspecified behavior ... <-- snip --> Signed-off-by:
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Sebastien Dugue authored
Add a quirk to enable the MSI mapping capability on HyperTransport bridges. Wire Broadcom's HT1000 to use the quirk. Signed-off-by:
Sebastien Dugue <sebastien.dugue@bull.net> Acked-by:
"Eric W. Biederman" <ebiederm@xmission.com> Cc: Andy Currid <acurrid@nvidia.com> Cc: Peer Chen <pchen@nvidia.com> Cc: Prakash Punnoor <prakash@punnoor.de> Cc: Andrew Morton <akpm@linux-foundation.org> Acked-by:
Michael Chan <mchan@broadcom.com> Cc: Greg KH <greg@kroah.com> Cc: Andy Currid <acurrid@nvidia.com> Cc: Peer Chen <pchen@nvidia.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Benjamin Herrenschmidt authored
This adds appropriate casts to avoid a warning and print the correct values in pr_debug. Signed-off-by:
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Benjamin Herrenschmidt authored
The current pci_assign_unassigned_resources() code doesn't work properly on 32 bits platforms with 64 bits resources. The main reason is the use of unsigned long in various places instead of resource_size_t. This is a pre-requisite for making powerpc use the generic code instead of its own half-useful implementation. Signed-off-by:
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Rolf Eike Beer authored
PCIeHP: Fix some whitespace damage Signed-off-by:
Rolf Eike Beer <eike-hotplug@sf-tec.de> Signed-off-by:
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Kenji Kaneshige authored
Remove duplicated code to find an extend capability in PCIEHP driver. Signed-off-by:
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Kenji Kaneshige authored
Remove needless hp_slot calculation. This has no functional changes. Signed-off-by:
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Kenji Kaneshige authored
Remove needless members from struct controller. This has no functional changes. Signed-off-by:
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MUNEDA Takahiro authored
acpi_get_name() is called before and after dbg(). The latter is useless and should be removed. Signed-off-by:
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MUNEDA Takahiro authored
fix trivial typos. Signed-off-by:
MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by:
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Mark Lord authored
Earlier patches to split out the hardware init for PCIe hotplug resulted in some one-time initializations being redone on every resume cycle. Eg. irq/polling initialization. This patch splits the hardware init into two parts, and separates the one-time initializations from those so that they only ever get done once, as intended. Signed-off-by:
Mark Lord <mlord@pobox.com> Signed-off-by:
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Mark Lord authored
Make use of the previously split out pcie_init_enable_events() function to reinitialize the hotplug hardware on resume from suspend, but only when pciehp_force==1. Otherwise behaviour is unmodified. Signed-off-by:
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Mark Lord authored
PCI: more fixes for PCIe Hotplug so that it works with ExpressCard slots on Dell notebooks (and others?) in conjunction with modparam of pciehp_force=1 Split out the hotplug hardware initialization code from pcie_init() into pcie_init_enable_events(), without changing any functionality. Signed-off-by:
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