- 15 Mar, 2023 11 commits
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Rayyan Ansari authored
Add the XO and XO_A clocks to the MSM8974 clock list, which is also used on MSM8226. Signed-off-by:
Rayyan Ansari <rayyan@ansari.sh> Tested-by:
Luca Weiss <luca@z3ntu.xyz> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230121192540.9177-2-rayyan@ansari.sh
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Christian Marangi authored
Rework kpss-gcc driver Documentation to yaml Documentation and move it to clock as it's a clock-controller. The current kpss-gcc Documentation have major problems and can't be converted directly. Introduce various changes to the original Documentation. Add #clock-cells additional binding as this clock outputs a static clk named acpu_l2_aux with supported compatible. Only some compatible require and outputs a clock, for the others, set only the reg as a required binding to correctly export the kpss-gcc registers. As the reg is shared also add the required syscon compatible. Signed-off-by:
Christian Marangi <ansuelsmth@gmail.com> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Christian Marangi authored
Convert kpss-acc driver Documentation to yaml. The original Documentation was wrong all along. Fix it while we are converting it. The example was wrong as kpss-acc-v2 should only expose the regs but we don't have any driver that expose additional clocks. The kpss-acc driver is only specific to v1. For this exact reason, split the Documentation to 2 different schema, v1 as clock-controller and v2 for power-manager as per msm-3.10 specification, the exposed regs handle power manager. Signed-off-by:
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Kathiravan T authored
Clock framework disables the GPLL4 source since there are no active users for this source currently. Some of the clocks initialized by the bootloaders uses the GPLL4 as the source. Due to this, when the GPLL4 is disabled by the clock framework, system is going for the reboot. To avoid this, mark the GPLL4 as ignore unused so that clock framework doesn't disable it. Once the users of this source is enabled, we can get rid of this flag. Signed-off-by:
Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by:
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Kathiravan T authored
Add support for the global clock controller found on IPQ5332 SoC. PLL used on IPQ5332 is of type Stromer Plus PLL, however the programming sequence is same as Stromer PLL, so lets re-use the Stromer PLL ops. Signed-off-by:
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Kathiravan T authored
Add the support for stromer plus pll, which is found on the IPQ5332 SoCs. Programming sequence is same as the stromer pll, so we can re-use the same. Reviewed-by:
Stephen Boyd <sboyd@kernel.org> Signed-off-by:
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Varadarajan Narayanan authored
Add programming sequence support for managing the Stromer PLLs. Reviewed-by:
Sricharan R <quic_srichara@quicinc.com> Signed-off-by:
Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by:
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Bjorn Andersson authored
Merge the IPQ5332 Global Clock Controller binding through a topic branch to make it possible to include in Devicetree source as well.
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Kathiravan T authored
Add binding for the Qualcomm IPQ5332 Global Clock Controller. Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Tom Rix authored
gcc with W=1 reports these errors drivers/clk/qcom/gpucc-sm6375.c:145:37: error: ‘gpucc_parent_data_2’ defined but not used [-Werror=unused-const-variable=] 145 | static const struct clk_parent_data gpucc_parent_data_2[] = { | ^~~~~~~~~~~~~~~~~~~ drivers/clk/qcom/gpucc-sm6375.c:139:32: error: ‘gpucc_parent_map_2’ defined but not used [-Werror=unused-const-variable=] 139 | static const struct parent_map gpucc_parent_map_2[] = { | ^~~~~~~~~~~~~~~~~~ These variables are not used, so remove them. Signed-off-by:Tom Rix <trix@redhat.com> Reviewed-by:
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Konrad Dybcio authored
Add the PARENT_ENABLE flag to prevent the clock from getting stuck at boot and use floor_ops to avoid SDHCI overclocking. Fixes: 496d1a13 ("clk: qcom: Add Global Clock Controller driver for QCM2290") Signed-off-by:
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- 14 Mar, 2023 5 commits
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Robert Marko authored
Convert the IPQ4019 GCC driver to use parent data instead of global name matching. Utilize ARRAY_SIZE for num_parents instead of hardcoding the value. Signed-off-by:
Robert Marko <robert.marko@sartura.hr> Signed-off-by:
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Robert Marko authored
Move pcnoc clocks up just after PLL-s to be able to use their HW fields. Signed-off-by:
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Robert Marko authored
Move PLL clock declarations up, before clock parent tables, so that we can use pll hw clock fields in the next commit. Signed-off-by:
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Robert Marko authored
Start off IPQ4019 GCC conversion by converting XO and sleep clks to parent data in order to directly pass them. Signed-off-by:
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Robert Marko authored
Move schema for the GCC on IPQ4019 platform to a separate file to be able to allow passing XO and sleep clks directly to GCC. Signed-off-by:
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- 13 Mar, 2023 17 commits
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Danila Tikhonov authored
Add support for the global clock controller found on SM7150 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Co-developed-by:
David Wronek <davidwronek@gmail.com> Signed-off-by:
Danila Tikhonov <danila@jiaxyga.com> Reviewed-by:
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Bjorn Andersson authored
Merge SM7180 Global Clock Controller binding through a dedicated topic branch, so that it can be introduced into the Devicetree source tree as well in the same kernel release.
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Danila Tikhonov authored
Add device tree bindings for global clock subsystem clock controller for Qualcomm Technology Inc's SM7150 SoCs. Co-developed-by:
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Luca Weiss authored
.determine_rate is meant to replace .round_rate. The former comes with a benefit which is especially relevant on 32-bit systems: since .determine_rate uses an "unsigned long" (compared to a "signed long" which is used by .round_rate) the maximum value on 32-bit systems increases from 2^31 (or approx. 2.14GHz) to 2^32 (or approx. 4.29GHz). Signed-off-by:
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Luca Weiss authored
.determine_rate is meant to replace .round_rate. The former comes with a benefit which is especially relevant on 32-bit systems: since .determine_rate uses an "unsigned long" (compared to a "signed long" which is used by .round_rate) the maximum value on 32-bit systems increases from 2^31 (or approx. 2.14GHz) to 2^32 (or approx. 4.29GHz). Signed-off-by:
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Konrad Dybcio authored
Add support for the GPU clock controller found on SM6115. Signed-off-by:
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Konrad Dybcio authored
Add support for the GPU clock controller found on SM6375. Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Konrad Dybcio authored
Add support for the GPU clock controller found on SM6125. Reviewed-by:
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Konrad Dybcio authored
Prefix the "branch enable" registers with CBCR_ to be closer to what they are actually called in Qualcomm terms, use GENMASK instead of shifting values around and adjust their usage accordingly. Signed-off-by:
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Konrad Dybcio authored
Move the definitions of CBCR bits to the branch header file. Signed-off-by:
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Konrad Dybcio authored
HLOS-controlled branch clocks on non-ancient Qualcomm platforms feature SLEEP and WAKE fields which can be written to to configure how long the clock hardware should wait internally before being (un)gated. Some very sensitive clocks need to have these values programmed to prevent putting the hardware in a not-exactly-good state. Add definitions of these fields and introduce helpers for setting them inside clock drivers. Reviewed-by:
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Konrad Dybcio authored
Most Qualcomm branch clocks come with a pretty usual set of bits that can enable memory retention by means of not turning off parts of the memory logic. Add them to the common header file and introduce helper functions for setting them instead of using magic writes. Signed-off-by:
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Bjorn Andersson authored
Merge DT bindings through a dedicated topic branch, such that they can be reused in changes being picked up through dt source branches.
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Konrad Dybcio authored
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6115 SoCs. Reviewed-by:
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Konrad Dybcio authored
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6375 SoCs. Reviewed-by:
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Konrad Dybcio authored
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6125 SoCs. Reviewed-by:
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Uwe Kleine-König authored
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
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- 05 Mar, 2023 7 commits
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Linus Torvalds authored
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Linus Torvalds authored
Commit aa47a7c2 ("lib/cpumask: deprecate nr_cpumask_bits") resulted in the cpumask operations potentially becoming hugely less efficient, because suddenly the cpumask was always considered to be variable-sized. The optimization was then later added back in a limited form by commit 6f9c07be ("lib/cpumask: add FORCE_NR_CPUS config option"), but that FORCE_NR_CPUS option is not useful in a generic kernel and more of a special case for embedded situations with fixed hardware. Instead, just re-introduce the optimization, with some changes. Instead of depending on CPUMASK_OFFSTACK being false, and then always using the full constant cpumask width, this introduces three different cpumask "sizes": - the exact size (nr_cpumask_bits) remains identical to nr_cpu_ids. This is used for situations where we should use the exact size. - the "small" size (small_cpumask_bits) is the NR_CPUS constant if it fits in a single word and the bitmap operations thus end up able to trigger the "small_const_nbits()" optimizations. This is used for the operations that have optimized single-word cases that get inlined, notably the bit find and scanning functions. - the "large" size (large_cpumask_bits) is the NR_CPUS constant if it is an sufficiently small constant that makes simple "copy" and "clear" operations more efficient. This is arbitrarily set at four words or less. As a an example of this situation, without this fixed size optimization, cpumask_clear() will generate code like movl nr_cpu_ids(%rip), %edx addq $63, %rdx shrq $3, %rdx andl $-8, %edx callq memset@PLT on x86-64, because it would calculate the "exact" number of longwords that need to be cleared. In contrast, with this patch, using a MAX_CPU of 64 (which is quite a reasonable value to use), the above becomes a single movq $0,cpumask instruction instead, because instead of caring to figure out exactly how many CPU's the system has, it just knows that the cpumask will be a single word and can just clear it all. Note that this does end up tightening the rules a bit from the original version in another way: operations that set bits in the cpumask are now limited to the actual nr_cpu_ids limit, whereas we used to do the nr_cpumask_bits thing almost everywhere in the cpumask code. But if you just clear bits, or scan for bits, we can use the simpler compile-time constants. In the process, remove 'cpumask_complement()' and 'for_each_cpu_not()' which were not useful, and which fundamentally have to be limited to 'nr_cpu_ids'. Better remove them now than have somebody introduce use of them later. Of course, on x86-64 with MAXSMP there is no sane small compile-time constant for the cpumask sizes, and we end up using the actual CPU bits, and will generate the above kind of horrors regardless. Please don't use MAXSMP unless you really expect to have machines with thousands of cores. Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds authored
Pull crypto fix from Herbert Xu: "Fix a regression in the caam driver" * tag 'v6.3-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: caam - Fix edesc/iv ordering mixup
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 updates from Thomas Gleixner: "A small set of updates for x86: - Return -EIO instead of success when the certificate buffer for SEV guests is not large enough - Allow STIPB to be enabled with legacy IBSR. Legacy IBRS is cleared on return to userspace for performance reasons, but the leaves user space vulnerable to cross-thread attacks which STIBP prevents. Update the documentation accordingly" * tag 'x86-urgent-2023-03-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: virt/sev-guest: Return -EIO if certificate buffer is not large enough Documentation/hw-vuln: Document the interaction between IBRS and STIBP x86/speculation: Allow enabling STIBP with legacy IBRS -
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull irq updates from Thomas Gleixner: "A set of updates for the interrupt susbsystem: - Prevent possible NULL pointer derefences in irq_data_get_affinity_mask() and irq_domain_create_hierarchy() - Take the per device MSI lock before invoking code which relies on it being hold - Make sure that MSI descriptors are unreferenced before freeing them. This was overlooked when the platform MSI code was converted to use core infrastructure and results in a fals positive warning - Remove dead code in the MSI subsystem - Clarify the documentation for pci_msix_free_irq() - More kobj_type constification" * tag 'irq-urgent-2023-03-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: genirq/msi, platform-msi: Ensure that MSI descriptors are unreferenced genirq/msi: Drop dead domain name assignment irqdomain: Add missing NULL pointer check in irq_domain_create_hierarchy() genirq/irqdesc: Make kobj_type structures constant PCI/MSI: Clarify usage of pci_msix_free_irq() genirq/msi: Take the per-device MSI lock before validating the control structure genirq/ipi: Fix NULL pointer deref in irq_data_get_affinity_mask() -
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfsLinus Torvalds authored
Pull vfs update from Al Viro: "Adding Christian Brauner as VFS co-maintainer" * tag 'pull-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: Adding VFS co-maintainer
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfsLinus Torvalds authored
Pull VM_FAULT_RETRY fixes from Al Viro: "Some of the page fault handlers do not deal with the following case correctly: - handle_mm_fault() has returned VM_FAULT_RETRY - there is a pending fatal signal - fault had happened in kernel mode Correct action in such case is not "return unconditionally" - fatal signals are handled only upon return to userland and something like copy_to_user() would end up retrying the faulting instruction and triggering the same fault again and again. What we need to do in such case is to make the caller to treat that as failed uaccess attempt - handle exception if there is an exception handler for faulting instruction or oops if there isn't one. Over the years some architectures had been fixed and now are handling that case properly; some still do not. This series should fix the remaining ones. Status: - m68k, riscv, hexagon, parisc: tested/acked by maintainers. - alpha, sparc32, sparc64: tested locally - bug has been reproduced on the unpatched kernel and verified to be fixed by this series. - ia64, microblaze, nios2, openrisc: build, but otherwise completely untested" * tag 'pull-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: openrisc: fix livelock in uaccess nios2: fix livelock in uaccess microblaze: fix livelock in uaccess ia64: fix livelock in uaccess sparc: fix livelock in uaccess alpha: fix livelock in uaccess parisc: fix livelock in uaccess hexagon: fix livelock in uaccess riscv: fix livelock in uaccess m68k: fix livelock in uaccess
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