Commit 466870b2 authored by sunny's avatar sunny

Fixed inline asm code, it didn't work with GCC > ver 3.x.

parent 4c2b6807
...@@ -6,6 +6,16 @@ Mutex, the basic synchronization primitive ...@@ -6,6 +6,16 @@ Mutex, the basic synchronization primitive
Created 9/5/1995 Heikki Tuuri Created 9/5/1995 Heikki Tuuri
*******************************************************/ *******************************************************/
#if defined(not_defined) && defined(__GNUC__) && defined(UNIV_INTEL_X86)
/* %z0: Use the size of operand %0 which in our case is *m to determine
instruction size, it should end up as xchgl. "1" in the input constraint,
says that "in" has to go in the same place as "out".*/
#define TAS(m, in, out) \
asm volatile ("xchg%z0 %2, %0" \
: "=g" (*(m)), "=r" (out) \
: "1" (in)) /* Note: "1" here refers to "=r" (out) */
#endif
/********************************************************************** /**********************************************************************
Sets the waiters field in a mutex. */ Sets the waiters field in a mutex. */
...@@ -89,20 +99,10 @@ mutex_test_and_set( ...@@ -89,20 +99,10 @@ mutex_test_and_set(
return(res); return(res);
#elif defined(not_defined) && defined(__GNUC__) && defined(UNIV_INTEL_X86) #elif defined(not_defined) && defined(__GNUC__) && defined(UNIV_INTEL_X86)
ulint* lw;
ulint res; ulint res;
lw = &(mutex->lock_word); TAS(&mutex->lock_word, 1, res);
/* In assembly we use the so-called AT & T syntax where
the order of operands is inverted compared to the ordinary Intel
syntax. The 'l' after the mnemonics denotes a 32-bit operation.
The line after the code tells which values come out of the asm
code, and the second line tells the input to the asm code. */
asm volatile("movl $1, %%eax; xchgl (%%ecx), %%eax" :
"=eax" (res), "=m" (*lw) :
"ecx" (lw));
return(res); return(res);
#else #else
ibool ret; ibool ret;
...@@ -141,20 +141,9 @@ mutex_reset_lock_word( ...@@ -141,20 +141,9 @@ mutex_reset_lock_word(
__asm MOV ECX, lw __asm MOV ECX, lw
__asm XCHG EDX, DWORD PTR [ECX] __asm XCHG EDX, DWORD PTR [ECX]
#elif defined(not_defined) && defined(__GNUC__) && defined(UNIV_INTEL_X86) #elif defined(not_defined) && defined(__GNUC__) && defined(UNIV_INTEL_X86)
ulint* lw; ulint res;
lw = &(mutex->lock_word);
/* In assembly we use the so-called AT & T syntax where
the order of operands is inverted compared to the ordinary Intel
syntax. The 'l' after the mnemonics denotes a 32-bit operation. */
asm volatile("movl $0, %%eax; xchgl (%%ecx), %%eax" : TAS(&mutex->lock_word, 0, res);
"=m" (*lw) :
"ecx" (lw) :
"eax"); /* gcc does not seem to understand
that our asm code resets eax: tell it
explicitly that after the third ':' */
#else #else
mutex->lock_word = 0; mutex->lock_word = 0;
......
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