Commit b3675fc5 authored by heikki@donna.mysql.fi's avatar heikki@donna.mysql.fi

sync0sync.ic InnoDB now uses XCHG to implement mutex if GCC and x86

configure.in	InnoDB now uses XCHG to implement mutex if GCC and x86
parent 49ac18c7
mwagner@evoq.mwagner.org mwagner@evoq.mwagner.org
sasha@mysql.sashanet.com sasha@mysql.sashanet.com
heikki@donna.mysql.fi
...@@ -95,6 +95,11 @@ case "$target_os" in ...@@ -95,6 +95,11 @@ case "$target_os" in
CFLAGS="$CFLAGS -DUNIV_MUST_NOT_INLINE";; CFLAGS="$CFLAGS -DUNIV_MUST_NOT_INLINE";;
esac esac
case "$target" in
i[[4567]]86-*-*)
CFLAGS="$CFLAGS -DUNIV_INTEL_X86";;
esac
AC_OUTPUT(Makefile os/Makefile ut/Makefile btr/Makefile AC_OUTPUT(Makefile os/Makefile ut/Makefile btr/Makefile
buf/Makefile com/Makefile data/Makefile buf/Makefile com/Makefile data/Makefile
dict/Makefile dyn/Makefile dict/Makefile dyn/Makefile
......
...@@ -86,6 +86,20 @@ mutex_test_and_set( ...@@ -86,6 +86,20 @@ mutex_test_and_set(
/* mutex_fence(); */ /* mutex_fence(); */
return(res); return(res);
#elif defined(__GNUC__) && defined(UNIV_INTEL_X86)
ulint* lw;
ulint res;
lw = &(mutex->lock_word);
/* In assembly we use the so-called AT & T syntax where
the order of operands is inverted compared to the ordinary Intel
syntax. The 'l' after the mnemonics denotes a 32-bit operation. */
asm volatile("movl $1, %%eax; xchgl (%%ecx), %%eax" :
"=eax" (res):
"ecx" (lw));
return(res);
#else #else
ibool ret; ibool ret;
......
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