enic_main.c 76.4 KB
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/*
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 * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
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 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
 *
 * This program is free software; you may redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
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#include <linux/if.h>
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#include <linux/if_ether.h>
#include <linux/if_vlan.h>
#include <linux/in.h>
#include <linux/ip.h>
#include <linux/ipv6.h>
#include <linux/tcp.h>
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#include <linux/rtnetlink.h>
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#include <linux/prefetch.h>
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#include <net/ip6_checksum.h>
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#include <linux/ktime.h>
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#include <linux/numa.h>
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#ifdef CONFIG_RFS_ACCEL
#include <linux/cpu_rmap.h>
#endif
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#include <linux/crash_dump.h>
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#include <net/busy_poll.h>
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#include <net/vxlan.h>
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#include "cq_enet_desc.h"
#include "vnic_dev.h"
#include "vnic_intr.h"
#include "vnic_stats.h"
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#include "vnic_vic.h"
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#include "enic_res.h"
#include "enic.h"
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#include "enic_dev.h"
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#include "enic_pp.h"
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#include "enic_clsf.h"
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#define ENIC_NOTIFY_TIMER_PERIOD	(2 * HZ)
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#define WQ_ENET_MAX_DESC_LEN		(1 << WQ_ENET_LEN_BITS)
#define MAX_TSO				(1 << 16)
#define ENIC_DESC_MAX_SPLITS		(MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)

#define PCI_DEVICE_ID_CISCO_VIC_ENET         0x0043  /* ethernet vnic */
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#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN     0x0044  /* enet dynamic vnic */
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#define PCI_DEVICE_ID_CISCO_VIC_ENET_VF      0x0071  /* enet SRIOV VF */
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#define RX_COPYBREAK_DEFAULT		256

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/* Supported devices */
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static const struct pci_device_id enic_id_table[] = {
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	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
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	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
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	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
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	{ 0, }	/* end of table */
};

MODULE_DESCRIPTION(DRV_DESCRIPTION);
MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);
MODULE_DEVICE_TABLE(pci, enic_id_table);

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#define ENIC_LARGE_PKT_THRESHOLD		1000
#define ENIC_MAX_COALESCE_TIMERS		10
/*  Interrupt moderation table, which will be used to decide the
 *  coalescing timer values
 *  {rx_rate in Mbps, mapping percentage of the range}
 */
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static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = {
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	{4000,  0},
	{4400, 10},
	{5060, 20},
	{5230, 30},
	{5540, 40},
	{5820, 50},
	{6120, 60},
	{6435, 70},
	{6745, 80},
	{7000, 90},
	{0xFFFFFFFF, 100}
};

/* This table helps the driver to pick different ranges for rx coalescing
 * timer depending on the link speed.
 */
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static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = {
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	{0,  0}, /* 0  - 4  Gbps */
	{0,  3}, /* 4  - 10 Gbps */
	{3,  6}, /* 10 - 40 Gbps */
};

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static void enic_init_affinity_hint(struct enic *enic)
{
	int numa_node = dev_to_node(&enic->pdev->dev);
	int i;

	for (i = 0; i < enic->intr_count; i++) {
		if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i) ||
		    (enic->msix[i].affinity_mask &&
		     !cpumask_empty(enic->msix[i].affinity_mask)))
			continue;
		if (zalloc_cpumask_var(&enic->msix[i].affinity_mask,
				       GFP_KERNEL))
			cpumask_set_cpu(cpumask_local_spread(i, numa_node),
					enic->msix[i].affinity_mask);
	}
}

static void enic_free_affinity_hint(struct enic *enic)
{
	int i;

	for (i = 0; i < enic->intr_count; i++) {
		if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i))
			continue;
		free_cpumask_var(enic->msix[i].affinity_mask);
	}
}

static void enic_set_affinity_hint(struct enic *enic)
{
	int i;
	int err;

	for (i = 0; i < enic->intr_count; i++) {
		if (enic_is_err_intr(enic, i)		||
		    enic_is_notify_intr(enic, i)	||
		    !enic->msix[i].affinity_mask	||
		    cpumask_empty(enic->msix[i].affinity_mask))
			continue;
		err = irq_set_affinity_hint(enic->msix_entry[i].vector,
					    enic->msix[i].affinity_mask);
		if (err)
			netdev_warn(enic->netdev, "irq_set_affinity_hint failed, err %d\n",
				    err);
	}

	for (i = 0; i < enic->wq_count; i++) {
		int wq_intr = enic_msix_wq_intr(enic, i);

		if (enic->msix[wq_intr].affinity_mask &&
		    !cpumask_empty(enic->msix[wq_intr].affinity_mask))
			netif_set_xps_queue(enic->netdev,
					    enic->msix[wq_intr].affinity_mask,
					    i);
	}
}

static void enic_unset_affinity_hint(struct enic *enic)
{
	int i;

	for (i = 0; i < enic->intr_count; i++)
		irq_set_affinity_hint(enic->msix_entry[i].vector, NULL);
}

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static void enic_udp_tunnel_add(struct net_device *netdev,
				struct udp_tunnel_info *ti)
{
	struct enic *enic = netdev_priv(netdev);
	__be16 port = ti->port;
	int err;

	spin_lock_bh(&enic->devcmd_lock);

	if (ti->type != UDP_TUNNEL_TYPE_VXLAN) {
		netdev_info(netdev, "udp_tnl: only vxlan tunnel offload supported");
		goto error;
	}

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	switch (ti->sa_family) {
	case AF_INET6:
		if (!(enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6)) {
			netdev_info(netdev, "vxlan: only IPv4 offload supported");
			goto error;
		}
		/* Fall through */
	case AF_INET:
		break;
	default:
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		goto error;
	}

	if (enic->vxlan.vxlan_udp_port_number) {
		if (ntohs(port) == enic->vxlan.vxlan_udp_port_number)
			netdev_warn(netdev, "vxlan: udp port already offloaded");
		else
			netdev_info(netdev, "vxlan: offload supported for only one UDP port");

		goto error;
	}
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	if ((vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ) != 1) &&
	    !(enic->vxlan.flags & ENIC_VXLAN_MULTI_WQ)) {
		netdev_info(netdev, "vxlan: vxlan offload with multi wq not supported on this adapter");
		goto error;
	}
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	err = vnic_dev_overlay_offload_cfg(enic->vdev,
					   OVERLAY_CFG_VXLAN_PORT_UPDATE,
					   ntohs(port));
	if (err)
		goto error;

	err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN,
					    enic->vxlan.patch_level);
	if (err)
		goto error;

	enic->vxlan.vxlan_udp_port_number = ntohs(port);

	netdev_info(netdev, "vxlan fw-vers-%d: offload enabled for udp port: %d, sa_family: %d ",
		    (int)enic->vxlan.patch_level, ntohs(port), ti->sa_family);

	goto unlock;

error:
	netdev_info(netdev, "failed to offload udp port: %d, sa_family: %d, type: %d",
		    ntohs(port), ti->sa_family, ti->type);
unlock:
	spin_unlock_bh(&enic->devcmd_lock);
}

static void enic_udp_tunnel_del(struct net_device *netdev,
				struct udp_tunnel_info *ti)
{
	struct enic *enic = netdev_priv(netdev);
	int err;

	spin_lock_bh(&enic->devcmd_lock);

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	if ((ntohs(ti->port) != enic->vxlan.vxlan_udp_port_number) ||
	    ti->type != UDP_TUNNEL_TYPE_VXLAN) {
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		netdev_info(netdev, "udp_tnl: port:%d, sa_family: %d, type: %d not offloaded",
			    ntohs(ti->port), ti->sa_family, ti->type);
		goto unlock;
	}

	err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN,
					    OVERLAY_OFFLOAD_DISABLE);
	if (err) {
		netdev_err(netdev, "vxlan: del offload udp port: %d failed",
			   ntohs(ti->port));
		goto unlock;
	}

	enic->vxlan.vxlan_udp_port_number = 0;

	netdev_info(netdev, "vxlan: del offload udp port %d, family %d\n",
		    ntohs(ti->port), ti->sa_family);

unlock:
	spin_unlock_bh(&enic->devcmd_lock);
}

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static netdev_features_t enic_features_check(struct sk_buff *skb,
					     struct net_device *dev,
					     netdev_features_t features)
{
	const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb);
	struct enic *enic = netdev_priv(dev);
	struct udphdr *udph;
	u16 port = 0;
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	u8 proto;
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	if (!skb->encapsulation)
		return features;

	features = vxlan_features_check(skb, features);

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	switch (vlan_get_protocol(skb)) {
	case htons(ETH_P_IPV6):
		if (!(enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6))
			goto out;
		proto = ipv6_hdr(skb)->nexthdr;
		break;
	case htons(ETH_P_IP):
		proto = ip_hdr(skb)->protocol;
		break;
	default:
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		goto out;
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	}
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	switch (eth->h_proto) {
	case ntohs(ETH_P_IPV6):
		if (!(enic->vxlan.flags & ENIC_VXLAN_INNER_IPV6))
			goto out;
		/* Fall through */
	case ntohs(ETH_P_IP):
		break;
	default:
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		goto out;
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	}
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	if (proto == IPPROTO_UDP) {
		udph = udp_hdr(skb);
		port = be16_to_cpu(udph->dest);
	}

	/* HW supports offload of only one UDP port. Remove CSUM and GSO MASK
	 * for other UDP port tunnels
	 */
	if (port  != enic->vxlan.vxlan_udp_port_number)
		goto out;

	return features;

out:
	return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
}

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int enic_is_dynamic(struct enic *enic)
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{
	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
}

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int enic_sriov_enabled(struct enic *enic)
{
	return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
}

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static int enic_is_sriov_vf(struct enic *enic)
{
	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
}

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int enic_is_valid_vf(struct enic *enic, int vf)
{
#ifdef CONFIG_PCI_IOV
	return vf >= 0 && vf < enic->num_vfs;
#else
	return 0;
#endif
}

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static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
{
	struct enic *enic = vnic_dev_priv(wq->vdev);

	if (buf->sop)
		pci_unmap_single(enic->pdev, buf->dma_addr,
			buf->len, PCI_DMA_TODEVICE);
	else
		pci_unmap_page(enic->pdev, buf->dma_addr,
			buf->len, PCI_DMA_TODEVICE);

	if (buf->os_buf)
		dev_kfree_skb_any(buf->os_buf);
}

static void enic_wq_free_buf(struct vnic_wq *wq,
	struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
{
	enic_free_wq_buf(wq, buf);
}

static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
	u8 type, u16 q_number, u16 completed_index, void *opaque)
{
	struct enic *enic = vnic_dev_priv(vdev);

	spin_lock(&enic->wq_lock[q_number]);

	vnic_wq_service(&enic->wq[q_number], cq_desc,
		completed_index, enic_wq_free_buf,
		opaque);

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	if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) &&
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	    vnic_wq_desc_avail(&enic->wq[q_number]) >=
	    (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
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		netif_wake_subqueue(enic->netdev, q_number);
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	spin_unlock(&enic->wq_lock[q_number]);

	return 0;
}

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static bool enic_log_q_error(struct enic *enic)
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{
	unsigned int i;
	u32 error_status;
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	bool err = false;
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	for (i = 0; i < enic->wq_count; i++) {
		error_status = vnic_wq_error_status(&enic->wq[i]);
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		err |= error_status;
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		if (error_status)
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			netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
				i, error_status);
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	}

	for (i = 0; i < enic->rq_count; i++) {
		error_status = vnic_rq_error_status(&enic->rq[i]);
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		err |= error_status;
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		if (error_status)
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			netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
				i, error_status);
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	}
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	return err;
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}

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static void enic_msglvl_check(struct enic *enic)
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{
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	u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
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	if (msg_enable != enic->msg_enable) {
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		netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
			enic->msg_enable, msg_enable);
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		enic->msg_enable = msg_enable;
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	}
}

static void enic_mtu_check(struct enic *enic)
{
	u32 mtu = vnic_dev_mtu(enic->vdev);
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	struct net_device *netdev = enic->netdev;
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	if (mtu && mtu != enic->port_mtu) {
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		enic->port_mtu = mtu;
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		if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
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			mtu = max_t(int, ENIC_MIN_MTU,
				min_t(int, ENIC_MAX_MTU, mtu));
			if (mtu != netdev->mtu)
				schedule_work(&enic->change_mtu_work);
		} else {
			if (mtu < netdev->mtu)
				netdev_warn(netdev,
					"interface MTU (%d) set higher "
					"than switch port MTU (%d)\n",
					netdev->mtu, mtu);
		}
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	}
}

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static void enic_link_check(struct enic *enic)
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{
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	int link_status = vnic_dev_link_status(enic->vdev);
	int carrier_ok = netif_carrier_ok(enic->netdev);
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	if (link_status && !carrier_ok) {
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		netdev_info(enic->netdev, "Link UP\n");
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		netif_carrier_on(enic->netdev);
	} else if (!link_status && carrier_ok) {
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		netdev_info(enic->netdev, "Link DOWN\n");
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		netif_carrier_off(enic->netdev);
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	}
}

static void enic_notify_check(struct enic *enic)
{
	enic_msglvl_check(enic);
	enic_mtu_check(enic);
	enic_link_check(enic);
}

#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))

static irqreturn_t enic_isr_legacy(int irq, void *data)
{
	struct net_device *netdev = data;
	struct enic *enic = netdev_priv(netdev);
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	unsigned int io_intr = enic_legacy_io_intr();
	unsigned int err_intr = enic_legacy_err_intr();
	unsigned int notify_intr = enic_legacy_notify_intr();
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	u32 pba;

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	vnic_intr_mask(&enic->intr[io_intr]);
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	pba = vnic_intr_legacy_pba(enic->legacy_pba);
	if (!pba) {
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		vnic_intr_unmask(&enic->intr[io_intr]);
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		return IRQ_NONE;	/* not our interrupt */
	}

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	if (ENIC_TEST_INTR(pba, notify_intr)) {
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		enic_notify_check(enic);
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		vnic_intr_return_all_credits(&enic->intr[notify_intr]);
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	}
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	if (ENIC_TEST_INTR(pba, err_intr)) {
		vnic_intr_return_all_credits(&enic->intr[err_intr]);
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		enic_log_q_error(enic);
		/* schedule recovery from WQ/RQ error */
		schedule_work(&enic->reset);
		return IRQ_HANDLED;
	}

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	if (ENIC_TEST_INTR(pba, io_intr))
		napi_schedule_irqoff(&enic->napi[0]);
	else
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		vnic_intr_unmask(&enic->intr[io_intr]);
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	return IRQ_HANDLED;
}

static irqreturn_t enic_isr_msi(int irq, void *data)
{
	struct enic *enic = data;

	/* With MSI, there is no sharing of interrupts, so this is
	 * our interrupt and there is no need to ack it.  The device
	 * is not providing per-vector masking, so the OS will not
	 * write to PCI config space to mask/unmask the interrupt.
	 * We're using mask_on_assertion for MSI, so the device
	 * automatically masks the interrupt when the interrupt is
	 * generated.  Later, when exiting polling, the interrupt
	 * will be unmasked (see enic_poll).
	 *
	 * Also, the device uses the same PCIe Traffic Class (TC)
	 * for Memory Write data and MSI, so there are no ordering
	 * issues; the MSI will always arrive at the Root Complex
	 * _after_ corresponding Memory Writes (i.e. descriptor
	 * writes).
	 */

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	napi_schedule_irqoff(&enic->napi[0]);
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	return IRQ_HANDLED;
}

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static irqreturn_t enic_isr_msix(int irq, void *data)
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{
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	struct napi_struct *napi = data;
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	napi_schedule_irqoff(napi);
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	return IRQ_HANDLED;
}

static irqreturn_t enic_isr_msix_err(int irq, void *data)
{
	struct enic *enic = data;
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	unsigned int intr = enic_msix_err_intr(enic);
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	vnic_intr_return_all_credits(&enic->intr[intr]);
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	if (enic_log_q_error(enic))
		/* schedule recovery from WQ/RQ error */
		schedule_work(&enic->reset);
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	return IRQ_HANDLED;
}

static irqreturn_t enic_isr_msix_notify(int irq, void *data)
{
	struct enic *enic = data;
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	unsigned int intr = enic_msix_notify_intr(enic);
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	enic_notify_check(enic);
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	vnic_intr_return_all_credits(&enic->intr[intr]);
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	return IRQ_HANDLED;
}

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static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq,
				  struct sk_buff *skb, unsigned int len_left,
				  int loopback)
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{
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	const skb_frag_t *frag;
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	dma_addr_t dma_addr;
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	/* Queue additional data fragments */
	for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
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		len_left -= skb_frag_size(frag);
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		dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0,
					    skb_frag_size(frag),
					    DMA_TO_DEVICE);
		if (unlikely(enic_dma_map_check(enic, dma_addr)))
			return -ENOMEM;
		enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag),
					(len_left == 0),	/* EOP? */
					loopback);
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	}
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	return 0;
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}

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static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq,
				  struct sk_buff *skb, int vlan_tag_insert,
				  unsigned int vlan_tag, int loopback)
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{
	unsigned int head_len = skb_headlen(skb);
	unsigned int len_left = skb->len - head_len;
	int eop = (len_left == 0);
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	dma_addr_t dma_addr;
	int err = 0;

	dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
				  PCI_DMA_TODEVICE);
	if (unlikely(enic_dma_map_check(enic, dma_addr)))
		return -ENOMEM;
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	/* Queue the main skb fragment. The fragments are no larger
	 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
	 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
	 * per fragment is queued.
	 */
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	enic_queue_wq_desc(wq, skb, dma_addr, head_len,	vlan_tag_insert,
			   vlan_tag, eop, loopback);
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	if (!eop)
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		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);

	return err;
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}

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static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq,
				     struct sk_buff *skb, int vlan_tag_insert,
				     unsigned int vlan_tag, int loopback)
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{
	unsigned int head_len = skb_headlen(skb);
	unsigned int len_left = skb->len - head_len;
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	unsigned int hdr_len = skb_checksum_start_offset(skb);
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	unsigned int csum_offset = hdr_len + skb->csum_offset;
	int eop = (len_left == 0);
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	dma_addr_t dma_addr;
	int err = 0;

	dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
				  PCI_DMA_TODEVICE);
	if (unlikely(enic_dma_map_check(enic, dma_addr)))
		return -ENOMEM;
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	/* Queue the main skb fragment. The fragments are no larger
	 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
	 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
	 * per fragment is queued.
	 */
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	enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len,	csum_offset,
				   hdr_len, vlan_tag_insert, vlan_tag, eop,
				   loopback);
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	if (!eop)
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		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);

	return err;
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}

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static void enic_preload_tcp_csum_encap(struct sk_buff *skb)
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{
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	const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb);

	switch (eth->h_proto) {
	case ntohs(ETH_P_IP):
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		inner_ip_hdr(skb)->check = 0;
		inner_tcp_hdr(skb)->check =
			~csum_tcpudp_magic(inner_ip_hdr(skb)->saddr,
					   inner_ip_hdr(skb)->daddr, 0,
					   IPPROTO_TCP, 0);
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		break;
	case ntohs(ETH_P_IPV6):
		inner_tcp_hdr(skb)->check =
			~csum_ipv6_magic(&inner_ipv6_hdr(skb)->saddr,
					 &inner_ipv6_hdr(skb)->daddr, 0,
					 IPPROTO_TCP, 0);
		break;
	default:
		WARN_ONCE(1, "Non ipv4/ipv6 inner pkt for encap offload");
		break;
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	}
}
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static void enic_preload_tcp_csum(struct sk_buff *skb)
{
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	/* Preload TCP csum field with IP pseudo hdr calculated
	 * with IP length set to zero.  HW will later add in length
	 * to each TCP segment resulting from the TSO.
	 */

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	if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
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		ip_hdr(skb)->check = 0;
		tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
			ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
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	} else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
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		tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
			&ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
	}
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}

static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq,
				 struct sk_buff *skb, unsigned int mss,
				 int vlan_tag_insert, unsigned int vlan_tag,
				 int loopback)
{
	unsigned int frag_len_left = skb_headlen(skb);
	unsigned int len_left = skb->len - frag_len_left;
	int eop = (len_left == 0);
	unsigned int offset = 0;
	unsigned int hdr_len;
	dma_addr_t dma_addr;
	unsigned int len;
	skb_frag_t *frag;

	if (skb->encapsulation) {
		hdr_len = skb_inner_transport_header(skb) - skb->data;
		hdr_len += inner_tcp_hdrlen(skb);
		enic_preload_tcp_csum_encap(skb);
	} else {
		hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
		enic_preload_tcp_csum(skb);
	}
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	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors
	 * for the main skb fragment
	 */
	while (frag_len_left) {
		len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
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		dma_addr = pci_map_single(enic->pdev, skb->data + offset, len,
					  PCI_DMA_TODEVICE);
		if (unlikely(enic_dma_map_check(enic, dma_addr)))
			return -ENOMEM;
		enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len,
				       vlan_tag_insert, vlan_tag,
				       eop && (len == frag_len_left), loopback);
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		frag_len_left -= len;
		offset += len;
	}
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	if (eop)
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		return 0;
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	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors
	 * for additional data fragments
	 */
	for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
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		len_left -= skb_frag_size(frag);
		frag_len_left = skb_frag_size(frag);
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		offset = 0;
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		while (frag_len_left) {
			len = min(frag_len_left,
				(unsigned int)WQ_ENET_MAX_DESC_LEN);
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			dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
						    offset, len,
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						    DMA_TO_DEVICE);
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			if (unlikely(enic_dma_map_check(enic, dma_addr)))
				return -ENOMEM;
			enic_queue_wq_desc_cont(wq, skb, dma_addr, len,
						(len_left == 0) &&
						 (len == frag_len_left),/*EOP*/
						loopback);
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			frag_len_left -= len;
			offset += len;
		}
	}
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	return 0;
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}

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static inline int enic_queue_wq_skb_encap(struct enic *enic, struct vnic_wq *wq,
					  struct sk_buff *skb,
					  int vlan_tag_insert,
					  unsigned int vlan_tag, int loopback)
{
	unsigned int head_len = skb_headlen(skb);
	unsigned int len_left = skb->len - head_len;
	/* Hardware will overwrite the checksum fields, calculating from
	 * scratch and ignoring the value placed by software.
	 * Offload mode = 00
	 * mss[2], mss[1], mss[0] bits are set
	 */
	unsigned int mss_or_csum = 7;
	int eop = (len_left == 0);
	dma_addr_t dma_addr;
	int err = 0;

	dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
				  PCI_DMA_TODEVICE);
	if (unlikely(enic_dma_map_check(enic, dma_addr)))
		return -ENOMEM;

	enic_queue_wq_desc_ex(wq, skb, dma_addr, head_len, mss_or_csum, 0,
			      vlan_tag_insert, vlan_tag,
			      WQ_ENET_OFFLOAD_MODE_CSUM, eop, 1 /* SOP */, eop,
			      loopback);
	if (!eop)
		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);

	return err;
}

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static inline void enic_queue_wq_skb(struct enic *enic,
	struct vnic_wq *wq, struct sk_buff *skb)
{
	unsigned int mss = skb_shinfo(skb)->gso_size;
	unsigned int vlan_tag = 0;
	int vlan_tag_insert = 0;
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	int loopback = 0;
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	int err;
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	if (skb_vlan_tag_present(skb)) {
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		/* VLAN tag from trunking driver */
		vlan_tag_insert = 1;
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		vlan_tag = skb_vlan_tag_get(skb);
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	} else if (enic->loop_enable) {
		vlan_tag = enic->loop_tag;
		loopback = 1;
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	}

	if (mss)
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		err = enic_queue_wq_skb_tso(enic, wq, skb, mss,
					    vlan_tag_insert, vlan_tag,
					    loopback);
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	else if (skb->encapsulation)
		err = enic_queue_wq_skb_encap(enic, wq, skb, vlan_tag_insert,
					      vlan_tag, loopback);
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	else if	(skb->ip_summed == CHECKSUM_PARTIAL)
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		err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert,
						vlan_tag, loopback);
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	else
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		err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert,
					     vlan_tag, loopback);
	if (unlikely(err)) {
		struct vnic_wq_buf *buf;

		buf = wq->to_use->prev;
		/* while not EOP of previous pkt && queue not empty.
		 * For all non EOP bufs, os_buf is NULL.
		 */
		while (!buf->os_buf && (buf->next != wq->to_clean)) {
			enic_free_wq_buf(wq, buf);
			wq->ring.desc_avail++;
			buf = buf->prev;
		}
		wq->to_use = buf->next;
		dev_kfree_skb(skb);
	}
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}

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/* netif_tx_lock held, process context with BHs disabled, or BH */
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static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
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	struct net_device *netdev)
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{
	struct enic *enic = netdev_priv(netdev);
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	struct vnic_wq *wq;
	unsigned int txq_map;
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	struct netdev_queue *txq;
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	if (skb->len <= 0) {
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		dev_kfree_skb_any(skb);
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		return NETDEV_TX_OK;
	}

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	txq_map = skb_get_queue_mapping(skb) % enic->wq_count;
	wq = &enic->wq[txq_map];
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	txq = netdev_get_tx_queue(netdev, txq_map);
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	/* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
	 * which is very likely.  In the off chance it's going to take
	 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
	 */

	if (skb_shinfo(skb)->gso_size == 0 &&
	    skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
	    skb_linearize(skb)) {
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		dev_kfree_skb_any(skb);
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		return NETDEV_TX_OK;
	}

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	spin_lock(&enic->wq_lock[txq_map]);
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	if (vnic_wq_desc_avail(wq) <
	    skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
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		netif_tx_stop_queue(txq);
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		/* This is a hard error, log it */
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		netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
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		spin_unlock(&enic->wq_lock[txq_map]);
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		return NETDEV_TX_BUSY;
	}

	enic_queue_wq_skb(enic, wq, skb);

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	if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
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		netif_tx_stop_queue(txq);
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	skb_tx_timestamp(skb);
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	if (!skb->xmit_more || netif_xmit_stopped(txq))
		vnic_wq_doorbell(wq);
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	spin_unlock(&enic->wq_lock[txq_map]);
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	return NETDEV_TX_OK;
}

/* dev_base_lock rwlock held, nominally process context */
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static void enic_get_stats(struct net_device *netdev,
			   struct rtnl_link_stats64 *net_stats)
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{
	struct enic *enic = netdev_priv(netdev);
	struct vnic_stats *stats;
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	int err;
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	err = enic_dev_stats_dump(enic, &stats);
	/* return only when pci_zalloc_consistent fails in vnic_dev_stats_dump
	 * For other failures, like devcmd failure, we return previously
	 * recorded stats.
	 */
	if (err == -ENOMEM)
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		return;
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	net_stats->tx_packets = stats->tx.tx_frames_ok;
	net_stats->tx_bytes = stats->tx.tx_bytes_ok;
	net_stats->tx_errors = stats->tx.tx_errors;
	net_stats->tx_dropped = stats->tx.tx_drops;
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	net_stats->rx_packets = stats->rx.rx_frames_ok;
	net_stats->rx_bytes = stats->rx.rx_bytes_ok;
	net_stats->rx_errors = stats->rx.rx_errors;
	net_stats->multicast = stats->rx.rx_multicast_frames_ok;
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	net_stats->rx_over_errors = enic->rq_truncated_pkts;
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	net_stats->rx_crc_errors = enic->rq_bad_fcs;
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	net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
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}

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static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr)
{
	struct enic *enic = netdev_priv(netdev);

	if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) {
		unsigned int mc_count = netdev_mc_count(netdev);

		netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n",
			    ENIC_MULTICAST_PERFECT_FILTERS, mc_count);

		return -ENOSPC;
	}

	enic_dev_add_addr(enic, mc_addr);
	enic->mc_count++;

	return 0;
}

static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr)
{
	struct enic *enic = netdev_priv(netdev);

	enic_dev_del_addr(enic, mc_addr);
	enic->mc_count--;

	return 0;
}

static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr)
{
	struct enic *enic = netdev_priv(netdev);

	if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) {
		unsigned int uc_count = netdev_uc_count(netdev);

		netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n",
			    ENIC_UNICAST_PERFECT_FILTERS, uc_count);

		return -ENOSPC;
	}

	enic_dev_add_addr(enic, uc_addr);
	enic->uc_count++;

	return 0;
}

static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr)
{
	struct enic *enic = netdev_priv(netdev);

	enic_dev_del_addr(enic, uc_addr);
	enic->uc_count--;

	return 0;
}

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void enic_reset_addr_lists(struct enic *enic)
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{
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	struct net_device *netdev = enic->netdev;

	__dev_uc_unsync(netdev, NULL);
	__dev_mc_unsync(netdev, NULL);

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	enic->mc_count = 0;
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	enic->uc_count = 0;
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	enic->flags = 0;
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}

static int enic_set_mac_addr(struct net_device *netdev, char *addr)
{
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	struct enic *enic = netdev_priv(netdev);

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	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
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		if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
			return -EADDRNOTAVAIL;
	} else {
		if (!is_valid_ether_addr(addr))
			return -EADDRNOTAVAIL;
	}
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	memcpy(netdev->dev_addr, addr, netdev->addr_len);

	return 0;
}

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static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
{
	struct enic *enic = netdev_priv(netdev);
	struct sockaddr *saddr = p;
	char *addr = saddr->sa_data;
	int err;

	if (netif_running(enic->netdev)) {
		err = enic_dev_del_station_addr(enic);
		if (err)
			return err;
	}

	err = enic_set_mac_addr(netdev, addr);
	if (err)
		return err;

	if (netif_running(enic->netdev)) {
		err = enic_dev_add_station_addr(enic);
		if (err)
			return err;
	}

	return err;
}

static int enic_set_mac_address(struct net_device *netdev, void *p)
{
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	struct sockaddr *saddr = p;
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	char *addr = saddr->sa_data;
	struct enic *enic = netdev_priv(netdev);
	int err;

	err = enic_dev_del_station_addr(enic);
	if (err)
		return err;

	err = enic_set_mac_addr(netdev, addr);
	if (err)
		return err;
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	return enic_dev_add_station_addr(enic);
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}

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/* netif_tx_lock held, BHs disabled */
static void enic_set_rx_mode(struct net_device *netdev)
{
	struct enic *enic = netdev_priv(netdev);
	int directed = 1;
	int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
	int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
	int promisc = (netdev->flags & IFF_PROMISC) ||
		netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
	int allmulti = (netdev->flags & IFF_ALLMULTI) ||
		netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
	unsigned int flags = netdev->flags |
		(allmulti ? IFF_ALLMULTI : 0) |
		(promisc ? IFF_PROMISC : 0);

	if (enic->flags != flags) {
		enic->flags = flags;
		enic_dev_packet_filter(enic, directed,
			multicast, broadcast, promisc, allmulti);
	}

	if (!promisc) {
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		__dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync);
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		if (!allmulti)
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			__dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync);
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	}
}

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/* netif_tx_lock held, BHs disabled */
static void enic_tx_timeout(struct net_device *netdev)
{
	struct enic *enic = netdev_priv(netdev);
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	schedule_work(&enic->tx_hang_reset);
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}

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static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
{
	struct enic *enic = netdev_priv(netdev);
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	struct enic_port_profile *pp;
	int err;
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	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
	if (err)
		return err;
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1114
	if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
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		if (vf == PORT_SELF_VF) {
			memcpy(pp->vf_mac, mac, ETH_ALEN);
			return 0;
		} else {
			/*
			 * For sriov vf's set the mac in hw
			 */
			ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
				vnic_dev_set_mac_addr, mac);
			return enic_dev_status_to_errno(err);
		}
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	} else
		return -EINVAL;
}

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static int enic_set_vf_port(struct net_device *netdev, int vf,
	struct nlattr *port[])
{
	struct enic *enic = netdev_priv(netdev);
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	struct enic_port_profile prev_pp;
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	struct enic_port_profile *pp;
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	int err = 0, restore_pp = 1;
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	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
	if (err)
		return err;
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	if (!port[IFLA_PORT_REQUEST])
		return -EOPNOTSUPP;

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	memcpy(&prev_pp, pp, sizeof(*enic->pp));
	memset(pp, 0, sizeof(*enic->pp));
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	pp->set |= ENIC_SET_REQUEST;
	pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
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	if (port[IFLA_PORT_PROFILE]) {
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		pp->set |= ENIC_SET_NAME;
		memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
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			PORT_PROFILE_MAX);
	}

	if (port[IFLA_PORT_INSTANCE_UUID]) {
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		pp->set |= ENIC_SET_INSTANCE;
		memcpy(pp->instance_uuid,
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			nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
	}

	if (port[IFLA_PORT_HOST_UUID]) {
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		pp->set |= ENIC_SET_HOST;
		memcpy(pp->host_uuid,
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			nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
	}
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	if (vf == PORT_SELF_VF) {
		/* Special case handling: mac came from IFLA_VF_MAC */
		if (!is_zero_ether_addr(prev_pp.vf_mac))
			memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
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		if (is_zero_ether_addr(netdev->dev_addr))
			eth_hw_addr_random(netdev);
	} else {
		/* SR-IOV VF: get mac from adapter */
		ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
			vnic_dev_get_mac_addr, pp->mac_addr);
		if (err) {
			netdev_err(netdev, "Error getting mac for vf %d\n", vf);
			memcpy(pp, &prev_pp, sizeof(*pp));
			return enic_dev_status_to_errno(err);
		}
	}
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	err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
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	if (err) {
		if (restore_pp) {
			/* Things are still the way they were: Implicit
			 * DISASSOCIATE failed
			 */
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			memcpy(pp, &prev_pp, sizeof(*pp));
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		} else {
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			memset(pp, 0, sizeof(*pp));
			if (vf == PORT_SELF_VF)
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				eth_zero_addr(netdev->dev_addr);
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		}
	} else {
		/* Set flag to indicate that the port assoc/disassoc
		 * request has been sent out to fw
		 */
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		pp->set |= ENIC_PORT_REQUEST_APPLIED;
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		/* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1206
		if (pp->request == PORT_REQUEST_DISASSOCIATE) {
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			eth_zero_addr(pp->mac_addr);
1208
			if (vf == PORT_SELF_VF)
1209
				eth_zero_addr(netdev->dev_addr);
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		}
	}
1212

1213
	if (vf == PORT_SELF_VF)
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		eth_zero_addr(pp->vf_mac);
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	return err;
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}

static int enic_get_vf_port(struct net_device *netdev, int vf,
	struct sk_buff *skb)
{
	struct enic *enic = netdev_priv(netdev);
	u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
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	struct enic_port_profile *pp;
1225
	int err;
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	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
	if (err)
		return err;

	if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
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		return -ENODATA;
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	err = enic_process_get_pp_request(enic, vf, pp->request, &response);
1235
	if (err)
1236
		return err;
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	if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
	    nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
	    ((pp->set & ENIC_SET_NAME) &&
	     nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
	    ((pp->set & ENIC_SET_INSTANCE) &&
	     nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
		     pp->instance_uuid)) ||
	    ((pp->set & ENIC_SET_HOST) &&
	     nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
		goto nla_put_failure;
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	return 0;

nla_put_failure:
	return -EMSGSIZE;
}

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static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
{
	struct enic *enic = vnic_dev_priv(rq->vdev);

	if (!buf->os_buf)
		return;

	pci_unmap_single(enic->pdev, buf->dma_addr,
		buf->len, PCI_DMA_FROMDEVICE);
	dev_kfree_skb_any(buf->os_buf);
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	buf->os_buf = NULL;
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}

static int enic_rq_alloc_buf(struct vnic_rq *rq)
{
	struct enic *enic = vnic_dev_priv(rq->vdev);
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	struct net_device *netdev = enic->netdev;
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	struct sk_buff *skb;
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	unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
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	unsigned int os_buf_index = 0;
	dma_addr_t dma_addr;
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	struct vnic_rq_buf *buf = rq->to_use;

	if (buf->os_buf) {
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		enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr,
				   buf->len);
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		return 0;
	}
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	skb = netdev_alloc_skb_ip_align(netdev, len);
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	if (!skb)
		return -ENOMEM;

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	dma_addr = pci_map_single(enic->pdev, skb->data, len,
				  PCI_DMA_FROMDEVICE);
	if (unlikely(enic_dma_map_check(enic, dma_addr))) {
		dev_kfree_skb(skb);
		return -ENOMEM;
	}
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	enic_queue_rq_desc(rq, skb, os_buf_index,
		dma_addr, len);

	return 0;
}

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static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,
				      u32 pkt_len)
{
	if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len)
		pkt_size->large_pkt_bytes_cnt += pkt_len;
	else
		pkt_size->small_pkt_bytes_cnt += pkt_len;
}

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static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb,
			     struct vnic_rq_buf *buf, u16 len)
{
	struct enic *enic = netdev_priv(netdev);
	struct sk_buff *new_skb;

	if (len > enic->rx_copybreak)
		return false;
	new_skb = netdev_alloc_skb_ip_align(netdev, len);
	if (!new_skb)
		return false;
	pci_dma_sync_single_for_cpu(enic->pdev, buf->dma_addr, len,
				    DMA_FROM_DEVICE);
	memcpy(new_skb->data, (*skb)->data, len);
	*skb = new_skb;

	return true;
}

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static void enic_rq_indicate_buf(struct vnic_rq *rq,
	struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
	int skipped, void *opaque)
{
	struct enic *enic = vnic_dev_priv(rq->vdev);
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	struct net_device *netdev = enic->netdev;
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	struct sk_buff *skb;
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	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
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	u8 type, color, eop, sop, ingress_port, vlan_stripped;
	u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
	u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
	u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
	u8 packet_error;
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	u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
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	u32 rss_hash;
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	bool outer_csum_ok = true, encap = false;
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	if (skipped)
		return;

	skb = buf->os_buf;

	cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
		&type, &color, &q_number, &completed_index,
		&ingress_port, &fcoe, &eop, &sop, &rss_type,
		&csum_not_calc, &rss_hash, &bytes_written,
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		&packet_error, &vlan_stripped, &vlan_tci, &checksum,
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		&fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
		&fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
		&ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
		&fcs_ok);

	if (packet_error) {

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		if (!fcs_ok) {
			if (bytes_written > 0)
				enic->rq_bad_fcs++;
			else if (bytes_written == 0)
				enic->rq_truncated_pkts++;
		}
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		pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
				 PCI_DMA_FROMDEVICE);
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		dev_kfree_skb_any(skb);
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		buf->os_buf = NULL;
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		return;
	}

	if (eop && bytes_written > 0) {

		/* Good receive
		 */

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		if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) {
			buf->os_buf = NULL;
			pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
					 PCI_DMA_FROMDEVICE);
		}
		prefetch(skb->data - NET_IP_ALIGN);

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		skb_put(skb, bytes_written);
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		skb->protocol = eth_type_trans(skb, netdev);
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		skb_record_rx_queue(skb, q_number);
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		if ((netdev->features & NETIF_F_RXHASH) && rss_hash &&
		    (type == 3)) {
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			switch (rss_type) {
			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4:
			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6:
			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX:
				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L4);
				break;
			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv4:
			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6:
			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX:
				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L3);
				break;
			}
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		}
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		if (enic->vxlan.vxlan_udp_port_number) {
			switch (enic->vxlan.patch_level) {
			case 0:
				if (fcoe) {
					encap = true;
					outer_csum_ok = fcoe_fc_crc_ok;
				}
				break;
			case 2:
				if ((type == 7) &&
				    (rss_hash & BIT(0))) {
					encap = true;
					outer_csum_ok = (rss_hash & BIT(1)) &&
							(rss_hash & BIT(2));
				}
				break;
			}
		}
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		/* Hardware does not provide whole packet checksum. It only
		 * provides pseudo checksum. Since hw validates the packet
		 * checksum but not provide us the checksum value. use
		 * CHECSUM_UNNECESSARY.
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		 *
		 * In case of encap pkt tcp_udp_csum_ok/tcp_udp_csum_ok is
		 * inner csum_ok. outer_csum_ok is set by hw when outer udp
		 * csum is correct or is zero.
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		 */
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		if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc &&
		    tcp_udp_csum_ok && ipv4_csum_ok && outer_csum_ok) {
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			skb->ip_summed = CHECKSUM_UNNECESSARY;
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			skb->csum_level = encap;
		}
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1442
		if (vlan_stripped)
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			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
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		skb_mark_napi_id(skb, &enic->napi[rq->index]);
1446
		if (!(netdev->features & NETIF_F_GRO))
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1447
			netif_receive_skb(skb);
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		else
			napi_gro_receive(&enic->napi[q_number], skb);
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		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
			enic_intr_update_pkt_size(&cq->pkt_size_counter,
						  bytes_written);
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	} else {

		/* Buffer overflow
		 */

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		pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
				 PCI_DMA_FROMDEVICE);
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		dev_kfree_skb_any(skb);
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		buf->os_buf = NULL;
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	}
}

static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
	u8 type, u16 q_number, u16 completed_index, void *opaque)
{
	struct enic *enic = vnic_dev_priv(vdev);

	vnic_rq_service(&enic->rq[q_number], cq_desc,
		completed_index, VNIC_RQ_RETURN_DESC,
		enic_rq_indicate_buf, opaque);

	return 0;
}

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static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq)
{
	unsigned int intr = enic_msix_rq_intr(enic, rq->index);
	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
	u32 timer = cq->tobe_rx_coal_timeval;

	if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) {
		vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);
		cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval;
	}
}

static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq)
{
	struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
	struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter;
	int index;
	u32 timer;
	u32 range_start;
	u32 traffic;
	u64 delta;
	ktime_t now = ktime_get();

	delta = ktime_us_delta(now, cq->prev_ts);
	if (delta < ENIC_AIC_TS_BREAK)
		return;
	cq->prev_ts = now;

	traffic = pkt_size_counter->large_pkt_bytes_cnt +
		  pkt_size_counter->small_pkt_bytes_cnt;
	/* The table takes Mbps
	 * traffic *= 8    => bits
	 * traffic *= (10^6 / delta)    => bps
	 * traffic /= 10^6     => Mbps
	 *
	 * Combining, traffic *= (8 / delta)
	 */

	traffic <<= 3;
	traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta;

	for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++)
		if (traffic < mod_table[index].rx_rate)
			break;
	range_start = (pkt_size_counter->small_pkt_bytes_cnt >
		       pkt_size_counter->large_pkt_bytes_cnt << 1) ?
		      rx_coal->small_pkt_range_start :
		      rx_coal->large_pkt_range_start;
	timer = range_start + ((rx_coal->range_end - range_start) *
			       mod_table[index].range_percent / 100);
	/* Damping */
	cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1;

	pkt_size_counter->large_pkt_bytes_cnt = 0;
	pkt_size_counter->small_pkt_bytes_cnt = 0;
}

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static int enic_poll(struct napi_struct *napi, int budget)
{
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	struct net_device *netdev = napi->dev;
	struct enic *enic = netdev_priv(netdev);
	unsigned int cq_rq = enic_cq_rq(enic, 0);
	unsigned int cq_wq = enic_cq_wq(enic, 0);
	unsigned int intr = enic_legacy_io_intr();
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	unsigned int rq_work_to_do = budget;
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	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;
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	unsigned int  work_done, rq_work_done = 0, wq_work_done;
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	int err;
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	wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do,
				       enic_wq_service, NULL);

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	if (budget > 0)
		rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
			rq_work_to_do, enic_rq_service, NULL);
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	/* Accumulate intr event credits for this polling
	 * cycle.  An intr event is the completion of a
	 * a WQ or RQ packet.
	 */

	work_done = rq_work_done + wq_work_done;

	if (work_done > 0)
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		vnic_intr_return_credits(&enic->intr[intr],
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			work_done,
			0 /* don't unmask intr */,
			0 /* don't reset intr timer */);

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	err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
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	/* Buffer allocation failed. Stay in polling
	 * mode so we can try to fill the ring again.
	 */
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	if (err)
		rq_work_done = rq_work_to_do;
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	if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
		/* Call the function which refreshes the intr coalescing timer
		 * value based on the traffic.
		 */
		enic_calc_int_moderation(enic, &enic->rq[0]);
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1581
	if ((rq_work_done < budget) && napi_complete_done(napi, rq_work_done)) {
1582

1583
		/* Some work done, but not enough to stay in polling,
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		 * exit polling
1585 1586
		 */

1587 1588
		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
			enic_set_int_moderation(enic, &enic->rq[0]);
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		vnic_intr_unmask(&enic->intr[intr]);
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	}

	return rq_work_done;
}

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#ifdef CONFIG_RFS_ACCEL
static void enic_free_rx_cpu_rmap(struct enic *enic)
{
	free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap);
	enic->netdev->rx_cpu_rmap = NULL;
}

static void enic_set_rx_cpu_rmap(struct enic *enic)
{
	int i, res;

	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) {
		enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count);
		if (unlikely(!enic->netdev->rx_cpu_rmap))
			return;
		for (i = 0; i < enic->rq_count; i++) {
			res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap,
					       enic->msix_entry[i].vector);
			if (unlikely(res)) {
				enic_free_rx_cpu_rmap(enic);
				return;
			}
		}
	}
}

#else

static void enic_free_rx_cpu_rmap(struct enic *enic)
{
}

static void enic_set_rx_cpu_rmap(struct enic *enic)
{
}

#endif /* CONFIG_RFS_ACCEL */

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static int enic_poll_msix_wq(struct napi_struct *napi, int budget)
{
	struct net_device *netdev = napi->dev;
	struct enic *enic = netdev_priv(netdev);
	unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count;
	struct vnic_wq *wq = &enic->wq[wq_index];
	unsigned int cq;
	unsigned int intr;
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	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;
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	unsigned int wq_work_done;
	unsigned int wq_irq;

	wq_irq = wq->index;
	cq = enic_cq_wq(enic, wq_irq);
	intr = enic_msix_wq_intr(enic, wq_irq);
	wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do,
				       enic_wq_service, NULL);

	vnic_intr_return_credits(&enic->intr[intr], wq_work_done,
				 0 /* don't unmask intr */,
				 1 /* reset intr timer */);
	if (!wq_work_done) {
		napi_complete(napi);
		vnic_intr_unmask(&enic->intr[intr]);
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		return 0;
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	}

1660
	return budget;
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}

static int enic_poll_msix_rq(struct napi_struct *napi, int budget)
1664
{
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	struct net_device *netdev = napi->dev;
	struct enic *enic = netdev_priv(netdev);
	unsigned int rq = (napi - &enic->napi[0]);
	unsigned int cq = enic_cq_rq(enic, rq);
	unsigned int intr = enic_msix_rq_intr(enic, rq);
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	unsigned int work_to_do = budget;
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	unsigned int work_done = 0;
1672
	int err;
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	/* Service RQ
	 */

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	if (budget > 0)
		work_done = vnic_cq_service(&enic->cq[cq],
			work_to_do, enic_rq_service, NULL);
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	/* Return intr event credits for this polling
	 * cycle.  An intr event is the completion of a
	 * RQ packet.
	 */
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1686
	if (work_done > 0)
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		vnic_intr_return_credits(&enic->intr[intr],
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			work_done,
			0 /* don't unmask intr */,
			0 /* don't reset intr timer */);

1692
	err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
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	/* Buffer allocation failed. Stay in polling mode
	 * so we can try to fill the ring again.
	 */

	if (err)
		work_done = work_to_do;
1700
	if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
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		/* Call the function which refreshes the intr coalescing timer
		 * value based on the traffic.
1703 1704
		 */
		enic_calc_int_moderation(enic, &enic->rq[rq]);
1705

1706
	if ((work_done < budget) && napi_complete_done(napi, work_done)) {
1707 1708

		/* Some work done, but not enough to stay in polling,
1709
		 * exit polling
1710 1711
		 */

1712 1713
		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
			enic_set_int_moderation(enic, &enic->rq[rq]);
1714
		vnic_intr_unmask(&enic->intr[intr]);
1715 1716 1717 1718 1719
	}

	return work_done;
}

1720
static void enic_notify_timer(struct timer_list *t)
1721
{
1722
	struct enic *enic = from_timer(enic, t, notify_timer);
1723 1724 1725

	enic_notify_check(enic);

1726 1727
	mod_timer(&enic->notify_timer,
		round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
1728 1729 1730 1731 1732 1733 1734
}

static void enic_free_intr(struct enic *enic)
{
	struct net_device *netdev = enic->netdev;
	unsigned int i;

1735
	enic_free_rx_cpu_rmap(enic);
1736 1737 1738 1739
	switch (vnic_dev_get_intr_mode(enic->vdev)) {
	case VNIC_DEV_INTR_MODE_INTX:
		free_irq(enic->pdev->irq, netdev);
		break;
1740 1741 1742
	case VNIC_DEV_INTR_MODE_MSI:
		free_irq(enic->pdev->irq, enic);
		break;
1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756
	case VNIC_DEV_INTR_MODE_MSIX:
		for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
			if (enic->msix[i].requested)
				free_irq(enic->msix_entry[i].vector,
					enic->msix[i].devid);
		break;
	default:
		break;
	}
}

static int enic_request_intr(struct enic *enic)
{
	struct net_device *netdev = enic->netdev;
1757
	unsigned int i, intr;
1758 1759
	int err = 0;

1760
	enic_set_rx_cpu_rmap(enic);
1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776
	switch (vnic_dev_get_intr_mode(enic->vdev)) {

	case VNIC_DEV_INTR_MODE_INTX:

		err = request_irq(enic->pdev->irq, enic_isr_legacy,
			IRQF_SHARED, netdev->name, netdev);
		break;

	case VNIC_DEV_INTR_MODE_MSI:

		err = request_irq(enic->pdev->irq, enic_isr_msi,
			0, netdev->name, enic);
		break;

	case VNIC_DEV_INTR_MODE_MSIX:

1777 1778
		for (i = 0; i < enic->rq_count; i++) {
			intr = enic_msix_rq_intr(enic, i);
1779 1780
			snprintf(enic->msix[intr].devname,
				sizeof(enic->msix[intr].devname),
1781
				"%s-rx-%u", netdev->name, i);
1782
			enic->msix[intr].isr = enic_isr_msix;
1783 1784
			enic->msix[intr].devid = &enic->napi[i];
		}
1785

1786
		for (i = 0; i < enic->wq_count; i++) {
1787 1788
			int wq = enic_cq_wq(enic, i);

1789
			intr = enic_msix_wq_intr(enic, i);
1790 1791
			snprintf(enic->msix[intr].devname,
				sizeof(enic->msix[intr].devname),
1792
				"%s-tx-%u", netdev->name, i);
1793 1794
			enic->msix[intr].isr = enic_isr_msix;
			enic->msix[intr].devid = &enic->napi[wq];
1795
		}
1796

1797
		intr = enic_msix_err_intr(enic);
1798 1799
		snprintf(enic->msix[intr].devname,
			sizeof(enic->msix[intr].devname),
1800
			"%s-err", netdev->name);
1801 1802
		enic->msix[intr].isr = enic_isr_msix_err;
		enic->msix[intr].devid = enic;
1803

1804
		intr = enic_msix_notify_intr(enic);
1805 1806
		snprintf(enic->msix[intr].devname,
			sizeof(enic->msix[intr].devname),
1807
			"%s-notify", netdev->name);
1808 1809 1810 1811 1812
		enic->msix[intr].isr = enic_isr_msix_notify;
		enic->msix[intr].devid = enic;

		for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
			enic->msix[i].requested = 0;
1813

1814
		for (i = 0; i < enic->intr_count; i++) {
1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834
			err = request_irq(enic->msix_entry[i].vector,
				enic->msix[i].isr, 0,
				enic->msix[i].devname,
				enic->msix[i].devid);
			if (err) {
				enic_free_intr(enic);
				break;
			}
			enic->msix[i].requested = 1;
		}

		break;

	default:
		break;
	}

	return err;
}

1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852
static void enic_synchronize_irqs(struct enic *enic)
{
	unsigned int i;

	switch (vnic_dev_get_intr_mode(enic->vdev)) {
	case VNIC_DEV_INTR_MODE_INTX:
	case VNIC_DEV_INTR_MODE_MSI:
		synchronize_irq(enic->pdev->irq);
		break;
	case VNIC_DEV_INTR_MODE_MSIX:
		for (i = 0; i < enic->intr_count; i++)
			synchronize_irq(enic->msix_entry[i].vector);
		break;
	default:
		break;
	}
}

1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882
static void enic_set_rx_coal_setting(struct enic *enic)
{
	unsigned int speed;
	int index = -1;
	struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;

	/* 1. Read the link speed from fw
	 * 2. Pick the default range for the speed
	 * 3. Update it in enic->rx_coalesce_setting
	 */
	speed = vnic_dev_port_speed(enic->vdev);
	if (ENIC_LINK_SPEED_10G < speed)
		index = ENIC_LINK_40G_INDEX;
	else if (ENIC_LINK_SPEED_4G < speed)
		index = ENIC_LINK_10G_INDEX;
	else
		index = ENIC_LINK_4G_INDEX;

	rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start;
	rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start;
	rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END;

	/* Start with the value provided by UCSM */
	for (index = 0; index < enic->rq_count; index++)
		enic->cq[index].cur_rx_coal_timeval =
				enic->config.intr_timer_usec;

	rx_coal->use_adaptive_rx_coalesce = 1;
}

1883
static int enic_dev_notify_set(struct enic *enic)
1884 1885 1886
{
	int err;

1887
	spin_lock_bh(&enic->devcmd_lock);
1888 1889
	switch (vnic_dev_get_intr_mode(enic->vdev)) {
	case VNIC_DEV_INTR_MODE_INTX:
1890 1891
		err = vnic_dev_notify_set(enic->vdev,
			enic_legacy_notify_intr());
1892 1893
		break;
	case VNIC_DEV_INTR_MODE_MSIX:
1894 1895
		err = vnic_dev_notify_set(enic->vdev,
			enic_msix_notify_intr(enic));
1896 1897 1898 1899 1900
		break;
	default:
		err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
		break;
	}
1901
	spin_unlock_bh(&enic->devcmd_lock);
1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914

	return err;
}

static void enic_notify_timer_start(struct enic *enic)
{
	switch (vnic_dev_get_intr_mode(enic->vdev)) {
	case VNIC_DEV_INTR_MODE_MSI:
		mod_timer(&enic->notify_timer, jiffies);
		break;
	default:
		/* Using intr for notification for INTx/MSI-X */
		break;
1915
	}
1916 1917 1918 1919 1920 1921 1922
}

/* rtnl lock is held, process context */
static int enic_open(struct net_device *netdev)
{
	struct enic *enic = netdev_priv(netdev);
	unsigned int i;
1923
	int err, ret;
1924

1925 1926
	err = enic_request_intr(enic);
	if (err) {
1927
		netdev_err(netdev, "Unable to request irq.\n");
1928 1929
		return err;
	}
1930 1931
	enic_init_affinity_hint(enic);
	enic_set_affinity_hint(enic);
1932

1933
	err = enic_dev_notify_set(enic);
1934
	if (err) {
1935 1936
		netdev_err(netdev,
			"Failed to alloc notify buffer, aborting.\n");
1937 1938 1939
		goto err_out_free_intr;
	}

1940
	for (i = 0; i < enic->rq_count; i++) {
1941 1942
		/* enable rq before updating rq desc */
		vnic_rq_enable(&enic->rq[i]);
1943
		vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
1944 1945
		/* Need at least one buffer on ring to get going */
		if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
1946
			netdev_err(netdev, "Unable to alloc receive buffers\n");
1947
			err = -ENOMEM;
1948
			goto err_out_free_rq;
1949 1950 1951 1952 1953 1954
		}
	}

	for (i = 0; i < enic->wq_count; i++)
		vnic_wq_enable(&enic->wq[i]);

1955
	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1956
		enic_dev_add_station_addr(enic);
1957

1958
	enic_set_rx_mode(netdev);
1959

1960
	netif_tx_wake_all_queues(netdev);
1961

1962
	for (i = 0; i < enic->rq_count; i++)
1963
		napi_enable(&enic->napi[i]);
1964

1965 1966 1967
	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
		for (i = 0; i < enic->wq_count; i++)
			napi_enable(&enic->napi[enic_cq_wq(enic, i)]);
1968
	enic_dev_enable(enic);
1969 1970 1971 1972 1973

	for (i = 0; i < enic->intr_count; i++)
		vnic_intr_unmask(&enic->intr[i]);

	enic_notify_timer_start(enic);
1974
	enic_rfs_timer_start(enic);
1975 1976

	return 0;
1977

1978
err_out_free_rq:
1979
	for (i = 0; i < enic->rq_count; i++) {
1980 1981 1982
		ret = vnic_rq_disable(&enic->rq[i]);
		if (!ret)
			vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1983
	}
1984
	enic_dev_notify_unset(enic);
1985
err_out_free_intr:
1986
	enic_unset_affinity_hint(enic);
1987 1988 1989
	enic_free_intr(enic);

	return err;
1990 1991 1992 1993 1994 1995 1996 1997 1998
}

/* rtnl lock is held, process context */
static int enic_stop(struct net_device *netdev)
{
	struct enic *enic = netdev_priv(netdev);
	unsigned int i;
	int err;

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1999
	for (i = 0; i < enic->intr_count; i++) {
2000
		vnic_intr_mask(&enic->intr[i]);
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2001 2002
		(void)vnic_intr_masked(&enic->intr[i]); /* flush write */
	}
2003 2004 2005

	enic_synchronize_irqs(enic);

2006
	del_timer_sync(&enic->notify_timer);
2007
	enic_rfs_flw_tbl_free(enic);
2008

2009
	enic_dev_disable(enic);
2010

2011
	for (i = 0; i < enic->rq_count; i++)
2012 2013
		napi_disable(&enic->napi[i]);

2014 2015
	netif_carrier_off(netdev);
	netif_tx_disable(netdev);
2016 2017 2018
	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
		for (i = 0; i < enic->wq_count; i++)
			napi_disable(&enic->napi[enic_cq_wq(enic, i)]);
2019

2020
	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
2021
		enic_dev_del_station_addr(enic);
2022

2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033
	for (i = 0; i < enic->wq_count; i++) {
		err = vnic_wq_disable(&enic->wq[i]);
		if (err)
			return err;
	}
	for (i = 0; i < enic->rq_count; i++) {
		err = vnic_rq_disable(&enic->rq[i]);
		if (err)
			return err;
	}

2034
	enic_dev_notify_unset(enic);
2035
	enic_unset_affinity_hint(enic);
2036 2037
	enic_free_intr(enic);

2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049
	for (i = 0; i < enic->wq_count; i++)
		vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
	for (i = 0; i < enic->rq_count; i++)
		vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
	for (i = 0; i < enic->cq_count; i++)
		vnic_cq_clean(&enic->cq[i]);
	for (i = 0; i < enic->intr_count; i++)
		vnic_intr_clean(&enic->intr[i]);

	return 0;
}

2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072
static int _enic_change_mtu(struct net_device *netdev, int new_mtu)
{
	bool running = netif_running(netdev);
	int err = 0;

	ASSERT_RTNL();
	if (running) {
		err = enic_stop(netdev);
		if (err)
			return err;
	}

	netdev->mtu = new_mtu;

	if (running) {
		err = enic_open(netdev);
		if (err)
			return err;
	}

	return 0;
}

2073 2074 2075 2076
static int enic_change_mtu(struct net_device *netdev, int new_mtu)
{
	struct enic *enic = netdev_priv(netdev);

2077
	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
2078 2079
		return -EOPNOTSUPP;

2080
	if (netdev->mtu > enic->port_mtu)
2081
		netdev_warn(netdev,
2082 2083
			    "interface MTU (%d) set higher than port MTU (%d)\n",
			    netdev->mtu, enic->port_mtu);
2084

2085
	return _enic_change_mtu(netdev, new_mtu);
2086 2087
}

2088 2089 2090 2091 2092 2093 2094
static void enic_change_mtu_work(struct work_struct *work)
{
	struct enic *enic = container_of(work, struct enic, change_mtu_work);
	struct net_device *netdev = enic->netdev;
	int new_mtu = vnic_dev_mtu(enic->vdev);

	rtnl_lock();
2095
	(void)_enic_change_mtu(netdev, new_mtu);
2096 2097 2098 2099 2100
	rtnl_unlock();

	netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
}

2101 2102 2103 2104 2105
#ifdef CONFIG_NET_POLL_CONTROLLER
static void enic_poll_controller(struct net_device *netdev)
{
	struct enic *enic = netdev_priv(netdev);
	struct vnic_dev *vdev = enic->vdev;
2106
	unsigned int i, intr;
2107 2108 2109

	switch (vnic_dev_get_intr_mode(vdev)) {
	case VNIC_DEV_INTR_MODE_MSIX:
2110 2111
		for (i = 0; i < enic->rq_count; i++) {
			intr = enic_msix_rq_intr(enic, i);
2112 2113
			enic_isr_msix(enic->msix_entry[intr].vector,
				      &enic->napi[i]);
2114
		}
2115 2116 2117

		for (i = 0; i < enic->wq_count; i++) {
			intr = enic_msix_wq_intr(enic, i);
2118 2119
			enic_isr_msix(enic->msix_entry[intr].vector,
				      &enic->napi[enic_cq_wq(enic, i)]);
2120 2121
		}

2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172
		break;
	case VNIC_DEV_INTR_MODE_MSI:
		enic_isr_msi(enic->pdev->irq, enic);
		break;
	case VNIC_DEV_INTR_MODE_INTX:
		enic_isr_legacy(enic->pdev->irq, netdev);
		break;
	default:
		break;
	}
}
#endif

static int enic_dev_wait(struct vnic_dev *vdev,
	int (*start)(struct vnic_dev *, int),
	int (*finished)(struct vnic_dev *, int *),
	int arg)
{
	unsigned long time;
	int done;
	int err;

	BUG_ON(in_interrupt());

	err = start(vdev, arg);
	if (err)
		return err;

	/* Wait for func to complete...2 seconds max
	 */

	time = jiffies + (HZ * 2);
	do {

		err = finished(vdev, &done);
		if (err)
			return err;

		if (done)
			return 0;

		schedule_timeout_uninterruptible(HZ / 10);

	} while (time_after(time, jiffies));

	return -ETIMEDOUT;
}

static int enic_dev_open(struct enic *enic)
{
	int err;
2173
	u32 flags = CMD_OPENF_IG_DESCCACHE;
2174 2175

	err = enic_dev_wait(enic->vdev, vnic_dev_open,
2176
		vnic_dev_open_done, flags);
2177
	if (err)
2178 2179
		dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
			err);
2180 2181 2182 2183

	return err;
}

2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196
static int enic_dev_soft_reset(struct enic *enic)
{
	int err;

	err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset,
			    vnic_dev_soft_reset_done, 0);
	if (err)
		netdev_err(enic->netdev, "vNIC soft reset failed, err %d\n",
			   err);

	return err;
}

2197
static int enic_dev_hang_reset(struct enic *enic)
2198 2199 2200
{
	int err;

2201 2202
	err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
		vnic_dev_hang_reset_done, 0);
2203
	if (err)
2204 2205
		netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
			err);
2206 2207 2208 2209

	return err;
}

2210
int __enic_set_rsskey(struct enic *enic)
2211
{
2212
	union vnic_rss_key *rss_key_buf_va;
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2213
	dma_addr_t rss_key_buf_pa;
2214
	int i, kidx, bidx, err;
2215

2216 2217 2218
	rss_key_buf_va = pci_zalloc_consistent(enic->pdev,
					       sizeof(union vnic_rss_key),
					       &rss_key_buf_pa);
2219 2220 2221
	if (!rss_key_buf_va)
		return -ENOMEM;

2222 2223 2224
	for (i = 0; i < ENIC_RSS_LEN; i++) {
		kidx = i / ENIC_RSS_BYTES_PER_KEY;
		bidx = i % ENIC_RSS_BYTES_PER_KEY;
2225
		rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i];
2226
	}
2227
	spin_lock_bh(&enic->devcmd_lock);
2228 2229 2230
	err = enic_set_rss_key(enic,
		rss_key_buf_pa,
		sizeof(union vnic_rss_key));
2231
	spin_unlock_bh(&enic->devcmd_lock);
2232 2233 2234 2235 2236 2237 2238

	pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
		rss_key_buf_va, rss_key_buf_pa);

	return err;
}

2239 2240 2241 2242 2243 2244 2245
static int enic_set_rsskey(struct enic *enic)
{
	netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN);

	return __enic_set_rsskey(enic);
}

2246 2247
static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
{
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2248
	dma_addr_t rss_cpu_buf_pa;
2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260
	union vnic_rss_cpu *rss_cpu_buf_va = NULL;
	unsigned int i;
	int err;

	rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
		sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
	if (!rss_cpu_buf_va)
		return -ENOMEM;

	for (i = 0; i < (1 << rss_hash_bits); i++)
		(*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;

2261
	spin_lock_bh(&enic->devcmd_lock);
2262 2263 2264
	err = enic_set_rss_cpu(enic,
		rss_cpu_buf_pa,
		sizeof(union vnic_rss_cpu));
2265
	spin_unlock_bh(&enic->devcmd_lock);
2266 2267 2268 2269 2270 2271 2272 2273 2274

	pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
		rss_cpu_buf_va, rss_cpu_buf_pa);

	return err;
}

static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
	u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
2275 2276 2277
{
	const u8 tso_ipid_split_en = 0;
	const u8 ig_vlan_strip_en = 1;
2278
	int err;
2279

2280 2281
	/* Enable VLAN tag stripping.
	*/
2282

2283
	spin_lock_bh(&enic->devcmd_lock);
2284
	err = enic_set_nic_cfg(enic,
2285 2286 2287 2288
		rss_default_cpu, rss_hash_type,
		rss_hash_bits, rss_base_cpu,
		rss_enable, tso_ipid_split_en,
		ig_vlan_strip_en);
2289
	spin_unlock_bh(&enic->devcmd_lock);
2290 2291 2292 2293

	return err;
}

2294 2295 2296 2297 2298 2299
static int enic_set_rss_nic_cfg(struct enic *enic)
{
	struct device *dev = enic_get_dev(enic);
	const u8 rss_default_cpu = 0;
	const u8 rss_hash_bits = 7;
	const u8 rss_base_cpu = 0;
2300 2301
	u8 rss_hash_type;
	int res;
2302 2303
	u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);

2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315
	spin_lock_bh(&enic->devcmd_lock);
	res = vnic_dev_capable_rss_hash_type(enic->vdev, &rss_hash_type);
	spin_unlock_bh(&enic->devcmd_lock);
	if (res) {
		/* defaults for old adapters
		 */
		rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4	|
				NIC_CFG_RSS_HASH_TYPE_TCP_IPV4	|
				NIC_CFG_RSS_HASH_TYPE_IPV6	|
				NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
	}

2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330
	if (rss_enable) {
		if (!enic_set_rsskey(enic)) {
			if (enic_set_rsscpu(enic, rss_hash_bits)) {
				rss_enable = 0;
				dev_warn(dev, "RSS disabled, "
					"Failed to set RSS cpu indirection table.");
			}
		} else {
			rss_enable = 0;
			dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
		}
	}

	return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
		rss_hash_bits, rss_base_cpu, rss_enable);
2331 2332
}

2333 2334 2335 2336 2337 2338 2339 2340 2341
static void enic_reset(struct work_struct *work)
{
	struct enic *enic = container_of(work, struct enic, reset);

	if (!netif_running(enic->netdev))
		return;

	rtnl_lock();

2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361
	spin_lock(&enic->enic_api_lock);
	enic_stop(enic->netdev);
	enic_dev_soft_reset(enic);
	enic_reset_addr_lists(enic);
	enic_init_vnic_resources(enic);
	enic_set_rss_nic_cfg(enic);
	enic_dev_set_ig_vlan_rewrite_mode(enic);
	enic_open(enic->netdev);
	spin_unlock(&enic->enic_api_lock);
	call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);

	rtnl_unlock();
}

static void enic_tx_hang_reset(struct work_struct *work)
{
	struct enic *enic = container_of(work, struct enic, tx_hang_reset);

	rtnl_lock();

2362
	spin_lock(&enic->enic_api_lock);
2363
	enic_dev_hang_notify(enic);
2364
	enic_stop(enic->netdev);
2365
	enic_dev_hang_reset(enic);
2366
	enic_reset_addr_lists(enic);
2367
	enic_init_vnic_resources(enic);
2368
	enic_set_rss_nic_cfg(enic);
2369
	enic_dev_set_ig_vlan_rewrite_mode(enic);
2370
	enic_open(enic->netdev);
2371
	spin_unlock(&enic->enic_api_lock);
2372
	call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
2373 2374 2375 2376 2377 2378

	rtnl_unlock();
}

static int enic_set_intr_mode(struct enic *enic)
{
2379
	unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
2380
	unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
2381 2382 2383
	unsigned int i;

	/* Set interrupt mode (INTx, MSI, MSI-X) depending
2384
	 * on system capabilities.
2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396
	 *
	 * Try MSI-X first
	 *
	 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
	 * (the second to last INTR is used for WQ/RQ errors)
	 * (the last INTR is used for notifications)
	 */

	BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
	for (i = 0; i < n + m + 2; i++)
		enic->msix_entry[i].entry = i;

2397 2398 2399 2400 2401
	/* Use multiple RQs if RSS is enabled
	 */

	if (ENIC_SETTING(enic, RSS) &&
	    enic->config.intr_mode < 1 &&
2402 2403 2404
	    enic->rq_count >= n &&
	    enic->wq_count >= m &&
	    enic->cq_count >= n + m &&
2405
	    enic->intr_count >= n + m + 2) {
2406

2407 2408
		if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
					  n + m + 2, n + m + 2) > 0) {
2409

2410 2411 2412 2413
			enic->rq_count = n;
			enic->wq_count = m;
			enic->cq_count = n + m;
			enic->intr_count = n + m + 2;
2414

2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426
			vnic_dev_set_intr_mode(enic->vdev,
				VNIC_DEV_INTR_MODE_MSIX);

			return 0;
		}
	}

	if (enic->config.intr_mode < 1 &&
	    enic->rq_count >= 1 &&
	    enic->wq_count >= m &&
	    enic->cq_count >= 1 + m &&
	    enic->intr_count >= 1 + m + 2) {
2427 2428
		if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
					  1 + m + 2, 1 + m + 2) > 0) {
2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439

			enic->rq_count = 1;
			enic->wq_count = m;
			enic->cq_count = 1 + m;
			enic->intr_count = 1 + m + 2;

			vnic_dev_set_intr_mode(enic->vdev,
				VNIC_DEV_INTR_MODE_MSIX);

			return 0;
		}
2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508
	}

	/* Next try MSI
	 *
	 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
	 */

	if (enic->config.intr_mode < 2 &&
	    enic->rq_count >= 1 &&
	    enic->wq_count >= 1 &&
	    enic->cq_count >= 2 &&
	    enic->intr_count >= 1 &&
	    !pci_enable_msi(enic->pdev)) {

		enic->rq_count = 1;
		enic->wq_count = 1;
		enic->cq_count = 2;
		enic->intr_count = 1;

		vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);

		return 0;
	}

	/* Next try INTx
	 *
	 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
	 * (the first INTR is used for WQ/RQ)
	 * (the second INTR is used for WQ/RQ errors)
	 * (the last INTR is used for notifications)
	 */

	if (enic->config.intr_mode < 3 &&
	    enic->rq_count >= 1 &&
	    enic->wq_count >= 1 &&
	    enic->cq_count >= 2 &&
	    enic->intr_count >= 3) {

		enic->rq_count = 1;
		enic->wq_count = 1;
		enic->cq_count = 2;
		enic->intr_count = 3;

		vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);

		return 0;
	}

	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);

	return -EINVAL;
}

static void enic_clear_intr_mode(struct enic *enic)
{
	switch (vnic_dev_get_intr_mode(enic->vdev)) {
	case VNIC_DEV_INTR_MODE_MSIX:
		pci_disable_msix(enic->pdev);
		break;
	case VNIC_DEV_INTR_MODE_MSI:
		pci_disable_msi(enic->pdev);
		break;
	default:
		break;
	}

	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
}

2509 2510 2511 2512
static const struct net_device_ops enic_netdev_dynamic_ops = {
	.ndo_open		= enic_open,
	.ndo_stop		= enic_stop,
	.ndo_start_xmit		= enic_hard_start_xmit,
2513
	.ndo_get_stats64	= enic_get_stats,
2514
	.ndo_validate_addr	= eth_validate_addr,
2515
	.ndo_set_rx_mode	= enic_set_rx_mode,
2516 2517 2518 2519 2520 2521 2522
	.ndo_set_mac_address	= enic_set_mac_address_dynamic,
	.ndo_change_mtu		= enic_change_mtu,
	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
	.ndo_tx_timeout		= enic_tx_timeout,
	.ndo_set_vf_port	= enic_set_vf_port,
	.ndo_get_vf_port	= enic_get_vf_port,
2523
	.ndo_set_vf_mac		= enic_set_vf_mac,
2524 2525 2526
#ifdef CONFIG_NET_POLL_CONTROLLER
	.ndo_poll_controller	= enic_poll_controller,
#endif
2527 2528 2529
#ifdef CONFIG_RFS_ACCEL
	.ndo_rx_flow_steer	= enic_rx_flow_steer,
#endif
2530 2531
	.ndo_udp_tunnel_add	= enic_udp_tunnel_add,
	.ndo_udp_tunnel_del	= enic_udp_tunnel_del,
2532
	.ndo_features_check	= enic_features_check,
2533 2534
};

2535 2536 2537
static const struct net_device_ops enic_netdev_ops = {
	.ndo_open		= enic_open,
	.ndo_stop		= enic_stop,
2538
	.ndo_start_xmit		= enic_hard_start_xmit,
2539
	.ndo_get_stats64	= enic_get_stats,
2540
	.ndo_validate_addr	= eth_validate_addr,
2541
	.ndo_set_mac_address	= enic_set_mac_address,
2542
	.ndo_set_rx_mode	= enic_set_rx_mode,
2543 2544 2545 2546
	.ndo_change_mtu		= enic_change_mtu,
	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
	.ndo_tx_timeout		= enic_tx_timeout,
2547 2548 2549
	.ndo_set_vf_port	= enic_set_vf_port,
	.ndo_get_vf_port	= enic_get_vf_port,
	.ndo_set_vf_mac		= enic_set_vf_mac,
2550 2551 2552
#ifdef CONFIG_NET_POLL_CONTROLLER
	.ndo_poll_controller	= enic_poll_controller,
#endif
2553 2554 2555
#ifdef CONFIG_RFS_ACCEL
	.ndo_rx_flow_steer	= enic_rx_flow_steer,
#endif
2556 2557
	.ndo_udp_tunnel_add	= enic_udp_tunnel_add,
	.ndo_udp_tunnel_del	= enic_udp_tunnel_del,
2558
	.ndo_features_check	= enic_features_check,
2559 2560
};

2561
static void enic_dev_deinit(struct enic *enic)
2562
{
2563 2564
	unsigned int i;

2565 2566
	for (i = 0; i < enic->rq_count; i++) {
		napi_hash_del(&enic->napi[i]);
2567
		netif_napi_del(&enic->napi[i]);
2568
	}
2569 2570 2571
	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
		for (i = 0; i < enic->wq_count; i++)
			netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]);
2572

2573 2574
	enic_free_vnic_resources(enic);
	enic_clear_intr_mode(enic);
2575
	enic_free_affinity_hint(enic);
2576 2577
}

2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589
static void enic_kdump_kernel_config(struct enic *enic)
{
	if (is_kdump_kernel()) {
		dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n");
		enic->rq_count = 1;
		enic->wq_count = 1;
		enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS;
		enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS;
		enic->config.mtu = min_t(u16, 1500, enic->config.mtu);
	}
}

2590
static int enic_dev_init(struct enic *enic)
2591
{
2592
	struct device *dev = enic_get_dev(enic);
2593
	struct net_device *netdev = enic->netdev;
2594
	unsigned int i;
2595 2596
	int err;

2597 2598 2599 2600 2601 2602 2603 2604
	/* Get interrupt coalesce timer info */
	err = enic_dev_intr_coal_timer_info(enic);
	if (err) {
		dev_warn(dev, "Using default conversion factor for "
			"interrupt coalesce timer\n");
		vnic_dev_intr_coal_timer_info_default(enic->vdev);
	}

2605 2606 2607 2608 2609
	/* Get vNIC configuration
	 */

	err = enic_get_vnic_config(enic);
	if (err) {
2610
		dev_err(dev, "Get vNIC configuration failed, aborting\n");
2611 2612 2613 2614 2615 2616 2617 2618
		return err;
	}

	/* Get available resource counts
	 */

	enic_get_res_counts(enic);

2619 2620 2621 2622
	/* modify resource count if we are in kdump_kernel
	 */
	enic_kdump_kernel_config(enic);

2623 2624 2625 2626 2627 2628
	/* Set interrupt mode based on resource counts and system
	 * capabilities
	 */

	err = enic_set_intr_mode(enic);
	if (err) {
2629 2630
		dev_err(dev, "Failed to set intr mode based on resource "
			"counts and system capabilities, aborting\n");
2631 2632 2633 2634 2635 2636 2637 2638
		return err;
	}

	/* Allocate and configure vNIC resources
	 */

	err = enic_alloc_vnic_resources(enic);
	if (err) {
2639
		dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
2640 2641 2642 2643 2644
		goto err_out_free_vnic_resources;
	}

	enic_init_vnic_resources(enic);

2645
	err = enic_set_rss_nic_cfg(enic);
2646
	if (err) {
2647
		dev_err(dev, "Failed to config nic, aborting\n");
2648 2649 2650 2651 2652
		goto err_out_free_vnic_resources;
	}

	switch (vnic_dev_get_intr_mode(enic->vdev)) {
	default:
2653
		netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
2654 2655
		break;
	case VNIC_DEV_INTR_MODE_MSIX:
2656
		for (i = 0; i < enic->rq_count; i++) {
2657
			netif_napi_add(netdev, &enic->napi[i],
2658
				enic_poll_msix_rq, NAPI_POLL_WEIGHT);
2659
		}
2660 2661 2662
		for (i = 0; i < enic->wq_count; i++)
			netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)],
				       enic_poll_msix_wq, NAPI_POLL_WEIGHT);
2663 2664 2665 2666 2667 2668
		break;
	}

	return 0;

err_out_free_vnic_resources:
2669
	enic_free_affinity_hint(enic);
2670 2671 2672 2673 2674 2675
	enic_clear_intr_mode(enic);
	enic_free_vnic_resources(enic);

	return err;
}

2676 2677 2678 2679 2680 2681 2682 2683 2684
static void enic_iounmap(struct enic *enic)
{
	unsigned int i;

	for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
		if (enic->bar[i].vaddr)
			iounmap(enic->bar[i].vaddr);
}

2685
static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2686
{
2687
	struct device *dev = &pdev->dev;
2688 2689 2690 2691 2692
	struct net_device *netdev;
	struct enic *enic;
	int using_dac = 0;
	unsigned int i;
	int err;
Roopa Prabhu's avatar
Roopa Prabhu committed
2693 2694 2695
#ifdef CONFIG_PCI_IOV
	int pos = 0;
#endif
2696
	int num_pps = 1;
2697 2698 2699 2700 2701

	/* Allocate net device structure and initialize.  Private
	 * instance data is initialized to zero.
	 */

2702 2703
	netdev = alloc_etherdev_mqs(sizeof(struct enic),
				    ENIC_RQ_MAX, ENIC_WQ_MAX);
2704
	if (!netdev)
2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717
		return -ENOMEM;

	pci_set_drvdata(pdev, netdev);

	SET_NETDEV_DEV(netdev, &pdev->dev);

	enic = netdev_priv(netdev);
	enic->netdev = netdev;
	enic->pdev = pdev;

	/* Setup PCI resources
	 */

Vasanthy Kolluri's avatar
Vasanthy Kolluri committed
2718
	err = pci_enable_device_mem(pdev);
2719
	if (err) {
2720
		dev_err(dev, "Cannot enable PCI device, aborting\n");
2721 2722 2723 2724 2725
		goto err_out_free_netdev;
	}

	err = pci_request_regions(pdev, DRV_NAME);
	if (err) {
2726
		dev_err(dev, "Cannot request PCI regions, aborting\n");
2727 2728 2729 2730 2731 2732
		goto err_out_disable_device;
	}

	pci_set_master(pdev);

	/* Query PCI controller on system for DMA addressing
2733
	 * limitation for the device.  Try 47-bit first, and
2734 2735 2736
	 * fail to 32-bit.
	 */

2737
	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(47));
2738
	if (err) {
2739
		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2740
		if (err) {
2741
			dev_err(dev, "No usable DMA configuration, aborting\n");
2742 2743
			goto err_out_release_regions;
		}
2744
		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2745
		if (err) {
2746 2747
			dev_err(dev, "Unable to obtain %u-bit DMA "
				"for consistent allocations, aborting\n", 32);
2748 2749 2750
			goto err_out_release_regions;
		}
	} else {
2751
		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(47));
2752
		if (err) {
2753
			dev_err(dev, "Unable to obtain %u-bit DMA "
2754
				"for consistent allocations, aborting\n", 47);
2755 2756 2757 2758 2759
			goto err_out_release_regions;
		}
		using_dac = 1;
	}

2760
	/* Map vNIC resources from BAR0-5
2761 2762
	 */

2763 2764 2765 2766 2767 2768
	for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
		if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
			continue;
		enic->bar[i].len = pci_resource_len(pdev, i);
		enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
		if (!enic->bar[i].vaddr) {
2769
			dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
2770 2771 2772 2773
			err = -ENODEV;
			goto err_out_iounmap;
		}
		enic->bar[i].bus_addr = pci_resource_start(pdev, i);
2774 2775 2776 2777 2778
	}

	/* Register vNIC device
	 */

2779 2780
	enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
		ARRAY_SIZE(enic->bar));
2781
	if (!enic->vdev) {
2782
		dev_err(dev, "vNIC registration failed, aborting\n");
2783 2784 2785 2786
		err = -ENODEV;
		goto err_out_iounmap;
	}

2787 2788 2789 2790 2791
	err = vnic_devcmd_init(enic->vdev);

	if (err)
		goto err_out_vnic_unregister;

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2792 2793 2794 2795 2796
#ifdef CONFIG_PCI_IOV
	/* Get number of subvnics */
	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
	if (pos) {
		pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2797
			&enic->num_vfs);
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2798 2799 2800 2801 2802 2803 2804 2805 2806
		if (enic->num_vfs) {
			err = pci_enable_sriov(pdev, enic->num_vfs);
			if (err) {
				dev_err(dev, "SRIOV enable failed, aborting."
					" pci_enable_sriov() returned %d\n",
					err);
				goto err_out_vnic_unregister;
			}
			enic->priv_flags |= ENIC_SRIOV_ENABLED;
2807
			num_pps = enic->num_vfs;
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2808 2809 2810
		}
	}
#endif
2811

2812
	/* Allocate structure for port profiles */
2813
	enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
2814 2815
	if (!enic->pp) {
		err = -ENOMEM;
2816
		goto err_out_disable_sriov_pp;
2817 2818
	}

2819 2820 2821 2822 2823
	/* Issue device open to get device in known state
	 */

	err = enic_dev_open(enic);
	if (err) {
2824
		dev_err(dev, "vNIC dev open failed, aborting\n");
2825
		goto err_out_disable_sriov;
2826 2827
	}

2828 2829 2830 2831
	/* Setup devcmd lock
	 */

	spin_lock_init(&enic->devcmd_lock);
2832
	spin_lock_init(&enic->enic_api_lock);
2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844

	/*
	 * Set ingress vlan rewrite mode before vnic initialization
	 */

	err = enic_dev_set_ig_vlan_rewrite_mode(enic);
	if (err) {
		dev_err(dev,
			"Failed to set ingress vlan rewrite mode, aborting.\n");
		goto err_out_dev_close;
	}

2845 2846 2847 2848 2849 2850 2851 2852 2853 2854
	/* Issue device init to initialize the vnic-to-switch link.
	 * We'll start with carrier off and wait for link UP
	 * notification later to turn on carrier.  We don't need
	 * to wait here for the vnic-to-switch link initialization
	 * to complete; link UP notification is the indication that
	 * the process is complete.
	 */

	netif_carrier_off(netdev);

2855 2856 2857 2858 2859
	/* Do not call dev_init for a dynamic vnic.
	 * For a dynamic vnic, init_prov_info will be
	 * called later by an upper layer.
	 */

2860
	if (!enic_is_dynamic(enic)) {
2861 2862
		err = vnic_dev_init(enic->vdev, 0);
		if (err) {
2863
			dev_err(dev, "vNIC dev init failed, aborting\n");
2864 2865
			goto err_out_dev_close;
		}
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	}

2868
	err = enic_dev_init(enic);
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	if (err) {
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		dev_err(dev, "Device initialization failed, aborting\n");
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		goto err_out_dev_close;
	}

2874
	netif_set_real_num_tx_queues(netdev, enic->wq_count);
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	netif_set_real_num_rx_queues(netdev, enic->rq_count);
2876

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	/* Setup notification timer, HW reset task, and wq locks
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	 */

2880
	timer_setup(&enic->notify_timer, enic_notify_timer, 0);
2881

2882
	enic_rfs_flw_tbl_init(enic);
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	enic_set_rx_coal_setting(enic);
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	INIT_WORK(&enic->reset, enic_reset);
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	INIT_WORK(&enic->tx_hang_reset, enic_tx_hang_reset);
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	INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897

	for (i = 0; i < enic->wq_count; i++)
		spin_lock_init(&enic->wq_lock[i]);

	/* Register net device
	 */

	enic->port_mtu = enic->config.mtu;

	err = enic_set_mac_addr(netdev, enic->mac_addr);
	if (err) {
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		dev_err(dev, "Invalid MAC address, aborting\n");
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		goto err_out_dev_deinit;
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	}

2902
	enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
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	/* rx coalesce time already got initialized. This gets used
	 * if adaptive coal is turned off
	 */
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	enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;

2908
	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
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		netdev->netdev_ops = &enic_netdev_dynamic_ops;
	else
		netdev->netdev_ops = &enic_netdev_ops;

2913
	netdev->watchdog_timeo = 2 * HZ;
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	enic_set_ethtool_ops(netdev);
2915

2916
	netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
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	if (ENIC_SETTING(enic, LOOP)) {
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		netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
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		enic->loop_enable = 1;
		enic->loop_tag = enic->config.loop_tag;
		dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
	}
2923
	if (ENIC_SETTING(enic, TXCSUM))
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		netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2925
	if (ENIC_SETTING(enic, TSO))
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		netdev->hw_features |= NETIF_F_TSO |
2927
			NETIF_F_TSO6 | NETIF_F_TSO_ECN;
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	if (ENIC_SETTING(enic, RSS))
		netdev->hw_features |= NETIF_F_RXHASH;
2930 2931
	if (ENIC_SETTING(enic, RXCSUM))
		netdev->hw_features |= NETIF_F_RXCSUM;
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	if (ENIC_SETTING(enic, VXLAN)) {
		u64 patch_level;
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		u64 a1 = 0;
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		netdev->hw_enc_features |= NETIF_F_RXCSUM		|
					   NETIF_F_TSO			|
2938
					   NETIF_F_TSO6			|
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					   NETIF_F_TSO_ECN		|
					   NETIF_F_GSO_UDP_TUNNEL	|
					   NETIF_F_HW_CSUM		|
					   NETIF_F_GSO_UDP_TUNNEL_CSUM;
		netdev->hw_features |= netdev->hw_enc_features;
		/* get bit mask from hw about supported offload bit level
		 * BIT(0) = fw supports patch_level 0
		 *	    fcoe bit = encap
		 *	    fcoe_fc_crc_ok = outer csum ok
		 * BIT(1) = always set by fw
		 * BIT(2) = fw supports patch_level 2
		 *	    BIT(0) in rss_hash = encap
		 *	    BIT(1,2) in rss_hash = outer_ip_csum_ok/
		 *				   outer_tcp_csum_ok
		 * used in enic_rq_indicate_buf
		 */
		err = vnic_dev_get_supported_feature_ver(enic->vdev,
							 VIC_FEATURE_VXLAN,
2957
							 &patch_level, &a1);
2958 2959
		if (err)
			patch_level = 0;
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		enic->vxlan.flags = (u8)a1;
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		/* mask bits that are supported by driver
		 */
		patch_level &= BIT_ULL(0) | BIT_ULL(2);
		patch_level = fls(patch_level);
		patch_level = patch_level ? patch_level - 1 : 0;
		enic->vxlan.patch_level = patch_level;
	}
2968 2969

	netdev->features |= netdev->hw_features;
2970
	netdev->vlan_features |= netdev->features;
2971

2972 2973 2974 2975
#ifdef CONFIG_RFS_ACCEL
	netdev->hw_features |= NETIF_F_NTUPLE;
#endif

2976 2977 2978
	if (using_dac)
		netdev->features |= NETIF_F_HIGHDMA;

2979 2980
	netdev->priv_flags |= IFF_UNICAST_FLT;

2981 2982 2983
	/* MTU range: 68 - 9000 */
	netdev->min_mtu = ENIC_MIN_MTU;
	netdev->max_mtu = ENIC_MAX_MTU;
2984
	netdev->mtu	= enic->port_mtu;
2985

2986 2987
	err = register_netdev(netdev);
	if (err) {
2988
		dev_err(dev, "Cannot register net device, aborting\n");
2989
		goto err_out_dev_deinit;
2990
	}
2991
	enic->rx_copybreak = RX_COPYBREAK_DEFAULT;
2992 2993 2994

	return 0;

2995 2996
err_out_dev_deinit:
	enic_dev_deinit(enic);
2997 2998
err_out_dev_close:
	vnic_dev_close(enic->vdev);
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2999
err_out_disable_sriov:
3000 3001
	kfree(enic->pp);
err_out_disable_sriov_pp:
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3002 3003 3004 3005 3006 3007
#ifdef CONFIG_PCI_IOV
	if (enic_sriov_enabled(enic)) {
		pci_disable_sriov(pdev);
		enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
	}
#endif
3008
err_out_vnic_unregister:
3009
	vnic_dev_unregister(enic->vdev);
3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021
err_out_iounmap:
	enic_iounmap(enic);
err_out_release_regions:
	pci_release_regions(pdev);
err_out_disable_device:
	pci_disable_device(pdev);
err_out_free_netdev:
	free_netdev(netdev);

	return err;
}

3022
static void enic_remove(struct pci_dev *pdev)
3023 3024 3025 3026 3027 3028
{
	struct net_device *netdev = pci_get_drvdata(pdev);

	if (netdev) {
		struct enic *enic = netdev_priv(netdev);

3029
		cancel_work_sync(&enic->reset);
3030
		cancel_work_sync(&enic->change_mtu_work);
3031
		unregister_netdev(netdev);
3032
		enic_dev_deinit(enic);
3033
		vnic_dev_close(enic->vdev);
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3034 3035 3036 3037 3038 3039
#ifdef CONFIG_PCI_IOV
		if (enic_sriov_enabled(enic)) {
			pci_disable_sriov(pdev);
			enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
		}
#endif
3040
		kfree(enic->pp);
3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052
		vnic_dev_unregister(enic->vdev);
		enic_iounmap(enic);
		pci_release_regions(pdev);
		pci_disable_device(pdev);
		free_netdev(netdev);
	}
}

static struct pci_driver enic_driver = {
	.name = DRV_NAME,
	.id_table = enic_id_table,
	.probe = enic_probe,
3053
	.remove = enic_remove,
3054 3055 3056 3057
};

static int __init enic_init_module(void)
{
3058
	pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069

	return pci_register_driver(&enic_driver);
}

static void __exit enic_cleanup_module(void)
{
	pci_unregister_driver(&enic_driver);
}

module_init(enic_init_module);
module_exit(enic_cleanup_module);