• Trent Piepho's avatar
    spi: spi-mxs: Fix chip select control bits in DMA mode · 0b782f70
    Trent Piepho authored
    In DMA mode the chip select control bits would be ORed into the CTRL0
    register without first clearing the bits.  This means that after
    addressing slave 1, the CTRL0 bit to address slave 1 would be still be
    set when addressing slave 0, resulting in slave 1 continuing to be
    addressed.
    
    The message handling function would pass the CS value to the txrx
    function, which would re-program the bits on each transfer in the
    message.  The selected CS does not change during a message so this is
    inefficient.  It also means there are two different sets of code for
    selecting the CS, one for PIO that worked and one for DMA that didn't.
    
    Change the code to set the CS bits in the message handling function
    once.  Now the DMA and PIO txrx functions don't need to care about CS
    at all.
    Signed-off-by: default avatarTrent Piepho <tpiepho@gmail.com>
    Cc: Marek Vasut <marex@denx.de>
    Cc: Fabio Estevam <fabio.estevam@freescale.com>
    Cc: Shawn Guo <shawn.guo@linaro.org>
    Signed-off-by: default avatarMark Brown <broonie@linaro.org>
    0b782f70
spi-mxs.c 14.5 KB