Forthcoming IBM boxes will be using Nocona and/or Opteron chips in
clustered mode to get beyond 8 CPUs.  In fact, there are plans to try for
128 CPUs when the Tulsa chip comes out.  Thus, there are a fair number of
signed vs.  unsigned changes in the patch.

Thanks to the HPET timer and some HW changes, I've been able to remove the
MPS/ACPI string comparisons from the detection code.  Instead, it scans
bios_cpu_apicid and uses simple heuristics to select the correct IRQ
delivery mode.  No need for a config option.  Hurrah!

Likewise, I've been able to avoid the preprocessor tricks that the i386
sub-arch needed to build with one or more sub-arches.
Reluctantly-Acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>