• Golan Ben Ami's avatar
    iwlwifi: pcie: allocate and free rx cr's and tr's tails · 1b493e30
    Golan Ben Ami authored
    The hw now refers to two new blocks:
    * rx tr tail - The Tail index on the free buffers queue TR,
    which is update by the device after reading the free buffer
    from the tr.
    * rx cr tail - Updated by the driver when completing
    processing a new completion descriptor in the cr.
    
    Add these two new struct to the rxq, allocate and free them
    when needed.
    
    In addition, the register for rx write pointer had been changed
    to HBUS_TARG_WRPTR. The way to differentiate tx from rx is the
    queue number. TX range is 0-511, and RX's is 512-527.
    Signed-off-by: default avatarGolan Ben Ami <golan.ben.ami@intel.com>
    Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
    1b493e30
internal.h 26.8 KB