• Michael Lyle's avatar
    bcache: implement PI controller for writeback rate · 1d316e65
    Michael Lyle authored
    bcache uses a control system to attempt to keep the amount of dirty data
    in cache at a user-configured level, while not responding excessively to
    transients and variations in write rate.  Previously, the system was a
    PD controller; but the output from it was integrated, turning the
    Proportional term into an Integral term, and turning the Derivative term
    into a crude Proportional term.  Performance of the controller has been
    uneven in production, and it has tended to respond slowly, oscillate,
    and overshoot.
    
    This patch set replaces the current control system with an explicit PI
    controller and tuning that should be correct for most hardware.  By
    default, it attempts to write at a rate that would retire 1/40th of the
    current excess blocks per second.  An integral term in turn works to
    remove steady state errors.
    
    IMO, this yields benefits in simplicity (removing weighted average
    filtering, etc) and system performance.
    
    Another small change is a tunable parameter is introduced to allow the
    user to specify a minimum rate at which dirty blocks are retired.
    
    There is a slight difference from earlier versions of the patch in
    integral handling to prevent excessive negative integral windup.
    Signed-off-by: default avatarMichael Lyle <mlyle@lyle.org>
    Reviewed-by: default avatarColy Li <colyli@suse.de>
    Signed-off-by: default avatarJens Axboe <axboe@kernel.dk>
    1d316e65
writeback.c 13.7 KB