By making use of the CLEAR_SEL feature of the mwl8k host interface
interrupt controller, we can keep the TX_DONE interrupt source masked
while the transmit reclaim tasklet is running (NAPI style) without
having to touch the interrupt controller's interrupt mask register
when entering or exiting polling mode, and without having to do any
more register reads/writes than we do now.

When CLEAR_SEL is enabled on the TX_DONE interrupt source, reading
the interrupt status register will clear the TX_DONE status bit if
it was set, allowing it to be set again if a new TX_DONE event arrives
while we are running the TX reclaim tasklet, but such a new event will
then not trigger another PCI interrupt until a zero is written to the
TX_DONE interrupt status register bit.

I.e., if we write a zero to the TX_DONE interrupt source bit in the
interrupt status register when the TX reclaim tasklet thinks it's
done, a PCI interrupt will be triggered if a new TX_DONE event arrived
from the hardware between us deciding that there is no more work to do
and re-enabling the TX_DONE interrupt source, thereby avoiding the
classic NAPI poll mode exit race that would otherwise occur.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>