• Lennert Buytenhek's avatar
    [ARM] 3439/2: xsc3: add I/O coherency support · 23759dc6
    Lennert Buytenhek authored
    Patch from Lennert Buytenhek
    
    This patch adds support for the I/O coherent cache available on the
    xsc3.  The approach is to provide a simple API to determine whether the
    chipset supports coherency by calling arch_is_coherent() and then
    setting the appropriate system memory PTE and PMD bits.  In addition,
    we call this API on dma_alloc_coherent() and dma_map_single() calls.
    A generic version exists that will compile out all the coherency-related
    code that is not needed on the majority of ARM systems.
    
    Note that we do not check for coherency in the dma_alloc_writecombine()
    function as that still requires a special PTE setting.  We also don't
    touch dma_mmap_coherent() as that is a special ARM-only API that is by
    definition only used on non-coherent system.
    Signed-off-by: default avatarDeepak Saxena <dsaxena@plexity.net>
    Signed-off-by: default avatarLennert Buytenhek <buytenh@wantstofly.org>
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    23759dc6
memory.h 7.07 KB