• Catalin Marinas's avatar
    Merge branch 'kvm-arm64/erratum-1319367' of... · 346f6a46
    Catalin Marinas authored
    Merge branch 'kvm-arm64/erratum-1319367' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into for-next/core
    
    Similarly to erratum 1165522 that affects Cortex-A76, A57 and A72
    respectively suffer from errata 1319537 and 1319367, potentially
    resulting in TLB corruption if the CPU speculates an AT instruction
    while switching guests.
    
    The fix is slightly more involved since we don't have VHE to help us
    here, but the idea is the same: when switching a guest in, we must
    prevent any speculated AT from being able to parse the page tables
    until S2 is up and running. Only at this stage can we allow AT to take
    place.
    
    For this, we always restore the guest sysregs first, except for its
    SCTLR and TCR registers, which must be set with SCTLR.M=1 and
    TCR.EPD{0,1} = {1, 1}, effectively disabling the PTW and TLB
    allocation. Once S2 is setup, we restore the guest's SCTLR and
    TCR. Similar things must be done on TLB invalidation...
    
    * 'kvm-arm64/erratum-1319367' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms:
      arm64: Enable and document ARM errata 1319367 and 1319537
      arm64: KVM: Prevent speculative S1 PTW when restoring vcpu context
      arm64: KVM: Disable EL1 PTW when invalidating S2 TLBs
      arm64: KVM: Reorder system register restoration and stage-2 activation
      arm64: Add ARM64_WORKAROUND_1319367 for all A57 and A72 versions
    346f6a46
cpu_errata.c 23.8 KB