• Chen-Yu Tsai's avatar
    clk: sunxi: Add support for A80 basic bus clocks · 3b2bd70f
    Chen-Yu Tsai authored
    The A80 SoC has 12 PLL clocks, 3 AHB clocks, 2 APB clocks, and a
    new "GT" bus, which I assume is some kind of data bus connecting
    the processor cores, memory and various busses. Also there is a
    bus clock for a ARM CCI400 module.
    
    As far as I can tell, the GT bus and CCI400 bus clock must be
    protected.
    
    This patch adds driver support for peripheral related PLLs and
    bus clocks on the A80. The GT and CCI400 clocks are added as well
    as these 2 along with the PLLs they are clocked from must not be
    disabled.
    Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
    Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
    3b2bd70f
clk-sun9i-core.c 6.14 KB