• Ville Syrjälä's avatar
    drm/i915: Configure GEN6_RP_DOWN_TIMEOUT on CHV · 3cbdb48f
    Ville Syrjälä authored
    CherryViewA0_iGfx_BIOS_DRIVER_PUNIT_spec_y14w28d5 tells us not to enable
    the RP down timeout interrupt, and says that the timeout value is hence
    not used. We do enable that interrupt currently though, so leaving the
    timeout as 0 results in very poor performance as the GPU frequency keeps
    dropping constantly. So just program the register with the recommended
    value.
    
    Leaving the interrupt enabled doesn't seem to do any harm so far. So
    I've decided to leave it on for now, just to avoid making CHV a
    special case.
    
    This fixes the performance regression from:
     commit 5a0afd4b
     Author: Deepak S <deepak.s@linux.intel.com>
     Date:   Sat Dec 13 11:43:27 2014 +0530
    
        drm/i915/chv: Use timeout mode for RC6 on chv
    
    Cc: Deepak S <deepak.s@linux.intel.com>
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: Deepak S<deepak.s@intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    3cbdb48f
intel_pm.c 184 KB