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Kuninori Morimoto authored
sh_mipi uses some clocks, but the method of setup depends on CPU. Current SuperH (like sh73a0) can control all of these clocks by CPG (Clock Pulse Generator). It means we can control it by clock framework only. But on sh7372, it needs CPG settings AND sh_mipi PHYCTRL::PLLDS, and only sh7372 has PHYCTRL::PLLDS. But on current sh_mipi driver, PHYCTRL::PLLDS of sh7372 was overwrote since the callback timing of clock setting was changed by c2658b70 (fbdev: sh_mipi_dsi: fixup setup timing of sh_mipi_setup()). To solve this issue, this patch adds extra .phyctrl. This patch adds detail explanation for unclear mipi settings and fixup wrong PHYCTRL::PLLDS value for ap4evb (0xb -> 0x6). Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
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